Datasheet stn4nf20l Datasheet

Page 1
N-channel 200 V, 1.1 Ω, 1 A SOT-223
SOT-223
1
2
2
3
low gate charge STripFET™ II Power MOSFET
Features
R
Order code V
STN4NF20L 200 V < 1.5 Ω 1 A
■ 100% avalanche tested
■ Low gate charge
DSS
Application
Switching applications
Description
This N-channel 200 V realized with STMicroelectronics unique STripFET™ process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high efficiency isolated DC-DC converters.
DS(on)
max.
I
D
STN4NF20L

Figure 1. Internal schematic diagram

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Table 1. Device summary

Order code Marking Package Packaging
STN4NF20L 4NF20L SOT-223 Tape and reel
October 2010 Doc ID 17445 Rev 2 1/12
www.st.com
12
Page 2
Contents STN4NF20L
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12 Doc ID 17445 Rev 2
Page 3
STN4NF20L Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
V
I
DM
P
TOT
dv/dt
T
1. Pulse width limited by safe operating area.
2. This value is rated according to Rthj-amb ≤ 10 sec.
3. Isd ≤ 1 A, di/dt ≤ 200 A/µs, VDD ≤ 80% V
Gate-source voltage ± 20 V
GS
Drain current continuous TC = 25 °C 1 A
I
D
Drain current continuous TC = 100 °C 0.63 A
I
D
(1)
Drain current pulsed 4 A
(2)
Total dissipation at TC = 25 °C 3.3 W
(3)
Peak diode recovery voltage slope 20 V/ns
T
Operating junction temperature
j
Storage temperature
stg
(BR)DSS.
- 55 to 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit
thj-amb
thj-amb
(1)
Thermal resistance junction to ambient
(2)
38 °C/W
62.5 °C/W
R
R
1. When mounted on 1 inch² FR-4 board, 2 oz. Cu, (t < 10 sec).
2. When mounted on 1 inch² FR-4 board, 2 oz. Cu, (t > 10 sec).

Table 4. Thermal data

Symbol Parameter Value Unit
I
E
1. Pulse width limited by T
2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V.
Avalanche current, repetetive or not repetetive
AR
Single pulse avalanche energy
AS
JMAX.
Doc ID 17445 Rev 2 3/12
(2)
(1)
1A
90 mJ
Page 4
Electrical characteristics STN4NF20L

2 Electrical characteristics

(Tcase = 25 °C unless otherwise specified)

Table 5. On /off states

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown voltage
Zero gate voltage drain current (V
GS
Gate-body leakage current (V
DS
= 0)
= 0)
= 1 mA, VGS = 0 200 V
I
D
V
= Max rating
DS
= Max rating, TC=125 °C
V
DS
1
50µAµA
VGS = ± 20 V, VDS=0 ± 100 nA
Gate threshold voltage VGS = VDS, ID = 250 µA 1 2 3 V
Static drain-source on resistance
= 10 V, ID = 0.5 A
V
GS
= 5 V, ID = 0.5 A
V
GS
1.1
1.13
1.5
1.55ΩΩ

Table 6. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit
C
C
C
R
Q
Q
Q
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
Instrinsic gate
g
resistance
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
= 25 V, f = 1 MHz,
V
DS
= 0
V
GS
f=1 MHz open drain - 5.5 - Ω
VDD = 160 V, ID = 1 A, VGS = 10 V (see Figure 13)
150
-
30
-
4
0.9
-
2.6
-
6.9
pF pF pF
nC nC nC

Table 7. Switching times

Symbol Parameter Test conditions Min. Typ. Max Unit
t
d(v)
t
c(off)
4/12 Doc ID 17445 Rev 2
Voltage delay time
t
Voltage rise time
r
t
Current fall time
f
Crossing time
= 100 V, ID = 0.5 A,
V
DD
RG = 4.7 Ω, V
GS
(see Figure 12)
= 10 V
3.6
-
2
10.4
15.4
ns ns
­ns
ns
Page 5
STN4NF20L Electrical characteristics

Table 8. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Source-drain current
SD
Source-drain current
(1)
(pulsed)
(2)
Forward on voltage ISD = 1 A, VGS = 0 - 1.6 V
t
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
Reverse recovery time
t
rr
Reverse recovery charge
rr
Reverse recovery current
ISD = 1 A, di/dt = 100 A/µs VDD = 60 V (see Figure 14)
= 1 A, di/dt = 100 A/µs
I
SD
= 60 V, Tj = 150 °C
V
DD
(see Figure 14)
1
-
51
-
90
3.5
56
-
105
3.7
A
4
A
ns
nC
A
ns
nC
A
Doc ID 17445 Rev 2 5/12
Page 6
Electrical characteristics STN4NF20L
I
D
1
0.1
0.1
1
100
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
10µs
100µs
1ms
10ms
0.01
Tj=150°C Tc=25°C
Single pulse
AM08185v1
I
D
3
2
1
0
0
10
V
DS
(V)
20
(A)
4
5
4V
5V
3V
V
GS
=10V
6
AM08186v1
I
D
3
2
1
0
0
4
V
GS
(V)
8
(A)
2
6
4
5
1
3
57 9
V
DS
=15V
AM08187v1
BV
DSS
-50
0
T
J
(°C)
(norm)
-25
75
25
50
100
0.93
0.95
0.99
1.01
1.03
1.05
0.97
1.07
1.09
1.11
AM08188v1
R
DS(on)
1.06
1.04
1.02
1
0
0.4
I
D
(A)
(Ohm)
0.2
0.6
1.08
ID=0.5A
V
GS
=10V
0.8
1
VGS=5V
AM08189v1

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized B
vs temperature Figure 7. Static drain-source on resistance
VDSS
6/12 Doc ID 17445 Rev 2
Page 7
STN4NF20L Electrical characteristics
V
GS
6
4
2
0
0
1
Q
g
(nC)
(V)
4
8
2
3
10
VDD=160V
I
D
=1A
5
12
300
200
100
0
400
500
V
DS
V
GS
6
7
8
AM08190v1
C
300
200
100
0
30
50
V
DS
(V)
(pF)
40
60
Ciss
Coss
Crss
20
10
0
AM08191v1
V
GS(th)
1.00
0.90
0.80
0.70
-50
0
T
J
(°C)
(norm)
-25
1.10
75
25
50
100
AM08192v1
R
DS(on)
1.9
1.5
0.7
0.5
-50
0
T
J
(°C)
(norm)
-25
75
25
50
100
0.9
1.1
1.3
1.7
2.1
AM08193v1
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 11. Normalized on resistance vs
temperature
Doc ID 17445 Rev 2 7/12
Page 8
Test circuits STN4NF20L
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3 μF
V
DD
AM01469v1
VDD
47kΩ
1kΩ
47kΩ
2.7kΩ
1kΩ
12V
V
i=20V=VGMAX
2200 μF
PW
IG=CONST
100Ω
100nF
D.U.T.
V
G
AM01470v1
A
D
D.U. T.
S
B
G
25
Ω
A
A
B
B
R
G
G
FAST DIODE
D
S
L=100μH
μF
3.3
1000
μF
V
DD
AM01471v1
Vi
Pw
VD
ID
D.U. T.
L
2200
μF
3.3 μF
VDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon
tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
V
GS

3 Test circuits

Figure 12. Switching times test circuit for
resistive load
Figure 14. Test circuit for inductive load
switching and diode recovery times

Figure 13. Gate charge test circuit

Figure 15. Unclamped inductive load test
circuit

Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform

8/12 Doc ID 17445 Rev 2
Page 9
STN4NF20L Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
®
packages, depending on their level of environmental compliance. ECOPACK®
Doc ID 17445 Rev 2 9/12
Page 10
Package mechanical data STN4NF20L
DIM.
mm.
min. typ max.
A 1.80
A1 0.02 0.1
B 0.60 0.70 0.85
B1 2.90 3.00 3.15
c 0.24 0.26 0.35
D6.30 6.50 6.70
e2.30
e1 4.60
E 3.30 3.50 3.70
H 6.70 7.00 7.30
V 10
o
SOT-223 mechanical data
0046067_L
10/12 Doc ID 17445 Rev 2
Page 11
STN4NF20L Revision history

5 Revision history

Table 9. Document revision history

Date Revision Changes
29-Apr-2010 1 First release.
11-Oct-2010 2 Document status promoted from preliminary data to datasheet.
Doc ID 17445 Rev 2 11/12
Page 12
STN4NF20L
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12/12 Doc ID 17445 Rev 2
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