The STLVDS47 is a quad CMOS flow-through
differential line driver designed for applications
requiring ultra low power dissipation and high data
rate. The device is designed to support data rates
in excess of 400Mbp s (200 MHz) utilizing Low
Voltage Differential Signaling (LVDS) techology.
The STLVDS47 accepts low voltage TTL/CMOS
input levels and translates them to low voltage
STLVDS47
SO-16TSSOP
(350 mV) differential output signals. In addition,
the driver support a TRI-STATE function that may
be used to disable the output stage, disabling the
load current, and thus dropping the device to an
ultra low idle power state of 1.3mW typical. The
STLVDS47 has a flow-through pinout f or easy
PCB layout.
The E N and EN* inputs are AN Ded together and
control the TRI-STATE output.
TheSTLVDS47andcompanionlinereceiver
(STLVDS48) provide a new alternative to high
powerpseudo-ECLdevicesforhigh-speed
point-to-point interface applications.
ORDERING CODES
Type
STLVDS47BD-40 to 85 °CSO-16 (Tube)50 parts per tube / 20 tube per box
STLVDS47BDR-40 to 85 °CSO-16 (Tape & Reel)2500 parts per reel
STLVDS47BTR-40 to 85 °CTSSOP-16 (Tape & Reel)2500 parts per reel
First Driver Input
Second Driver Input
Supply Voltage
Third Driver Input
Fourth Driver Input
Fourth Driver Inverting Output
Fourth Driver non-Inverting Output
Third Driver non-Inverting Output
Third Driver Inverting Output
Second Driver Inverting Output
Second Driver non-Inverting Output
First Driver non-Inverting Output
First Driver Inverting Output
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Page 3
FUNCTIONAL DIAGRAM
STLVDS47
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
CC
D
IN
Supply Voltage
Input Voltage
-0.3 to 4V
-0.3 to 6V
EN, EN*Enable Input Voltage-0.3 to 6V
D
OUT+,DOUT-
I
SCTOUT
T
stg
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
Output Voltage
Short Circuit Duration
Storage Temperature Range
-0.3 to 3.9V
Continuous
-65 to +150°C
RECOMMENDED OPERATIN G CONDITIONS
SymbolParameterMinTYPMaxUnit
V
V
V
Supply Voltage
CC
High-Level Input Voltage
IH
Low-Level Input Voltage
IL
Operating Free-Air Temperature
T
A
33.33.6V
2V
0.8V
-4085°C
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Page 4
STLVDS47
ELECTRICAL CHARACTERISTICS (Typical values are at TA= 25°C, VCC= 3.3V ± 10% ,
T
= -40 to 85 °C, unless otherwise specified). (Note 1, 2)
A
SymbolParameterTest Conditions
Min.Typ.Max.
V
∆V
Differential Output VoltageRL= 100 Ω247350454mV
OD1
Change in Magnitude of V
OD1
OD1
for
-3535|mV|
Complementary Output States
V
∆V
Offset Voltage1.1251.21.375V
OC
Change in Magnitude of VOSfor
OC
-2525|mV|
Complementary Output States
Input High CurrentVIN=2V20µA
I
IH
Input Low CurrentVIN= 0.8V10µA
I
IL
Output Short Circuit Current
I
OS
(Note 3)
I
I
I
I
NOTE 1: Current into device pins is defined as positive. Current out of device pins as negative. All voltage are reference to ground except:
V
OD1
NOTE 2: The STLVDS47 is a current mode device and only functions within datasheet specifications when a resostive load is applied to the
driver outputs typical range is (90
NOTE 3: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
Differential Output Short Circuit
OSD
(Note 3)
Power-off LeakageV
OFF
I
Output TRI-STATE CurrentEN = 0.8V and EN* = 2V
OZ
Loaded Supply Current Drivers
CCL
Enabled
No Load Supply Current Drivers
CCZ
Disabled
and ∆V
OD1
.
Ω to 110 Ω).
ENABLED,DIN=VCC,
D
=0VorDIN=GND,
OUT+
D
=0V
OUT-
ENABLED, VOD= 0V310mA
= 0V or 3.6V,
OUT
= 0V or Open
V
CC
=0VorV
V
OUT
CC
RL= 100 Ω All Channels,
D
IN =VCC
D
IN =VCC
EN = GND, EN* = V
or GND (all inputs)
or GND,
CC
Value
Unit
610mA
±1µA
±1µA
1826mA
0.41mA
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Page 5
SWITCHING CHARACTERISTICS (Typical values are at TA= 25°C, VCC= 3.3V ± 10% ,
T
= -40 to 85 °C, unless otherwise specified). (Note 1, 2)
A
SymbolParameterTest Conditions
Min.Typ.Max.
t
t
t
SK(p)
t
SK(o)
t
SK(pp)
t
t
t
t
f
MAX
NOTE 1: CLincludes probe and jig capacitance.
NOTE2: t
together.
NOTE 3:t
vices operate with same supply voltage, at the same temperature, and have identical packages and test circuits.
Propagation Delay Time Low-to-
PLH
High-Level output
Propagation Delay Time High-to-
PHL
Low-Level output
Differential Output signal rise time0.51ns
t
r
Differential Output signal fall time0.51ns
t
f
Pulse Skew (|t
PHL-tPLH
|)100300ps
Channel-to-Channel Output Skew
(Note 1)
Part-to-Part Skew (Note 2)1ns
Propagation Delay Time, high-
PZH
impedance-to-high-level output
Propagation Delay Time, high-
PZL
impedance-to-low-level output
Propagation Delay Time, high-
PHZ
level-to-high-impedance output
Propagation Delay Time, low-
PLZ
level-to-high-impedance output
Maximum Operating Frequency250MHz
is the magnitude of the time difference between the t
SK(o)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both de-
SK(pp)
RL= 100 Ω,CL= 5 pF1.61.82.7ns
1.61.82.7ns
ort
PLH
of alldrivers of asingle device with alloftheirinputs connected
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