Datasheet stl85n6f3 Datasheet

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N-channel 60 V, 0.005 Ω, 19 A PowerFLAT™ (6x5)

Features

Type V

STL85N6F3 60 V < 0.0057 Ω 19 A

1. The value is rated according R

■ Extremely low on-resistance R

■

100% avalanche tested

DSS

DS(on)

max

thj-pcb

DS(on)

Application

■ Switching applications

Description

This N-channel enhancement mode Power MOSFET is the latest refinement of STMicroelectronics unique “single feature size” strip-based process with less critical alignment steps and therefore a remarkable manufacturing reproducibility. The resulting transistor shows extremely high packing density for low on resistance, rugged avalanche characteristics and low gate charge.

(1)

STL85N6F3

STripFET™ Power MOSFET

Preliminary Data

PowerFLAT™ (6x5)

Figure 1. Internal schematic diagram

Table 1. Device summary

Order code Marking Package Packaging

STL85N6F3 85N6F3 PowerFLAT™ (6x5) Tape and reel

January 2009 Rev 1 1/10

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

www.st.com

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Contents STL85N6F3

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

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STL85N6F3 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

TOT

(1)

(3)

Drain-source voltage (VGS = 0) 60 V

Gate-source voltage ± 20 V

Drain current (continuous) at TC = 25°C 19 A

(1)

Drain current (continuous) at TC = 100°C 12 A

(2)

Drain current (pulsed) 76 A

(3)

Drain current (continuous) at TC=25°C 85 A

Drain current (continuous) at TC = 100°C 54 A

(1)

Total dissipation at TC = 25°C 4 W

(3)

Total dissipation at TC = 25°C 80 W

Derating factor 0.03 W/°C

stg

1. The value is rated according R

2. Pulse width limited by safe operating area

3. The value is rated according R

Operating junction temperature

Storage temperature

thj-pcb

thj-c

-55 to 150 °C

Table 3. Thermal resistance

Symbol Parameter Value Unit

thj-case

thj-pcb

1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10sec

Thermal resistance junction-case (drain) (steady state) 1.56 °C/W

(1)

Thermal resistance junction-ambient 31.3 °C/W

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Electrical characteristics STL85N6F3

2 Electrical characteristics

=25 °C unless otherwise specified)

CASE

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

(BR)DSS

DSS

GSS

GS(th)

DS(on)

Drain-source breakdown voltage

Zero gate voltage drain current (VGS = 0)

Gate body leakage current

= 0)

= 250 µA, VGS= 0 60 V

= Max rating,

= Max rating @125°C

= ±20 V ±200 nA

100µAµA

Gate threshold voltage VDS= VGS, ID = 250 µA 2 V

Static drain-source on resistance

= 10 V, ID= 8.5A 0.005 0.0057 Ω

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

=25 V, f=1 MHz,

3400

650

pF pF pF

Total gate charge

Gate-source charge

Gate-drain charge

VDD=30 V, ID = 19 A V

=10 V

(see Figure 3)

60 TBD TBD

nC nC nC

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STL85N6F3 Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

d(on)

d(off)

Turn-on delay time

Rise time

Turn-off delay time

Fall time

=15 V, ID= 8.5 A,

=4.7 Ω, VGS=10 V

(see Figure 2)

TBD TBD TBD TBD

Table 7. Source drain diode

Symbol Parameter Test conditions Min Typ. Max Unit

SDM

RRM

1. Pulse width limited by safe operating area

2. Pulsed: pulse duration=300µs, duty cycle 1.5%

Source-drain current 19 A

(1)

Source-drain current (pulsed) 76 A

(2)

Forward on voltage I

Reverse recovery time

Reverse recovery charge

Reverse recovery current

= 19 A, VGS=0 1.3 V

= 19 A,

di/dt = 100 A/µs,

=25 V, Tj=150°C

TBD

ns ns ns ns

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Test circuit STL85N6F3

3 Test circuit

Figure 2. Switching times test circuit for

resistive load

Figure 4. Test circuit for inductive load

switching and diode recovery times

Figure 3. Gate charge test circuit

Figure 5. Unclamped inductive load test

circuit

Figure 6. Unclamped inductive waveform Figure 7. Switching time waveform

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STL85N6F3 Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

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Package mechanical data STL85N6F3

PowerFLAT™(6x5) mechanical data

DIM.

A 0.80 0.83 0.93 0.031 0.32 0.036

A1 0.02 0.05 0.0007 0.0019

A3 0.20 0.007

b 0.35 0.40 0.47 0.013 0.015 0.018

D 5.00 0.196

D1 4.75 0.187

D2 4.15 4.20 4.25 0.163 0.165 0.167

E 6.00 0.236

E1 5.75 0.226

E2 3.43 3.48 3.53 0.135 0.137 0.139

E4 2.58 2.63 2.68 0.103 0.105

e 1.27 0.050

L 0.70 0.80 0.90 0.027 0.031 0.035

Min. Typ. Max. Min. Typ. Max.

mm. inch

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STL85N6F3 Revision history

5 Revision history

Table 8. Document revision history

Date Revision Changes

22-Jan-2009 1 First release

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STL85N6F3

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