Datasheet STi5202 Datasheet (ST)

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STi5202

Low-cost set-top box decoder for H.264 and Microsoft VC1

Data Brief

Features

■ Single-chip, video decoder including

– Linux

– Transport filtering and descrambling – Video decoder: VC-1 (including WMV 9),

–SVP compliant –Windows Media – ST40 32-bit superscaler RISC CPU

, Windows® CE and OS21

compatible ST40 CPU core: 266 MHz

H.264 (MPEG-4 part 10) and MPEG-2

™

DRM support

5 x 2-ch

LMI

PCM out

2-ch

PCM in

Audio decoder and interfaces

ST231

core

ST40 core 266 MHz UDI

MMU

16 K Icache

Int. control

32 K Dcache

DDR

SDRAM

System

AudioL AudioR

Audio DACs

S/PDIF

■ Embedded interfaces

– USB 2.0 host controller/PHY interface – DVI/HDMI™ output – Digital audio and video auxiliary inputs – Low-cost modem – 100BT ethernet controller with integrated

MAC and MII/RMII interface for external PHY

Description

The STi5202 is a new generation, set-top box/DVD decoder chip, and provides very high performance for low-cost systems. STi5202 includes both VC1 and H.264 video decoders for new, low bit rate applications.

video in

Digital

video input

USB

2.0

2x I/F

SmCard

6x GPIO

Peripheral I/O

and external interrupts

MAFE

interface

Tx/Rx

ILC

UARTs

PWM

SSCs

STBus

3 x GDP

2 x PDES

PTI

TSmerger/router

TSIN1 TS I/O

TSIN0

NRSS-A

PTI

generator

and system

Clock

services

FDMA

MII/RMII for 100BT

Ethernet

Ethernet,

MII/RMII

Video decoder

VC-1 (inc WMV 9)

H264/MPEG-2

ST231

core

DVI-HDCP

HDMI

Main video

output (ED)

2D gamma

blitter

Output stage

DACs

Main video

output (ED)

YPbPr

CUR

Display

compositor

DENC

DACs

Aux video

output (SD)

YC/CVBS

Digital

video

output

DEI

Main video

display

Aux video

display

EMI

EMPI

Flash

or companion chip

October 2007 Rev 1 1/9

For further information contact your local STMicroelectronics sales office.

www.st.com

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Typical applications STi5202

1 Typical applications

Figure 1. Low-cost satellite set-top box

IR Tx/Rx

QPSK Rx

STv0299

Transport stream in

2 x 128 Mbit

DDR1

STi5202

+STb6000

PTSN

MAFE

Smart

cards

Flash

Figure 2. Low-cost cable set-top box with return channel

CableCARD™

interface

Flash

RGB/YPbPr/

HDMI

CVBS/YC

2 x 128 Mbit

DDR1

VCR

Broadcast

IB data/

OOB

Tuner and SAW filter

Duplex filter

Upstream

STv0498

+STv0130

PGA

Cable

front end

QAM/QPSK

transceiver

Tx/Rx

Smart cards

2/9

EMI

STi5202

RS232

RGB/YPbPr/

HDMI

CVBS/YC

VCR

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STi5202 Typical applications

Figure 3. Low-cost dual satellite and terrestrial set-top box with HDD and DVD

DVD

optical

interface

chip

Flash

HDD

EMI

QPSK Rx

STV0299

+STB6000

8VSB Rx

Tuner

PSTN

STV0370

MAFE

Figure 4. Low-cost IP-TV set-top box with HDD

USB

STi5202

DVB-CI

Smart

cards

2 x 128 Mbit

DDR1

RS232

Tx/Rx

RGB/YPbPr/

HDMI

USB 2.0

HDD

(expansion)

Ethernet RJ45

Flash

Tx/Rx

RGB/YPbPr/

HDMI

USB 2.0

HDD

(expansion)

USB

STi5202

Smart cards

DDR1

RS232

HDD

EMI

MII

PHY

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Typical applications STi5202

1.1 Detailed features

The STi5202 is a single-chip,standard-definition video decoder including:

● Flexible audio decoder

● Windows

● Microsoft

● Linux

● Transport filtering and descrambling

● SVP compliant

● Graphics engine and dual display: standard and enhanced definition

The STi5202 also features the following embedded interfaces:

● USB 2.0 host controller/PHY interface

● DVI/HDMI™ output (optional)

● Low-cost modem

● 100BT ethernet controller with integrated MAC and MII/RMII interface for external PHY

The processor subsystem uses the ST40 32-bit superscaler RISC CPU and includes:

● 266 MHz, 2-way set associative 16-Kbyte ICache, 32-Kbyte DCache, MMU

● 5-stage pipeline, delayed branch support

● Floating point unit, matrix operation support

● Debug port, interrupt controller

Media™ DRM support

VC-1, WMA9 and H.264 MPEG2 support

, Windows® CE and OS21 compatible ST40 CPU core: 266 MHz

The transport subsystem includes:

● TS merger/router

– Merging of 3 external transport streams (2 serial/parallel inputs, 1 bidirectional

interface) – Transport streams from memory support – NRSS-A module interface

● Programmable transport interfaces (PTIs)

– Two programmable transport inte rface s – Two transport stream demultiplexers: DVB, DIRECTV®, ATSC, ARIB, OpenCable,

DCII – Integrated DES, AES, DVB and Multi2 descramblers – NDS random access scrambled stream protocol (RASP) compliant – NDS ICAM CA – Support for VGS, Passage

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STi5202 Typical applications

The video/graphics subsystem includes:

● Microsoft WMV 9/VC-1 MP@ML and AP@L1/H.264(MPEG-4 part 10) main and high

profile level 3/MPEG-2 MP@ML video decoder – Advanced error concealment and trick mode support – Dual SD decoding

● SD digital video input

● Displays

– One ED display multi format capable (480p/576p, 480i/576i)

- analog ED output RGB or YPbPr

- HDMI encoded output

– One standard-definition display

- analog SD output: YPbPr or YC and CVBS

● Gamma 2D graphics processor

– Triple source 2D gamma blitter engine – Alpha blending and logical operations – Color space and format conversion – Fast color fill – Arbitrary resizing with high quality filters – Acceleration of direct drawing by CPU

● Gamma compositor and video processor

– 7-channel mixer for enhanced definition output – Independent 2-channel mixer for SD output – 3 graphic display planes – High-quality video scaler – Motion and detail adaptive deinterlacer – Linear resizing and format conversions – H or izontal and vertical filterin g

● Copy protection

– HDMI/HDCP copy protection hardware –SVP compliant – Macrovision

copy protection for 480i, 480i, 576i, 576p outputs –DTCP-IP – AWG-based DCS analog copy protection

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Typical applications STi5202

The audio subsystem includes:

● Digital audio decoder

– Support for all the most popular audio standards including WMA-9, WMA-9 Pro,

MPEG-1 layer I/II, MPEG-2 layer II, MPEG-2 AAC, MPEG-4 AAC LC 2channel/5.1 channel MPEG-4 AAC+SBR 2-channel/5.1 channel, Dolby® Digital

EX, Pro Logic® II, MLP™ and DTS® – PCM mixing with internal or external source and sample rate conversion – 6- to 2-channel downmixing – PCM audio input – Independent multichannel PCM output, S/PDIF output and analog output

● Stereo 24-bit audio DAC for analog output

● IEC958/IEC1937 digital audio output interface (S/PDIF)

● CSS/CPxM copy protec tion har dwa re

Available interfaces include:

● External memory interface (EMI)

– 16-bit interface supporting ROM, flash, SFlash, SRAM, peripherals – Access in 5 banks – High speed synchronous mode for interconnecting two STi5202 devices

● External microprocessor interface (EMPI)

– 32-bit MPX satellite, target-only interface – Synchronous operation at MPX clock speed, capable of 100 MHz

● Local memory interface (LM I)

– Interface (1 x 32-bit) for DDR1 200-MHz (DDR400) memories, supports 128-,

256-, 512-Mbit, and 1-Gbit devices

● USB 2.0 host controller/PHY interface

● 100BT ethernet controller, MAC and MII/RMII

On-chip peripherals:

– 4 ASCs (UARTs) with Tx and Rx FIFOS, two of which can be used in smartcard

interfaces – 2 smartcard interfaces and clock generators (improved to reduce external

circuitry) – 3 SSCs for I²C/SPI master slaves interfaces – Serial communications interface (SCIF) – 2 PWM outputs – Teletext serializer and DMA module – 6 banks of general purpose I/O, 3.3 V tolerant – SiLabs line-side (DAA) interface – Mod em anal og fr ont end (MAF E ) inter fac e – Infrared transmitter/receiver supporting RC5, RC6 and RECS80 codes – UHF remote receiver input interface – Interrupt level controller and external interrupts, 3.3 V tolerant – Low powe r/RTC/watchd og co ntr ol ler – Integrated VCXO

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STi5202 Typical applications

– DiSEqC 2.0 interface – PWM capture/compare functions

● Flexible multi-channel DMA

Services:

● JT AG/TAP interface, ST40 toolset support, ST231 toolset support

Package:

● 27 x 27 FPBGA, 620 balls.

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Revision history STi5202

2 Revision history

Table 1. Document revision history

Date Revision Changes

19-Oct-2007 1 Initial release.

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STi5202

t A P

l N

O U

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