Datasheet std86n3lh5 Datasheet

Page 1
Features
Type V
STD86N3LH5 30 V < 0.005 Ω 80 A
DSS
R
DS(on)
max I
STD86N3LH5
N-channel 30 V, 0.0045 Ω , 80 A, DPAK
STripFET™ V Power MOSFET
D
■ R
■ Extremely low on-resistance R
■
High avalanche ruggedness
■ Low gate drive power losses
* Qg industry benchmark
DS(on)
Application
■ Switching applications
– Automotive
Description
This product utilizes the 5 rules of ST’s proprietary STripFET™ technology. The lowest available R packages, makes this device suitable for the most demanding DC-DC converter applications, where high power density is to be achieved.
th
generation of design
DS(on)*Qg
, in the standard
3
1
DPAK

Figure 1. Internal schematic diagram

Table 1. Device summary

Order codes Marking Package Packaging
STD86N3LH5 86N3LH5 DPAK Tape and reel
April 2009 Doc ID 15575 Rev 1 1/14
www.st.com
14
Page 2
Contents STD86N3LH5
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/14 Doc ID 15575 Rev 1
Page 3
STD86N3LH5 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
I
V
V
V
I
D
DM
P
I
TOT
Drain-source voltage (V
DS
Drain-source voltage (V
DS
Gate-source voltage ± 22 V
GS
(1)
Drain current (continuous) at TC = 25 °C 80 A
Drain current (continuous) at TC = 100 °C 55 A
D
(2)
Drain current (pulsed) 320 A
= 0) 30 V
GS
= 0) @ T
GS
JMAX
35 V
Total dissipation at TC = 25 °C 70 W
Derating factor 0.47 W/°C
(3)
E
AS
T
T
Single pulse avalanche energy 165 mJ
Storage temperature -55 to 175 °C
stg
Max. operating junction temperature 175 °C
j
1. Limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting Tj = 25°C, ID = 40 A, VDD = 25 V

Table 3. Thermal resistance

Symbol Parameter Value Unit
R
R
thj-pcb
thj-case
Thermal resistance junction-case max 2.14 °C/W
(1)
Thermal resistance junction-pcb max 50 °C/W
1. When mounted on 1 inch² FR-4 Oz Cu board
Doc ID 15575 Rev 1 3/14
Page 4
Electrical characteristics STD86N3LH5

2 Electrical characteristics

(T
= 25 °C unless otherwise specified)
CASE

Table 4. Static

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown Voltage
Zero gate voltage drain current (VGS = 0)
Gate body leakage current
= 0)
(V
DS
Gate threshold voltage V
Static drain-source on resistance
= 250 µA, VGS= 0 30 - - V
I
D
= 20 V
V
DS
= 20 V,Tc = 125 °C
V
DS
V
= ± 22 V - - ±100 nA
GS
= VGS, ID = 250 µA 1 1.8 2.5 V
DS
= 10 V, ID = 40 A - 0.0045 0.005 Ω
V
GS
= 5 V, ID = 40 A - 0.0055 0.0065 Ω
V
GS
--
1
10

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit
C C C
Q Q Q
Q
Q
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
Pre Vth gate-to-source
gs1
charge Post V
gs2
th
charge
gate-to-source
= 25 V, f=1 MHz,
V
DS
= 0
V
GS
= 15 V, ID = 80 A
V
DD
= 5 V
V
GS
Figure 16
V
= 15 V, ID = 80 A
DD
= 5 V
V
GS
Figure 16
1850
-
380
-
58
14
-
6.8
-
4.7
2.3
-
-
4.5
µA µA
pF pF pF
nC nC nC
nC
nC
R
Gate input resistance
G
4/14 Doc ID 15575 Rev 1
f = 1 MHz gate bias Bias = 0 test signal level = 20 mV open drain
-1.2-Ω
Page 5
STD86N3LH5 Electrical characteristics

Table 6. Switching on/off (inductive load)

Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Turn-on delay time
t
Rise time
r
Turn-off delay time
t
Fall time
f
= 15 V, ID = 40 A,
V
DD
RG = 4.7 Ω, V
Figure 15
GS
= 5 V
6
­14
23.6
-
10.8
-
-

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Source-drain current
SD
(1)
Source-drain current (pulsed)
(2)
Forward on voltage I
t
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
= 40 A, V
I
SD
SD
= 80 A,
GS
di/dt = 100 A/µs,
= 20 V
V
DD
Figure 17
--
80
320AA
= 0 - - 1.1 V
31.8
-
26.1
-
1.6
ns ns
ns ns
ns
nC
A
Doc ID 15575 Rev 1 5/14
Page 6
Electrical characteristics STD86N3LH5

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized B
vs temperature Figure 7. Static drain-source on resistance
VDSS
6/14 Doc ID 15575 Rev 1
RDS(on)
(mΩ)
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
AM03396v1
V
GS=5V
VGS=10V
50
60
70
20
30
10
0
40
80
I
D(A)
Page 7
STD86N3LH5 Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 12. Source-drain diode forward
characteristics
Figure 11. Normalized on resistance vs
temperature
Doc ID 15575 Rev 1 7/14
Page 8
Test circuit STD86N3LH5

3 Test circuit

Figure 13. Switching times test circuit for
PW
resistive load
VD
VGS
RG
RL
D.U.T.
2200
µF
3.3 µF
AM01468v1
V
DD
Figure 15. Test circuit for inductive load
G
25
Ω
switching and diode recovery times
A
D
D.U. T.
S
B
R
FAST DIODE
G
A
A
L=100µH
B
B
D
G
S
3.3
µF
1000
µF
V
DD

Figure 14. Gate charge test circuit

V
i=20V=VGMAX
PW
2200 µF
1kΩ
12V
IG=CONST
2.7kΩ
47kΩ
47kΩ
100Ω
1kΩ
100nF
D.U.T.
AM01469v1
Figure 16. Unclamped inductive load test
circuit
L
VD
ID
Vi
D.U. T.
2200
µF
3.3 µF
VDD
V
VDD
G
Pw
AM01470v1

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

V(BR)DSS
VD
IDM
ID
VDD
VDD
AM01472v1
8/14 Doc ID 15575 Rev 1
0
0
10%
tdon
ton
90%
tr
10%
V
GS
VDS
90%
tdoff
AM01471v1
toff
tf
90%
10%
AM01473v1
Page 9
STD86N3LH5 Test circuit

Figure 19. Gate charge waveform

Vds
Vgs(th)
Qgs1
Qgs2 Qgd
Id
Vgs
Doc ID 15575 Rev 1 9/14
Page 10
Package mechanical data STD86N3LH5

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
10/14 Doc ID 15575 Rev 1
Page 11
STD86N3LH5 Package mechanical data
TO-252 (DPAK) mechanical data
DIM.
min. typ max.
mm.
A 2.20 2.40
A1 0.901.10
A2 0.03 0.23
b 0.64 0.90
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 5.10
E 6.40 6.60
E1 4.70
e2.28
e1 4.40 4.60
H 9.35 10.10
L1
L1 2.80
L2 0.80
L4 0.60 1
R0.20
V2 0
o
o
8
0068772_G
Doc ID 15575 Rev 1 11/14
Page 12
Packaging mechanical data STD86N3LH5

5 Packaging mechanical data

DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 16.4 18.4 0.645 0.724
N 50 1.968
T 22.4 0.881
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1 12.1 0.476
D 1.5 1.6 0.059 0.063
D1 1.5 0.059
E 1.65 1.85 0.065 0.073
F 7.4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40 1.574
W 15.7 16.3 0.618 0.641
mm inch
MIN. MAX. MIN. MAX.
12/14 Doc ID 15575 Rev 1
BASE QTY BULK QTY
2500 2500
Page 13
STD86N3LH5 Revision history

6 Revision history

Table 8. Document revision history

Date Revision Changes
10-Apr-2009 1 First release.
Doc ID 15575 Rev 1 13/14
Page 14
STD86N3LH5
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14/14 Doc ID 15575 Rev 1
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