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STD5N20L
N-CH A NNEL 200V - 0. 65Ω - 5A DPAK
STripFET™ MOSF ET
Table 1: Ge neral Features
TYPE V
STD5N20L 200 V < 0.7 Ω 5 A 33 W
■ TYPICAL R
■ CONDUCTION LOSSES REDUCED
■ LOW INPUT CAPACIATNCE
■ LOW THRESHOLD DEVICE
DSS
(on) = 0.65 Ω @ 5V
DS
R
DS(on)
I
Pw
D
DESCRIPTION
The STD5N20L utilizes the latest advanced design rules of ST’s proprietary STripFET™ technology. This is suitable for the m ost demanding DC
Motor Control and lighting application.
APPLICATIONS
■ UPS AND MOTOR CONTROL
■ LIGHTING
Figure 1: Package
3
1
DPAK
Figure 2: Internal Schematic Diagram
Table 2: Order Codes
SALES TYPE MARKING PACKAGE PACKAGING
STD5N20LT4 D5N20L DPAK TAPE & REEL
NEW DATASHEET ACCORDING TO PCN DSG-TRA/04/532
Rev. 3
1/10 September 2004
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STD5N20L
Table 3: Absolute Maximum ratings
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
T
stg
T
j
( ) Pulse width limited by safe operating area
Table 4: Thermal Data
Rthj-case Thermal Resistance Junction-case Max 3.75 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W
T
l
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
200 V
200 V
Gate- source Voltage ±20 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
( )
Drain Current (pulsed) 20 A
Total Dissipation at TC = 25°C
5A
3.6 A
33 W
Derating Factor 0.27 W/°C
Storage Temperature
Operating Junction Temperature
–55 to 150 ° C
Maximum Lead Temperature For Soldering Purpose 275 °C
ELECTRICAL CHARACTERISTICS (T
=25° C UNLESS OTHERWISE SPECIFIED)
CASE
Table 5: On/Off
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leaka ge
Current (V
DS
= 0)
Gate Threshold Voltage
Static Drain-source On
Resistance
ID = 250 µA, VGS = 0 200 V
V
= Max Rating
= 0)
DS
VDS= Max Rating, TC= 125°C
V
= ±20V ±100 nA
GS
V
= VGS, ID = 50µA
DS
12 . 5 V
VGS = 5 V, ID = 2.5 A 0.65 0.7 Ω
1µ A
10 µA
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STD5N20L
Table 6: Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(2) Forward Transconductance VDS = 15 V, I
g
fs
C
C
C
t
d(on)
t
d(off)
Q
Q
Q
iss
oss
rss
t
r
t
f
gs
gd
g
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 100 V, ID = 2.5 A
V
DD
R
= 4.7Ω, V GS = 5V
G
(Resistive Load see Figure 14)
VDD = 160 V, ID = 5 A,
VGS = 5V
= 25V, f = 1 MHz, VGS = 0 242
5 A 6.5 S
D =
44
6
11.5
21.5
14
15.5
5
6n C
1.5
3
pF
pF
pF
ns
ns
ns
ns
nC
nC
Table 7: Source Drain Diode
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
(1) Pulsed: Pulse du rat i on = 300 µs, du ty cycle 1.5 % .
(2) Starting T
(*) Pulse width limited by safe operating area
Source-drain Current 5 A
(*)
Source-drain Current (pulsed) 20 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
=25 ° C, Id = 5 A, VDD = 50 V
j
ISD = 5 A, VGS = 0
= 5 A, di/dt = 100 A/µs,
I
SD
V
= 100 V, Tj = 25°C
DD
(see test circuit, see Figure 15)
= 5 A, di/dt = 100 A/µs,
I
SD
VDD = 100 V, Tj = 150°C
(see test circuit, see Figure 15)
93
237
5.1
97
286
5.9
1.5 V
ns
nC
A
ns
nC
A
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STD5N20L
Figure 3: Safe Operating Area
Figure 4: Output Characteristics
Figure 6: Thermal Impedance
Figure 7: Transfer Characteristics
Figure 5: Transconductance
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Figure 8: Static Drain-source On Resistance
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STD5N20L
Figure 9: Gate Charge vs Gate-source Voltag e
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 12: Capacitance Variations
Figure 13: Normal ized On R esistance vs Temperature
Figure 11: S ource-Drain Diode Forw ard Characteristics
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STD5N20L
Figure 14: Switching Times Test Circuit For
Resistive Load
Figure 15: Test Circuit For Inductive Load
Switching and Diode Recovery Times
Figure 16: Gate Charge Test Circuit
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TO-252 (DPAK) MECHANICAL DATA
STD5N20L
DIM.
A 2.20 2.40 0.087 0.094
A1 0.90 1.10 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.90 0.025 0.035
B2 5.20 5.40 0.204 0.213
C 0.45 0.60 0.018 0.024
C2 0.48 0.60 0.019 0.024
D 6.00 6.20 0.236 0.244
E 6.40 6.60 0.252 0.260
G 4.40 4.60 0.173 0.181
H 9.35 10.10 0.368 0.398
L2 0.8 0.031
L4 0.60 1.00 0.024 0.039
V2 0
MIN. TYP. MAX. MIN. TYP. MAX.
o
mm inch
o
8
o
0
o
0
P032P_B
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STD5N20L
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
All dimensions
are in millimeters
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 16.4 18.4 0.645 0.724
N 50 1.968
T 22.4 0.881
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1 12.1 0.476
D 1.5 1.6 0.059 0.063
D1 1.5 0.059
E 1.65 1.85 0.065 0.073
F 7. 4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40 1.574
W 15.7 16.3 0.618 0.641
* on sales type
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
2500 2500
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Table 8: Revision History
Date Revision Description of Change s
08-June-2004 2 New Stylesheet. Datasheet according to PCN DSG-TRA/04/532
20-Sep-2004 3 Changes on Table 3, and on Figure 3.
STD5N20L
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STD5N20L
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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
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