Datasheet std45nf75 Datasheet

Features

Type V

DSS

R

DS(on)

max I

STD45NF75 75 V < 0.024 Ω 40 A

1. Current limited by package

■ 100% avalanche tested

■ Gate charge minimized

Application

■ Switching applications

Description

STD45NF75

N-channel 75 V, 0.018 Ω, 40 A DPAK

STripFET™ II Power MOSFET

D

(1)

3

1

DPAK

This Power MOSFET is the latest development of
STMicroelectronics’s unique "single feature size"
strip-based process. The resulting transistor
shows extremely high packing density for low on­resistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.

Table 1. Device summary

Order code Marking Package Packaging

STD45NF75T4 D45NF75 DPAK Tape and reel

Figure 1. Internal schematic diagram

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May 2009 Doc ID 9902 Rev 5 1/16

www.st.com

16

Contents STD45NF75

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Spice thermal model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2/16 Doc ID 9902 Rev 5

STD45NF75 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

V

I

V

DGR

V

I

D

DM

P

I

DS

GS

(1)

D

(2)

tot

Drain-source voltage (VGS = 0) 75 V

Drain-gate voltage (RGS = 20 kΩ)75V

Gate- source voltage ± 20 V

Drain current (continuous) at TC = 25 °C 40 A

Drain current (continuous) at TC = 100 °C 30 A

Drain current (pulsed) 160 A

Total dissipation at TC = 25 °C 125 W

Derating factor 0.83 W/°C

(3)

dv/dt

E

AS

T

stg

T

(4)

j

Peak diode recovery voltage slope 20 V/ns

Single pulse avalanche energy 500 mJ

Storage temperature

Max. operating junction temperature

1. Current limited by package

2. Pulse width limited by safe operating area.

3. ISD ≤ 40 A, di/dt ≤ 800 A/µs, VDD ≤ V

(BR)DSS

4. Starting Tj = 25 °C, ID = 20 A, VDD = 40 V

Table 3. Thermal data

, Tj ≤ T

-55 to 175 °C

JMAX

Symbol Parameter Value Unit

R

thj-case

R

thj-pcb

T

J

1. for 10 sec. 1.6 mm from case

Thermal resistance junction-case max 1.2 °C/W

Thermal resistance junction-pcb max

Maximum lead temperature for soldering
purpose

(1)

see Figure 16. and

Figure 17.

260 °C

°C/W

Doc ID 9902 Rev 5 3/16

Electrical characteristics STD45NF75

2 Electrical characteristics

(T

=25 °C unless otherwise specified)

CASE

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on)

Drain-source
breakdown voltage

Zero gate voltage
drain current (V

GS

Gate-body leakage
current (V

DS

= 0)

= 0)

ID = 250 µA, VGS =0 75 V

V

= max rating

DS

VDS = max rating,

= 125 °C

T

C

1

10

VGS = ±20 V ±100 nA

Gate threshold voltage VDS = VGS, ID = 250 µA 2 4 V

Static drain-source on
resistance

V

= 10 V, ID = 20 A 0.018 0.024 Ω

GS

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Forward

(1)

g

fs

C

C

C

t

d(on)

t

t

d(off)

t

Q
Q
Q

1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%.

transconductance

Input capacitance

iss

Output capacitance

oss

Reverse transfer

rss

capacitance

Turn-on delay time
Rise time

r

Turn-off delay time
Fall time

f

Total gate charge

g

Gate-source charge

gs

Gate-drain charge

gd

= 25 V, ID= 20 A - 50 S

V

DS

= 25 V, f = 1 MHz,

V

DS

= 0

V

GS

= 37 V, ID = 20 A

V

DD

=4.7 Ω VGS = 10 V

R

G

(see Figure 20)

= 60 V, ID = 40 A,

V

DD

= 10 V, RG=4.7 Ω

V

GS

(see Figure 21)

1760

-

360
140

15

-

40
55
12

60

-

13

80 nC

23

µA
µA

pF
pF
pF

ns
ns
ns
ns

nC
nC

4/16 Doc ID 9902 Rev 5

STD45NF75 Electrical characteristics

Table 6. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

Source-drain current
Source-drain current

(1)

(pulsed)

(2)

Forward on voltage ISD = 40 A, VGS = 0 - 1.5 V

= 40 A, VDD = 30 V,

I

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

SD

di/dt = 100 A/µs,

= 150 °C

T

j

(see Figure 22)

I

SDM

V

I

SD

SD

t

Q

I

RRM

1. Pulse width limited by safe operating area.

2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%

-

40

160

120

-

410

7.5

A
A

ns

nC

A

Doc ID 9902 Rev 5 5/16

Electrical characteristics STD45NF75

0

p

(s)

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance

ID

(A)

100

DS(on)

Operation in this area is

10

Limited by max R

Tj=150°C

1

Tc=25°C

Sinlge
pulse

0.1

0.1

1

10

AM03943v1

100µs

1ms

10ms

V

DS(V)

10

10

K

-1

-2

10

δ=0.5

0.2

0.1

0.01

Single pulse

-5

10

0.05

-3

Zth=k Rthj-c

δ=tp/τ

-2

10

tp

τ

-1

10

0.02

-4

1

Figure 4. Output characteristics Figure 5. Transfer characteristics

280dpg

t

Figure 6. Transconductance Figure 7. Static drain-source on resistance

6/16 Doc ID 9902 Rev 5

STD45NF75 Electrical characteristics

Figure 8. Gate charge vs. gate-source

voltage

Figure 10. Normalized gate threshold voltage

vs. temperature

Figure 9. Capacitance variations

Figure 11. Normalized on resistance vs.

temperature

Figure 12. Source-drain diode forward

characteristics

Figure 13. Normalized breakdown voltage vs.

temperature

Doc ID 9902 Rev 5 7/16

Electrical characteristics STD45NF75

Figure 14. Power derating vs. Tj Figure 15. Max Id current vs. Tc

Figure 16. Thermal resistance Rthj-a vs. pcb

copper area

Figure 17. Max power dissipation vs. pcb

copper area

8/16 Doc ID 9902 Rev 5

STD45NF75 Electrical characteristics

Figure 18. Allowable Iav vs. time in avalanche

The previous curve gives the safe operating area for unclamped inductive loads, single
pulse or repetitive, under the following conditions:

P

D(AVE)

E

AS(AR)

= 0.5 * (1.3 * B

= P

D(AVE)

* t

AV

VDSS

* IAV)

Where:

I

is the allowable current in avalanche

AV

P

t

AV

To de rate above 25 °C, at fixed I

I

AV

is the average power dissipation in avalanche (single pulse)

D(AVE)

is the time in avalanche

, the following equation must be applied:

AV

= 2 * (T

jmax

- T

CASE

)/ (1.3 * B

VDSS

* Zth)

Where:

Z

= K * Rth is the value coming from normalized thermal response at fixed pulse width

th

equal to T

AV

.

Doc ID 9902 Rev 5 9/16

Spice thermal model STD45NF75

3 Spice thermal model

Table 7. Spice parameter

Parameter Node Value

CTHERM1 7 - 6 6 * 10

CTHERM2 6 - 5 8 * 10

CTHERM3 5 - 4 2 * 10

CTHERM4 4 - 3 6 * 10

CTHERM5 3 - 2 9.65 * 10

CTHERM6 2 - 1 6 * 10

RTHERM1 7 - 6 0.045

RTHERM2 6 - 5 0.105

RTHERM3 5 - 4 0.150

RTHERM4 4 - 3 0.225

-4

-3

-2

-2

-2

-1

RTHERM5 3 - 2 0.375

RTHERM6 2 - 1 0.600

Figure 19. Thermal network

10/16 Doc ID 9902 Rev 5

STD45NF75 Test circuits

4 Test circuits

Figure 20. Switching times test circuit for

PW

resistive load

VGS

VD

RG

RL

D.U.T.

2200

µF

3.3

µF

AM01468v1

V

DD

Figure 22. Test circuit for inductive load

G

25

Ω

switching and diode recovery times

A

D

D.U. T.

S

B

R

FAST
DIODE

G

A

A

L=100µH

B

B

D

G

S

3.3

µF

1000

µF

V

DD

Figure 21. Gate charge test circuit

V

i=20V=VGMAX

PW

2200
µF

1kΩ

12V

IG=CONST

2.7kΩ

47kΩ

47kΩ

100Ω

100nF

D.U.T.

AM01469v1

Figure 23. Unclamped inductive load test

circuit

L

VD

ID

Vi

D.U. T.

2200

µF

3.3

µF

1kΩ

VDD

V

VDD

G

Pw

AM01470v1

Figure 24. Unclamped inductive waveform Figure 25. Switching time waveform

V(BR)DSS

VD

IDM

ID

VDD

0

VDD

AM01472v1

0

Doc ID 9902 Rev 5 11/16

10%

tdon

ton

90%

tr

10%

V

GS

VDS

90%

tdoff

AM01471v1

toff

tf

90%

10%

AM01473v1

Package mechanical data STD45NF75

5 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

12/16 Doc ID 9902 Rev 5

STD45NF75 Package mechanical data

TO-252 (DPAK) mechanical data

DIM.

V2 0

mm.

.xampyt.nim

04.202.2A

01.109.01A

32.030.02A

09.046.0b

04.502.54b

06.054.0c

06.084.02c

02.600.6D

01.51D

.6E

06.604

07.41E

82.2e

06.404.41e

01.0153.9H

1L

08.21L

08.02L

106.04L

02.0R

o

o

8

0068772_G

Doc ID 9902 Rev 5 13/16

Packing mechanical data STD45NF75

6 Packing mechanical data

DPAK FOOTPRINT

All dimensions are in millimeters

TAPE AND REEL SHIPMENT

REEL MECHANICAL DATA

DIM.

A 330 12.992

B 1.5 0.059

C 12.8 13.2 0.504 0.520

D 20.2 0.795

G 16.4 18.4 0.645 0.724

N 50 1.968

T 22.4 0.881

TAPE MECHANICAL DATA

DIM.

mm inch

MIN. MAX. MIN. MAX.

BASE QTY BULK QTY

A0 6.8 7 0.267 0.275

B0 10.4 10.6 0.409 0.417

B1 12.1 0.476

D 1.5 1.6 0.059 0.063

D1 1.5 0.059

E 1.65 1.85 0.065 0.073

F 7.4 7.6 0.291 0.299

K0 2.55 2.75 0.100 0.108

P0 3.9 4.1 0.153 0.161

P1 7.9 8.1 0.311 0.319

P2 1.9 2.1 0.075 0.082

R 40 1.574

W 15.7 16.3 0.618 0.641

mm inch

MIN. MAX. MIN. MAX.

2500 2500

14/16 Doc ID 9902 Rev 5

STD45NF75 Revision history

7 Revision history

Table 8. Document revision history

Date Revision Changes

22-Jun-2004 1 Preliminary version

09-Sep-2004 2 Complete version

11-Jul-2006 3 New template, no content change

20-Feb-2007 4 Typo mistake on page 1

20-May-2009 5 Figure 2 and Figure 3 have been updated

Doc ID 9902 Rev 5 15/16

STD45NF75

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16/16 Doc ID 9902 Rev 5