Page 1
STripFET™ VI DeepGATE™ Power MOSFET
DPAK
Features
Order code V
STD44N4LF6 40 V 12.5 mΩ 44 A
■ 100% avalanche tested
■ Logic level drive
Application
■ Switching applications
■ Automotive
DSS
R
DS(on)
max I
STD44N4LF6
N-channel 40 V, 8.9 mΩ, 44 A DPAK
D
3
1
Description
This product utilizes the 6
rules of ST’s proprietary STripFET™ technology,
with a new gate structure.The resulting Power
MOSFET exhibits the lowest R
package.
Table 1. Device summary
Order code Marking Package Packaging
STD44N4LF6 44N4LF6 DPAK Tape and reel
th
generation of design
in a standard
DS(on)
Figure 1. Internal schematic diagram
$4!"OR
'
3
!-V
February 2011 Doc ID 17171 Rev 2 1/15
www.st.com
15
Page 2
Contents STD44N4LF6
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15 Doc ID 17171 Rev 2
Page 3
STD44N4LF6 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
I
DM
P
V
V
I
I
TOT
Drain-source voltage (V
DS
Gate-source voltage ± 20 V
GS
Drain current (continuous) at TC = 25 °C 44 A
D
Drain current (continuous) at TC = 100 °C 31 A
D
(1)
Drain current (pulsed) 176 A
= 0) 40 V
GS
Total dissipation at TC = 25 °C 50 W
Derating factor 0.33 W/°C
T
T
1. Pulse is rated according SOA
Storage temperature
stg
Operating junction temperature
j
- 55 to 175 °C
Table 3. Thermal resistance
Symbol Parameter Value Unit
R
thj-case
R
thj-pcb
1. When mounted on 1 inch2, 2 oz Cu.
Thermal resistance junction-case max 3 °C/W
Thermal resistance junction-pcb max
(1)
50 °C/W
Table 4. Avalanche data
Symbol Parameter Value Unit
I
AV
E
AS
1. Starting Tj = 25 °C, ID = IAV, VDD = 24 V
Not-repetitive avalanche current 20 A
(1)
Single pulse avalanche energy 150 mJ
Doc ID 17171 Rev 2 3/15
Page 4
Electrical characteristics STD44N4LF6
2 Electrical characteristics
(T
= 25 °C unless otherwise specified)
CASE
Table 5. Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown
Volt age
Zero gate voltage drain
current (VGS = 0)
Gate body leakage current
= 0)
(V
DS
Gate threshold voltage V
Static drain-source on
resistance
= 250 µA, VGS= 0 40 - V
I
D
= 20 V
V
DS
= 20 V,Tc = 125 °C
V
DS
V
= ± 20 V - ±100 nA
GS
= VGS, ID = 250 µA 1 - 2.5 V
DS
V
= 5 V, ID = 20 A
GS
= 10 V, ID = 20 A
V
GS
-
11.3
8.9
1
10
18
12.5
Table 6. Dynamic
Symbol Parameter Test conditions Min Typ. Max. Unit
C
C
C
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
= 25 V, f=1 MHz,
V
DS
V
= 0 V
GS
1190
-
200
-
110
µA
µA
mΩ
pF
pF
pF
Q
Q
Q
R
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
Intrinsic gate resistance f = 1 MHz open drain - 3.1 - Ω
G
V
= 20 V, ID = 40 A
DD
V
= 10 V
GS
(see Figure 14)
22
-
5
4.3
nC
-
nC
nC
4/15 Doc ID 17171 Rev 2
Page 5
STD44N4LF6 Electrical characteristics
Table 7. Switching on/off (inductive load)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
t
d(off)
Turn-on delay time
t
Rise time
r
Turn-off delay time
t
Fall time
f
= 20 V, ID = 20 A,
V
DD
RG = 4.7 Ω, V
(see Figure 15)
GS
= 10 V
15
65
150
-
110
-
-
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Source-drain current
SD
(1)
Source-drain current (pulsed)
(2)
Forward on voltage I
t
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
= 20 A, V
I
SD
SD
= 40 A,
GS
di/dt = 100 A/µs,
= 32 V, TJ = 150 °C
V
DD
(see Figure 17)
-
44
176AA
= 0 - 1.1 V
27
-
256
2
ns
ns
ns
ns
ns
nC
A
Doc ID 17171 Rev 2 5/15
Page 6
Electrical characteristics STD44N4LF6
I
D
100
10
1
0.1
1
V
DS
(V)
10
(A)
Operation in this area is
Limited by max R
DS(on)
100µs
1ms
10ms
Tj=175°C
Tc=25°C
Single pulse
AM08903v1
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
10
-2
10
-1
K
0.2
0.05
0.02
0.01
0.1
Single pulse
δ=0.5
280DPB
I
D
60
40
20
0
0
2
V
DS
(V)
(A)
1
3
80
100
5V
6V
3V
VGS=10V
4V
120
140
160
180
AM08904v1
I
D
60
40
20
0
0
4
V
GS
(V)
8
(A)
2
6
80
100
120
140
160
180
V
DS
=4V
AM08905v1
BV
DSS
TJ(°C)
(norm)
-25
75
25
125
0.90
0.95
1.00
1.05
1.10
-75
I
D
=1mA
AM08906v1
R
DS(on)
8.0
7.5
7.0
0
20
I
D
(A)
(mΩ)
10
30
8.5
9.0
9.5
VGS=10V
40
AM08907v1
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized B
vs temperature Figure 7. Static drain-source on resistance
VDSS
6/15 Doc ID 17171 Rev 2
Page 7
STD44N4LF6 Electrical characteristics
V
GS
6
4
2
0
0
5
Q
g
(nC)
(V)
20
8
10
15
10
VDD=20V
I
D
=40A
25
12
AM08908v1
C
1000
100
10
0
20
V
DS
(V)
(pF)
10
30
Ciss
Coss
Crss
AM08909v1
V
GS(th)
0.6
0.4
0.2
0
T
J
(°C)
(norm)
-25
0.8
75
25
125
-75
1.0
1.2
I
D
=250µA
AM08910v1
R
DS(on)
2.0
1.5
1.0
0.5
-75
T
J
(°C)
(norm)
-25
75
25
125
0
I
D
=20A
V
GS
=10V
AM08911v1
V
SD
0
10
I
SD
(A)
(V)
5
25
15
20
0
0.2
0.4
0.6
0.8
1.0
TJ=-55°C
TJ=175°C
TJ=25°C
40
30
35
AM08912v1
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 12. Source-drain diode forward
characteristics
Figure 11. Normalized on resistance vs
temperature
Doc ID 17171 Rev 2 7/15
Page 8
Test circuits STD44N4LF6
AM01468v1
VGS
PW
VD
RG
RL
D.U.T.
2200
μF
3.3
μF
V
DD
AM01469v1
VDD
47kΩ
1kΩ
47kΩ
2.7kΩ
1kΩ
12V
V
i=20V=VGMAX
2200
μF
PW
IG=CONST
100Ω
100nF
D.U.T.
V
G
AM01470v1
A
D
D.U. T.
S
B
G
25
Ω
A
A
B
B
R
G
G
FAST
DIODE
D
S
L=100μH
μF
3.3
1000
μF
V
DD
AM01471v1
Vi
Pw
VD
ID
D.U. T.
L
2200
μF
3.3
μF
VDD
AM01472v1
V(BR)DSS
VDD
VDD
VD
IDM
ID
AM01473v1
VDS
ton
tdon
tdoff
toff
tf
tr
90%
10%
10%
0
0
90%
90%
10%
V
GS
3 Test circuits
Figure 13. Switching times test circuit for
resistive load
Figure 15. Test circuit for inductive load
switching and diode recovery times
Figure 14. Gate charge test circuit
Figure 16. Unclamped inductive load test
circuit
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
8/15 Doc ID 17171 Rev 2
Page 9
STD44N4LF6 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and products status are available at: www.st.com.
ECOPACK is an ST trademark.
Doc ID 17171 Rev 2 9/15
Page 10
Package mechanical data STD44N4LF6
Table 9. DPAK (TO-252) mechanical data
mm
Dim.
Min. Typ. Max.
A 2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
b 0.64 0.90
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 5.10
E 6.40 6.60
E1 4.70
e2.28
e1 4.40 4.60
H9.35 10.10
L1
L1 2.80
L2 0.80
L4 0.60 1
R0.20
V2 0° 8°
10/15 Doc ID 17171 Rev 2
Page 11
STD44N4LF6 Package mechanical data
Figure 19. DPAK (TO-252) drawing
0068772_G
Doc ID 17171 Rev 2 11/15
Page 12
Packaging mechanical data STD44N4LF6
5 Packaging mechanical data
Table 10. DPAK (TO-252) tape and reel mechanical data
Tape Reel
Dim.
mm
Dim.
mm
Min. Max. Min. Max.
A0 6.8 7 A 330
B0 10.4 10.6 B 1.5
B1 12.1 C 12.8 13.2
D1.5 1.6D20.2
D1 1.5 G 16.4 18.4
E 1.65 1.85 N 50
F 7.4 7.6 T 22.4
K0 2.55 2.75
P0 3.9 4.1 Base qty. 2500
P1 7.9 8.1 Bulk qty. 2500
P2 1.9 2.1
R40
T 0.25 0.35
W 15.7 16.3
Figure 20. DPAK footprint
(a)
6.7
1.8
3
1.6
6.7
a. All dimension are in millimeters
12/15 Doc ID 17171 Rev 2
1.6
2.3
2.3
AM08850v1
Page 13
STD44N4LF6 Packaging mechanical data
P1
A0
D1
P0
F
W
E
D
B0
K0
T
User direction of feed
P2
10 pitches cumulative
tolerance on tape +/- 0.2 mm
User direction of feed
R
Bending radius
B1
For machine ref. only
including draft and
radii concentric around B0
AM08852v1
Top cover
tape
A
D
B
Full radius
G measured at hub
C
N
REEL DIMENSIONS
40mm min.
Access hole
At slot location
T
Tape slot
in core for
tape start 25 mm min.
width
AM08851v2
Figure 21. Tape for DPAK (TO-252)
Figure 22. Reel for DPAK (TO-252)
Doc ID 17171 Rev 2 13/15
Page 14
Revision history STD44N4LF6
6 Revision history
Table 11. Document revision history
Date Revision Changes
23-Feb-2010 1 First release.
03-Feb-2011 2 Document status promoted from preliminary data to datasheet.
14/15 Doc ID 17171 Rev 2
Page 15
STD44N4LF6
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Doc ID 17171 Rev 2 15/15
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