Page 1
1/9February 2001
STD1HNC60
N-CHANNEL 600V - 4Ω - 2A - IPAK/DPAK
PowerMesh™II MOSFET
■ TYPICAL R
DS
(on) = 4 Ω
■ EXTREMELY HIGH dv /d t C APABILITY
■ 100% AVALANCHE TESTED
■ NEW HIGH VOLTAGE BENCHMARK
■ GATE CHARGE MINIMIZED
DESCRIPTION
The PowerMESH
™II is the evolution of the first
generation of MESH OVERLAY
™. The layout re-
finements introduced greatly improve the Ron*area
figure of merit while keeping the device at the lea ding edge for what concerns swithing speed, gate
charge and ruggedness.
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLI ES ( SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVER
ABSOLUTE MAXIMUM RATINGS
(•)Pu l se width limite d by safe operat i ng area
.
TYPE V
DSS
R
DS(on)
I
D
STD1HNC60 600 V < 5
Ω
2 A
Symbol Parameter Value Unit
V
DS
Drain-source Voltage (VGS = 0)
600 V
V
DGR
Drain-gate Voltage (RGS = 20 kΩ)
600 V
V
GS
Gate- source Voltage ±30 V
I
D
Drain Current (continuos) at TC = 25°C
2A
I
D
Drain Current (continuos) at TC = 100°C
1.3 A
I
DM
(1)
Drain Current (pulsed) 8 A
P
TOT
Total Dissipation at TC = 25°C
50 W
Derating Factor 0.4 W/°C
dv/dt Peak Diode Recovery voltage slope 3.5 V/ns
T
stg
Storage Temperature –65 to 150 °C
T
j
Max. Operating Junction Temperature 150 °C
(1)ISD ≤ 2A, di/dt ≤100A/µs, VDD ≤ V
(BR)DSS
, Tj ≤ T
JMAX
IPAK
3
2
1
1
3
DPAK
TO-251 TO-252
INTERNAL SCHEMATIC DIAGRAM
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STD1HNC60
2/9
THERMA L D ATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON
(1)
DYNAMIC
Rthj-case Thermal Resistance Junction-case Max 2.5 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W
Rthj-sink Thermal Resistance case-sink Typ 1.5 °C/W
T
l
Maximum Lead Temperature For Soldering Purpose 275 °C
Symbol Parameter Max Value Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
2A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, ID = IAR, VDD = 50 V)
120 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0 600
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
1µA
V
DS
= Max Rating, TC = 125 °C
50 µA
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= ±30V ±100 nA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
Gate Threshold Voltage
V
DS
= VGS, ID = 250µA
234V
R
DS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 1 A
45
Ω
I
D(on)
On State Drain Current VDS > I
D(on)
x R
DS(on)max,
VGS=10V
2A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
g
fs
(1) Forward Transconductance VDS > I
D(on)
x R
DS(on)max,
ID=1A
2S
C
iss
Input Capacitance
V
DS
= 25V, f = 1 MHz, VGS = 0
228 pF
C
oss
Output Capacitance 40 pF
C
rss
Reverse Transfer
Capacitance
6pF
Page 3
3/9
STD1HNC60
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pu l se duration = 300 µs, duty cycle 1.5 %.
2. Pulse width li mited by safe operating area .
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 300V, ID = 1 A
RG= 4.7Ω VGS = 10V
(see test circuit, Figure 3)
9
8.5
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 480V, ID = 2 A,
VGS = 10V
11.3
2.8
5
15.5 nC
nC
nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 480V, ID = 2 A,
RG=4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
18
9
27
ns
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
Source-drain Current 2 A
I
SDM
(2)
Source-drain Current (pulsed) 8 A
VSD (1)
Forward On Voltage
ISD = 2 A, VGS = 0
1.6 V
t
rr
Reverse Recovery Time
I
SD
= 2A, di/dt = 100A/µs, VDD
= 100V, Tj = 150°C
(see test circuit, Figure 5)
480 ns
Q
rr
Reverse Recovery Charge 1032 nC
I
RRM
Reverse Recovery Current 4.3 A
Safe Operating Area Thermal Impedence
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STD1HNC60
4/9
Gate Charge vs Gate-source Voltage
Transconductance Static Drain-source On Resistance
Transfer Characteristics
Output Characteristics
Capacitance Variations
Page 5
5/9
STD1HNC60
Normalized On Resistance vs Temperatur eNormalized Gate Threshold Voltage vs
Temperature
Source-drain Diode Forw ard Ch aracteristi cs
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STD1HNC60
6/9
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Page 7
7/9
STD1HNC60
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.20 2.40 0.087 0.094
A1 0.90 1.10 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.90 0.025 0.035
B2 5.20 5.40 0.204 0.213
C 0.45 0.60 0.018 0.024
C2 0.48 0.60 0.019 0.024
D 6.00 6.20 0.236 0.244
E 6.40 6.60 0.252 0.260
G 4.40 4.60 0.173 0.181
H 9.35 10.10 0.368 0.398
L2 0.8 0.031
L4 0.60 1.00 0.024 0.039
V2 0
o
8
o
0
o
0
o
P032P_B
TO-252 (DPAK) MECHANICAL DATA
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STD1HNC60
8/9
DIM.
mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370
L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039
A
C2
C
A3
H
A1
D
L
L2
L1
1 3
= =
B3
B
B6
B2
E
G
= =
= =
B5
2
TO-251 (IPAK) MECHANICAL DAT A
0068771-E
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9/9
STD1HNC60
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of use of such informa tion n or for an y infring ement of patent s or other rig hts of third part ies which may resu lt from its use . No l i cen se i s
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