Datasheet stb95n4lf3_std95n4lf3 Datasheet

Page 1
N-channel 40 V, 5.0 mΩ, 80 A DPAK, D2PA K
R
Type V
DSS
DS(on)
max
STD95N4LF3 40 V < 6.0 mΩ 80 A
(2)
STB95N4LF3
1. Value limited by wire bonding
2. All data which refers solely to the D²PAK package is preliminary
■ 100% avalanche tested
■ Logic level drive
40 V < 6.0 mΩ 80 A 110 W
Applications
I
D
(1)
110 W
STB95N4LF3 STD95N4LF3
STripFET™ III Power MOSFET
P
D
D²PAK
3
1
3
1
DPAK
■ Switching application
– Automotive
Description
This STripFET™ III Power MOSFET technology is among the latest improvements, which have been especially tailored to minimize on-state resistance providing superior switching performance.
Table 1. Device summary
Order codes Marking Package Packaging
STD95N4LF3 95N4LF3 DPAK Tape and reel
STB95N4LF3 95N4LF3 D²PAK Tape and reel

Figure 1. Internal schematic diagram

D (TAB or 2)
G(1)
S(3)
AM01474v1
July 2009 Doc ID 15372 Rev 2 1/16
www.st.com
16
Page 2
Contents STD95N4LF3
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5 Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/16 Doc ID 15372 Rev 2
Page 3
STD95N4LF3 Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
I
V
V
I
D
DM
P
I
TOT
Drain-source voltage (VGS = 0) 40 V
DS
Gate-source voltage ± 16 V
GS
(1)
Drain current (continuous) at TC = 25 °C 80 A
Drain current (continuous) at TC = 100 °C 65 A
D
(2)
Drain current (pulsed) 320 A
Total dissipation at TC = 25 °C 110 W
Derating factor 0.73 W/°C
(3)
dv/dt
E
AS
T
T
Peak diode recovery voltage slope 8 V/ns
(4)
Single pulse avalanche energy 400 mJ
Operating junction temperature
j
Storage temperature
stg
-55 to 175 °C
1. Value limited by wire bonding
2. Pulse width limited by safe operating area
3. ISD ≤ 80 A, di/dt ≤ 40 A/µs, V
DS
≤ V
(BR)DSS
, TJ ≤ T
JMAX
4. Starting TJ = 25 °C, ID = 40 A, VDD = 35 V Figure 16 and Figure 17

Table 3. Thermal data

Symbol Parameter Value Unit
R
R
thj-pcb
thj-case
Thermal resistance junction-case max 1.36 °C/W
(1)
Thermal resistance junction-pcb max 50 °C/W
1. When mounted on 1inch² FR-4 2Oz Cu board
Doc ID 15372 Rev 2 3/16
Page 4
Electrical characteristics STD95N4LF3

2 Electrical characteristics

(T
= 25 °C unless otherwise specified)
CASE

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on)
Drain-source breakdown voltage
Zero gate voltage drain current (VGS = 0)
Gate-body leakage current (VDS = 0)
ID = 250 µA, VGS =0 40 V
VDS = max rating VDS = max rating @125 °C
10
100µAµA
VGS = ± 16 V ±200 nA
Gate threshold voltage VDS = VGS, ID = 250 µA 1 2.5 V
Static drain-source on resistance
= 10 V, ID = 40 A
V
GS
= 5 V, ID = 40 A
V
GS
5.0 6.0
9.0mΩmΩ

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit
Forward
(1)
g
fs
transconductance
V
= 25 V, ID= 40 A - 150 S
DS
C
C
C
t
d(on)
t
d(off)
Q Q Q
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%.
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
Turn-on delay time
t
Rise time
r
Turn-off delay time
t
Fall time
f
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
= 25 V, f = 1 MHz,
V
DS
VGS = 0
= 20 V, ID = 40 A
V
DD
=4.7 Ω VGS = 10 V
R
G
(see Figure 13 and
Figure 18)
= 20 V, ID = 80 A,
V
DD
VGS = 10 V (see
Figure 14)
2500
-
560
50
7.5
-
45 45 11
50
-
7
70 nC
9.5
pF pF pF
ns ns ns ns
nC nC
4/16 Doc ID 15372 Rev 2
Page 5
STD95N4LF3 Electrical characteristics

Table 6. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit
Source-drain current Source-drain current
(1)
(pulsed)
(2)
Forward on voltage ISD = 80 A, VGS = 0 - 1.5 V
= 80 A, di/dt = 100 A/µs,
I
Reverse recovery time
rr
Reverse recovery charge
rr
Reverse recovery current
SD
VDD = 20 V, Tj = 150 °C (see Figure 15 and
Figure 19)
I
SDM
V
I
SD
Q
I
RRM
SD
t
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
3
80
320AA
ns
nC
A
-
40
-
55
Doc ID 15372 Rev 2 5/16
Page 6
Electrical characteristics STD95N4LF3

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance
I
D
(A)
AM01528v1
100
DS(on)
Operation in this area is
10
Limited by max R
100µs
1ms
10ms
1
J
=175°C
T
C
=25°C
T
Single
0.1
0.1
Figure 4. Output characteristics Figure 5. Transfer characteristics
1
10
ID
(A)
VGS=10V
300
250
200
150
100
50
V
4V
DS
pulse
(V)
AM01529v1
3V
ID
(A)
300
250
200
150
100
50
VDS=10V
AM01530v1
0
1
0
Figure 6. Static drain-source on resistance Figure 7. Normalized B
RDS(on)
3
2
4
6
5
8
9
V
7
DS(V)
AM01532v1
(mΩ)
6.6
VGS=5V
6.4
BV
DSS
(norm)
1.1
0
0
6.2
6.0
1.0
5.8
5.6
5.4
5.2
5.0 I
20
10
30
40
50
60
70
0
80
D(A)
0.9
0.8
-50
6/16 Doc ID 15372 Rev 2
2
4
6
VDSS
50
0
8
V
GS(V)
vs temperature
AM01531v1
T
J
(°C)
150
100
Page 7
STD95N4LF3 Electrical characteristics
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
VGS
(V)
12
10
VDD=20V
V
GS=10V
I
D=80A
8
6
4
2
0
0
10
20
30
40
50
Q
g(nC)
AM01533v1
(pF)
5000
4500
4000
3500
3000
2500
2000
1500 1000
500
C
AM01534v1
f=1MHz VDS=25V V
GS=0
Ciss
Coss
0
Crss
0
5
10
15
20
25
30 35
V
DS(V)
Figure 10. Normalized gate threshold voltage
VGS(th) (norm)
vs temperature
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-50
AM01535v1
T
50
0
100
150
J(°C)
Figure 12. Source-drain diode forward
characteristics
Figure 11. Normalized on resistance vs
temperature
R
DS(on)
(norm)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
-50
50
0
100
150
AM01536v1
T
J
(°C)
Doc ID 15372 Rev 2 7/16
Page 8
Test circuits STD95N4LF3

3 Test circuits

Figure 13. Switching times test circuit for
PW
resistive load
VGS
VD
RG
RL
D.U.T.
2200
µF
3.3 µF
AM01468v1
V
DD
Figure 15. Test circuit for inductive load
G
25
Ω
switching and diode recovery times
A
D
D.U. T.
S
B
G
R
A
FAST DIODE
B
A
L=100µH
B
D
G
S
3.3
µF
1000
µF
V
DD

Figure 14. Gate charge test circuit

V
i=20V=VGMAX
PW
2200 µF
1kΩ
12V
IG=CONST
2.7kΩ
47kΩ
47kΩ
100Ω
100nF
D.U.T.
AM01469v1
Figure 16. Unclamped inductive load test
circuit
L
VD
ID
Vi
D.U. T.
2200
µF
3.3 µF
1kΩ
VDD
V
VDD
G
Pw
AM01470v1

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

V(BR)DSS
VD
IDM
ID
VDD
VDD
AM01472v1
0
0
10%
tdon
ton
90%
tr
10%
V
GS
8/16 Doc ID 15372 Rev 2
VDS
90%
tdoff
AM01471v1
toff
tf
90%
10%
AM01473v1
Page 9
STD95N4LF3 Test circuits

Figure 19. Diode reverse recovery waveform

Doc ID 15372 Rev 2 9/16
Page 10
Package mechanical data STD95N4LF3

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
10/16 Doc ID 15372 Rev 2
Page 11
STD95N4LF3 Package mechanical data
DIM.
mm.
min. typ max.
A 2.20 2.40
A1 0.901.10
A2 0.03 0.23
b 0.64 0.90
b4 5.20 5.40
c 0.45 0.60
c2 0.48 0.60
D 6.00 6.20
D1 5.10
E 6.40 6.60
E1 4.70
e2.28
e1 4.40 4.60
H 9.35 10.10
L1
L1 2.80
L2 0.80
L4 0.60 1
R0.20
V2 0
o
8
o
TO-252 (DPAK) mechanical data
0068772_G
Doc ID 15372 Rev 2 11/16
Page 12
Package mechanical data STD95N4LF3
DPAK (TO-263) mechanical data
Dim
Min Typ Max Min Typ Max
hcnimm
181.0371.006.404.4A
900.0100.032.030.01A
730.0720.039.007.0b
760.0540.007.141.12b
4.0c
420.0710.006.05
350.0840.063.132.12c
863.0253.053.959.8D
592.005.71D
904.0493.004.0101E
433.005.81E
1.045.2e
82.588.41e
802.0291.0
426.0095.058.5151H
601.0990.096.294.21J
011.0090.097.292.2L
550.050.004.172.11L
3.12L
960.0150.057.10
610.04.0R °8°0°8°02V
0079457_M
12/16 Doc ID 15372 Rev 2
Page 13
STD95N4LF3 Packing mechanical data

5 Packing mechanical data

D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C12.8 13.2 0.504 0.520
D 20.2 0795
G 24.4 26.4 0.960 1.039
N 100 3.937
T 30.4 1.197
TAPE MECHANICAL DATA
DIM.
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
A0 10.5 10.7 0.413 0.421
B0 15.7 15.9 0.618 0.626
D 1.5 1.6 0.059 0.063
D1 1.59 1.61 0.062 0.063
E1.651.85 0.065 0.073
F 11. 4 11.6 0.449 0.456
K0 4.8 5.0 0.189 0.197
P0 3.9 4.1 0.153 0.161
P1 11.9 12.1 0.468 0.476
P2 1.9 2.1 0.075 0.082
R 50 1.574
T0.250.35 0.0098 0.0137
W 23.7 24.3 0.933 0.956
mm inch
MIN. MAX. MIN. MAX.
1000 1000
Doc ID 15372 Rev 2 13/16
Page 14
Packing mechanical data STD95N4LF3
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0.059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 16.4 18.4 0.645 0.724
N 50 1.968
T 22.4 0.881
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1 12.1 0.476
D 1.5 1.6 0.059 0.063
D1 1.5 0.059
E 1.65 1.85 0.065 0.073
F 7.4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40 1.574
W 15.7 16.3 0.618 0.641
14/16 Doc ID 15372 Rev 2
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
2500 2500
Page 15
STD95N4LF3 Revision history

6 Revision history

Table 7. Document revision history

Date Revision Changes
11-Feb-2009 1 First release
23-Jul-2009 2 Marking on device summary has been corrected.
Doc ID 15372 Rev 2 15/16
Page 16
STD95N4LF3
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16/16 Doc ID 15372 Rev 2
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