Specificallydesignedfordatastorage
applications, this device integrates two voltage
regulators, each one able to supply 1A and it is
assembled in PPAK, in SPAK and in a new 8-PIN
surface mounting package named DFN 5x 6mm at
8 pins. The first regulator block supplies 1.5V,
1.8V, 2.5V, 2.8V, 3.0V, 3.3V depending on the
SPAK-5L
DFN
PPAK
chosen version. The s ec ond one m ay be fixed to
the same values or adjustable from 1.25V to V
V
that could power several kind of different
DROP
I
micro-controllers. Both outputs are c urrent limited
and over temperature p rotected. It is worth
underlining the very good thermal performance of
the pack ages SPAK and DFN with only 2°C/W of
ThermalResistanceJunctiontoCase.
Applications are HARD DISK, CD/DVD-ROM, CD/
DVD-R/RW, C OMBO (DVD-ROM+CD-R/RW).
(*) Available on request.
(1) For Tube Shipment, change "R" with "-" in the relevant ordering code, DFN is available only in Tape & Reel.
(1)
3/24
Page 4
ST2L05
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
P
I
OSH
T
T
T
LEAD
(*) Storage temperatures > 125°C are only acceptable if the Dual Regulator is soldered to a PCBA.
Absolute Maximum Ratings are those beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
∆V
t
RISE
t
FALL
Operating Input Voltage
I
Power Dissipation
D
Short Circuit Output Current - 3.3 V and adjustable output
Operating Junction Temperature Range
op
Storage Temperature Range
stg
(*)
Lead Temperature (Soldering) 10 Sec.
Input Voltage
I
Input Voltage Ripple
I
Input Voltage Rise Time (from 10% to 90%)
Input Voltage Fall Time (from 10% to 90%)
Adjustable output voltage: bypass with a 4.7µF capacitor to GND
Fixed output voltage: bypass with a 4.7µF capacitor to GND
4/24
Page 5
APPLICATION CIRCUIT OF FIXED/FIXED VERSION
APPLICATION CIRCUIT OF FIXED/ADJ VERSION
ST2L05
NOTE: The regulator is designed to be stable with either tantalum or ceramic capacitors on the input and outputs. The expected values of
the input and output X7R ceramic capacitors are from 4.7µF to 22µF with 4.7µF typical. The input capacitor must be connected within 0.5
inches of theVIterminal. The output capacitors must also be connected within 0.5 inches of output pins VO1andVO2. There is no upper limit
to the size of the in put capacitor (for more details see the Application Hints section).
NOTE: In the Fixed/ADJ version, the adjustable output voltage V
adjustable output voltage V
VO2ADJ (pin2). The voltage divider resistors are: R1connected to VO2and VO2ADJ and R2connected to VO2ADJ and GND. VO2is determined by V
V
O2=VREF
REF,R1,R2
(1+R1/R2)+I
is set by a resistor divider connected between VO2(pin4) and Ground (pin3) with its centre tap connected to
O2
, and I
as follows (for more detailssee the Application Hintssection):
ADJ
ADJR1
is designed to support output voltages from 1.25V to VI-V
O2
DROP
.The
5/24
Page 6
ST2L05
OUTPUT1 AND OUT PUT2 DUAL SPECIFICATION (IO=10mAto1A,TJ= 0 to 125°C, VI=4.5Vto7V,
C
=4.7µF,CO1=CO2=4.7µF, otherwise specified)
I
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
I
T
DT
Quiescent Current (Fixed/ADJ)VI≤ 7VI
GND
Quiescent Current (Fixed/Fixed) VI≤ 7VI
GND
Total Current Limit IO1+I
I
ST
Thermal Shutdown175°C
SHDN
Thermal Shutdown Hysteresis5°C
SHDN
O2
= 5mA to 1A5mA
OUT1,2
= 5mA to 1A7mA
OUT1,2
2A
ELECTRICAL CHARACTERISTICS OF FIXED OUTPUT 1.5V (I
V
Output Voltage 1.5VIO= 5mA to 1A, VI= 4.75 to 5.25V
O
1.471.51.53V
T = 25°C
V
∆V
∆V
V
I
OMIN
e
SVRSupply Voltage
∆V
O
∆VO1/∆VITransient Response
∆V
O
T
Output Voltage 1.5VIO= 5mA to 1A, VI= 4.75 to 5.25V1.4551.51.545V
O
Line RegulationVI= 4.75 to 5.25V, IO= 5mA to 1A15mV
O
Load RegulationVI= 4.75V, IO= 10mA to 1A12mV
O
Dropout Voltage ∆VO= -1% IO= 1A1.3V
D
Current LimitVI= 5.5V1A
I
S
Min Output Current for
regulation
N
RMS Output Noise
(1)(4)
T = 25°C0.003%
VI=5V60dB
Rejection
/∆IOTransient Response
Change of V
load change
(2)(4)
(3)(4)
with step
O
VI=5V, IO= 1mA to 1A, tr≥ 1µs
V
=5V, IO=1Ato1mA, tf≥ 1µs
I
0 to 5V step input, IO= 1mA to 1A,
Change of V
application of V
/∆IOTransient Response Short
OUT1
(3)(4)
I
with
t
≥ 1µs
r
VI=5V, IO= short to IO= 10mA
Circuit Removal
Response
R
Thermal Regulation
S
Temperature Stability
S
Long Term Stability
(3)(4)
(4)
(4)
(4)
IO= 1A, t
= 30ms0.1%/W
PULSE
0.5%
= 125°C0.3%
T
J
0mA
(5)
10
(5)
10
(5)
10
(5)
20
(1000Hrs)
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
Output Voltage 1.8VIO= 5mA to 1A, VI= 4.75 to 5.25V
O
1.7641.81.836V
T = 25°C
Output Voltage 1.8VIO= 5mA to 1A, VI= 4.75 to 5.25V1.7461.81.854V
O
Line RegulationVI= 4.75 to 5.25V, IO= 5mA to 1A15mV
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
Output Voltage 2.5VIO= 5mA to 1A, VI= 4.75 to 5.25V
O
2.452.52.55V
T = 25°C
Output Voltage 2.5VIO= 5mA to 1A, VI= 4.75 to 5.25V2.4252.52.575V
O
Line RegulationVI= 4.75 to 5.25V, IO= 5mA to 1A15mV
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
Output Voltage 2.8VIO= 5mA to 1A, VI= 4.75 to 5.25V
O
2.7442.82.856V
T = 25°C
Output Voltage 2.8VIO= 5mA to 1A, VI= 4.75 to 5.25V2.7162.82.884V
O
Line RegulationVI= 4.75 to 5.25V, IO= 5mA to 1A15mV
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
Output Voltage 3.0VIO= 5mA to 1A, VI= 4.75 to 5.25V
O
2.943.03.06V
T = 25°C
Output Voltage 3.0VIO= 5mA to 1A, VI= 4.75 to 5.25V2.913.03.09V
O
Line RegulationVI= 4.75 to 5.25V, IO= 5mA to 1A15mV
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
Output Voltage 3.3VIO= 5mA to 1A, VI= 4.75 to 5.25V
O
3.2343.33.366V
T = 25°C
Output Voltage 3.3VIO= 5mA to 1A, VI= 4.75 to 5.25V3.23.33.4V
O
Line RegulationVI= 4.75 to 5.25V, IO= 5mA to 1A15mV
NOTE 1: Bandwidth of 10 Hz to 10KHz.
NOTE 2: 120Hz input ripple.
NOTE 3: C
NOTE 4: Guaranteed by design, not tested in production.
NOTE 5: % undershoot or overshoot of V
Reference VoltageIO= 5mA to 1A, VI= 4.75 to 5.25V,
O
1.2251.251.275V
T = 25°C
Reference VoltageIO= 5mA to 1A, VI= 4.75 to 5.25V1.2121.251.287V
O
Line Regulation 2VI= 4.75 to 5.25V, IO= 5mA to 1A0.35%
O2
Load Regulation 2VI= 4.75V, IO= 10mA to 1A0.4%
O2
Dropout Voltage ∆VO= -1% IO= 1A1.3V
D
Current LimitVI= 5.5V1A
I
S
Adjustable Current (sinking)1µA
Adjustable Current Change IO= 10mA to 1A200nA
Min Output Current for
EXTERNAL CAPACITORS
Like any low-dropout regulator, the ST2L05 requires external capacitors for stability. We suggest
soldering both capacitors as close as possible to the relative pins (1, 4 and 5).
INPUT CAPACITOR
An input capacitor, whose va lue is, at least, 2. 2µF is required; the amount of th e input capacitance can be
increased w ithout limit if a good quality t antalum or alu minium capacitor is used.SMD X7R or Y5V ceramic
multilayer capacitors could not ensure stability in any condition because of their variable characteristics
with Frequency and Temperature; the use of this capacitor is strictly related to the use of the output
capacitors. For more details read the “OUTPUT CAPACIT OR SECTION”.The input capacitor must be
located at a distance of not more than 0.5" from the input pin of the dev ice and returned t o a clean analog
ground.
OUTPUT CAPACITOR
The ST2L05 is designed specifically to work with Ceramic and Tantalum capac itors .Special care must be
taken when a Ceramic multilayer c apac it or is used.Due to their characteristics they can sometimes have
an ESR value lower than the minimum required by the ST2L05 and their relatively large capacitance can
12/24
Page 13
ST2L05
change a lot depending on the ambient temperature.The test results of the ST2L05 stability using
multilayer ceramic capacitors sho w that a minimum value of 2.2µF is needed for both regulators. This
value can be increased without limit if the input capacitor value is major or equal to 4.7µF, and up to 10µF
if the input capacitor is minor than 4.7µF.Surf ac e-mountable solid tantalum capacitors offer a good
combination of s mall physical s ize for the capacit anc e value and ES R in the range needed by t he ST2L05.
The test results show good stability for both outputs with values of at least 1µF. The value can be
increased without limit for even better performance such as transient response and noise.
IMPORTANT:
The output capacitor must maintain its ESR in the stable region over the full operating temperature to
assure stability. More over, capacitor tolerance and variations due to temperature must be cons idered to
assure that the minimum amount of capacitance is provided at all times. For this reason, when a C eramic
multilayer capacitor is used, the better choi ce for temperature coefficient is the X7R type, which holds the
capacitance within ±15%. The output capacitor should be located not more than 0 .5" from the output p ins
of the device and returned to a clean analog ground.
ADJUSTABLE REGULATOR
The ST2L05 has a 1.25V reference voltage between the output and the adjust pins (respectively pin 4 and
2). When a resistor R
down to R
to set the overall (VO2to GND) output voltage. Minimum load cu rrent is 2mA max in all
2
temperature conditions.
APPLICATION CIRCUIT
is placed between these two terminals, a constant current flows through R1and
1
V
O=VREF
I
ADJ
(1+R1/R2)+I
ADJR1
is very small (typically 35µA) and constant: in the VOcalculation it can be ignored.
13/24
Page 14
ST2L05
TYPICAL CHARACTERISTICS
Figure1 : Reference Voltage vs Temperature
Figure2 : Reference Line Regulation vs
Temperature
Figure4 : Reference Voltage vs Input Voltage
Figure5 : Dropout Voltage vs Temperature
(Adjustable Output)
Figure3 : Reference Load Regulation vs
Temperature
14/24
Figure6 : Dropout Voltage vs Input Voltage
(Adjustable Output)
Page 15
ST2L05
Figure7 : Minimum Load Current vs
Temperature (Adjustable Output)
Figure8 : Adjust Pin Current vs Temperature
(Adjustable Output)
Figure10 : Line Regulation vs Temperature
Figure11 : Load Regulation vs Temperature
Figure9 : Output Voltage vs Temperature
Figure12 : Output Voltage vs Input Vol tage
15/24
Page 16
ST2L05
Figure13 : Dropout Voltage vs Temperat ure
(Fixed Output)
Figure14 : Dropout Voltage vs Input Voltage
Figure16 : Supply Voltage Rejection vs
Frequency
Figure17 : Quiescen t Current vs Temperature
(Fixed/ADJ Version)
Figure15 : Supply Voltage Rejection vs
Temperature
16/24
Figure18 : Quiescen t Current vs Temperature
(Fixed/Fixed Version)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use o f suc h info rmat ion n or for any in fring ement of paten ts or oth er ri ghts of th ird p arties which may resul t f rom
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
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