Datasheet SP489ACP, SP489ACT, SP489AEP, SP489AET, SP488ACP Datasheet (Sipex Corporation)

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®
SP488A and SP489A
High Speed Quad
RS-485/RS-422 Line Receivers
High Speed Versions of Sipex's SP488 & SP489
30Mbps Transmission Rates
Quad Differential Line Receivers
RS-485 or RS-422 Applications
30ns Typical Receiver Propagation
Delays
–7V to +12V Common Mode Input Range
1mA Supply Current
Single +5V Supply Operation
Pin Compatible with SN75173,
SN75175, LTC488 and LTC489
DESCRIPTION…
The SP488A and SP489A are high speed quad differential line receivers capable of meeting the RS-485 and RS-422 protocols while running at five times the normal transmission rates. The SP488A and SP489A are enhanced versions of Sipex's SP488 and SP489 quad RS-485/RS-422 line receivers. The SP488A features a common receiver enable control; the SP489A provides independent receiver enable controls for each pair of receivers. Both feature tri–state outputs and wide common–mode input range. The receivers have a fail–safe feature which forces a logic “1” output when receiver inputs are left floating. Both are available in 16–pin plastic DIP and SOIC packages.
16
RI1B
RI
RO
RO
RI2A
RI
GND
RI1B
RI
RO
RO
RI2A
RI
GND
1
2
A
1
3
1
4
2
5
2
6
7
B
2
8
1
2
SP489A
4
3
16
1
2
A
1
1
EN
2
B
2
1
3
4
5
2
6
7
8
SP488A
4
3
V
CC
15
RI4B
14
RI
A
4
RO
EN
RO
RI3A
RI
EN1/EN
4
3
B
3
13
12
11
10
9
V
CC
15
RI4B
14
RI
A
4
13
RO
4
12
EN3/EN
4
11
RO
3
10
RI3A
9
RI
B
3
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
VCC............................................................................................ +7V
Input Voltages
Logic ............................................................. –0.5V to (VCC +0.5V)
Receiver ............................................................................... ±14V
Receiver Output Voltage ................................. –0.5V to (VCC +0.5V)
Input Currents
Logic .................................................................................. ±25mA
Storage Temperature ............................................–65°C to +150°C
Power Dissipation
Plastic DIP ........................................................................ 375mW
(derate 7mW/°C above +70°C)
Small Outline .................................................................... 375mW
(derate 7mW/°C above +70°C)
Lead Temperature (soldering, 10 sec) ................................... 300°C
SPECIFICATIONS
VCC = 5V±5%; typicals at 25°C; T
PARAMETER MIN. TYP. MAX. UNIT CONDITIONS DC CHARACTERISTICS
Digital Inputs EN, EN, EN1/EN2, EN3/EN Voltage
V
IL
V
IH
Input Current ±2 µA 0V VIN V
TA T
MIN
unless otherwise noted.
MAX
0.8 Volts
2.0 Volts
CC
4
RECEIVER INPUTS
Input Resistance 12 kOhm –7V VCM 12V Differential Input Threshold -0.2 +0.2 Volts –7V VCM 12V Input Current (A, B) VCC = 0V or 5.25V; I
+1.0 mA VIN = +12V
IN2
-0.8 mA VIN = –7V
Maximum Data Rate 30 Mbps
RECEIVER OUTPUTS
Output Voltage
V
OH
V
OL
High Impedance Output Current +1 µA EN = O, EN = V
3.5 V IO = –4mA; VID = +0.2V
0.4 V IO = +4mA; VID = –0.2V
, EN1/EN2 = O,
/EN4 = O, 0.4V VO 2.4V
EN
3
CC
POWER REQUIREMENTS
Supply Voltage 4.75 5.25 Volts Supply Current TBD mA No load
ENVIRONMENTAL AND MECHANICAL
Operating Temperature
–C 0 +70 °C
–E -40 +85 °C Storage Temperature -65 +150 °C Package
–_P 16–pin Plastic DIP
–_T 16–pin SOIC
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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AC PARAMETERS
VCC = 5V±5%; typicals at 25°C; 0°C TA +70°C unless otherwise noted.
PARAMETER MIN. TYP. MAX. UNIT CONDITIONS PROPAGATION DELAY
Receiver Input to Output CL = 15pF;
Low to HIGH (t
High to LOW (t Differential Receiver Skew (t Receiver Rise Time (tR) 10% to 90%
SP488A TBD ns
SP489A TBD ns Receiver Fall Time (tF) 90% to 10%
SP488A TBD ns
SP489A TBD ns
RECEIVER ENABLE
To Output HIGH TBD ns CL = 15pF; To Output LOW TBD ns CL = 15pF;
RECEIVER DISABLE
From Output LOW TBD ns CL = 15pF; From Output HIGH TBD ns CL = 15pF;
) TBD ns
PLH
) TBD ns
PHL
) TBD ns
SKD
(S2 closed) (S1 closed)
(S1 closed) (S2 closed)
Figure 1, 3
Figures 2 and 4
Figures 2 and 4
Figures 2 and 4 Figures 2 and 4
+V
RO
EN
RO
RO
–V
OD OD
t
PHL
V
OH
V
OL
3V 0V
t
ZL
5V
V
OL
t
ZH
V
OH
0V
Input A–B
Figure 1. Receiver Propagation Delays
Figure 2. Receiver Enable/Disable Timing
F = 1MHZ: tr < 10ns: tf < 10ns
0V 0V
t
PLH
1.5V
F = 1MHZ: t
< 10ns: tf < 10ns
r
1.5V 1.5V t
LZ
1.5V Output normally low
t
HZ
Output normally high
1.5V
1.5V
0.5V
0.5V
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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PINOUT
RI1B
RI
RO
RO
RI2A
RI
GND
1
A
2
1
1
EN
2
B
2
1
3
4
5
2
6
7
8
SP488A
16
V
CC
RI4B
15
RI
A
14
4
3
4
RO
13
4
12
EN
11
RO
3
10
RI3A
9
RI
B
3
SP488A PINOUT
Pin 1 — RI1B — Receiver 1 input B. Pin 2 — RI1A
Receiver 1 input A.
Pin 3 — RO1 — Receiver 1 Output — If Re­ceiver 1 output is enabled, if RI1A > RI1B by 200mV, Receiver output is high. If Receiver 1 output is enabled, and if RI1A < RI1B by 200mV, Receiver 1 output is low.
RI1B
RI
RO
EN1/EN
RO
RI2A
RI
GND
1
2
A
1
1
2
2
B
2
1
3
4
5
2
6
7
8
SP489A
16
V
CC
15
RI4B
14
A
4
3
RI
4
13
RO
4
12
EN3/EN
11
RO
3
10
RI3A
9
B
RI
3
Pin 9 — RI3B — Receiver 3 input B. Pin 10 — RI3A — Receiver 3 input A. Pin 11 — RO3 — Receiver 3 Output — If
Receiver 3 output is enabled, if RI3A > RI3B by 200mV, Receiver 3 output is high. If Receiver 3 output is enabled, and if RI3A < RI3B by 200mV, Receiver 3 output is low.
4
Pin 4 — EN — Receiver Output Enable. Please refer to SP488A Truth Table (1).
Pin 5 — RO2 — Receiver 2 Output — If Re­ceiver 2 output is enabled, if RI2A > RI2B by 200mV, Receiver 2 output is high. If Receiver 2 output is enabled, and if RI2A < RI2B by 200mV, Receiver 2 output is low.
Pin 6 — RI2A — Receiver 2 input A. Pin 7 — RI2B — Receiver 2 input B. Pin 8 — GND — Digital Ground.
Pin 12 — EN — Receiver Output Enable. Please refer to SP488A Truth Table (1).
Pin 13 — RO4 — Receiver 4 Output — If Receiver 4 output is enabled, if RI4A > RI4B by 200mV, Receiver 4 output is high. If Receiver 4 output is enabled, and if RI4A < RI4B by 200mV, Receiver 4 output is low.
Pin 14 — RI4A — Receiver 4 input A. Pin 15 — RI4B — Receiver 4 input B. Pin 16 — Supply Voltage VCC — 4.75V VCC
5.25V.
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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A
DRIVER RCVR
DI
B
1/4 SP486 1/4 SP488
54
50pF
50pF
EN
EN
ROn C
L
RCVR
S
1
1k
V
C
L
1k
S
2
CC
Figure 3. Timing Test Circuit
SP489A PINOUT
Pin 1 — RI1B — Receiver 1 input B. Pin 2 — RI1A — Receiver 1 input A. Pin 3 — RO1 — Receiver 1 Output — If Re-
ceiver 1 output is enabled, if RI 200mV, Receiver output is high. If Receiver 1
> RI1B by
1A
output is enabled, and if RI1A < RI1B by 200mV, Receiver 1 output is low.
Pin 4 — EN1/EN2 — Receiver 1 and 2 Output Enable. Please refer to SP489A Truth Table (2).
Pin 5 — RO2 — Receiver 2 Output — If Re­ceiver 2 output is enabled, if RI2A > RI2B by 200mV, Receiver 2 output is high. If Receiver 2 output is enabled, and if RI2A < RI2B by 200mV, Receiver 2 output is low.
Figure 4. Enable/Disable Timing Test Circuit
Pin 9 — RI3B — Receiver 3 input B. Pin 10 — RI3A — Receiver 3 input A. Pin 11 — RO3 — Receiver 3 Output — If
Receiver 3 output is enabled, if RI3A > RI3B by 200mV, Receiver 3 output is high. If Receiver 3 output is enabled, and if RI3A < RI3B by 200mV, Receiver 3 output is low.
Pin 12 — EN3/EN4 — Receiver 3 and 4 Output Enable. Please refer to SP489A Truth Table (2).
Pin 13 — RO4 — Receiver 4 Output — If Receiver 4 output is enabled, if RI4A > RI4B by 200mV, Receiver 4 output is high. If Receiver 4 output is enabled, and if RI4A < RI4B by 200mV, Receiver 4 output is low.
Pin 6 — RI2A — Receiver 2 input A. Pin 7 — RI2B — Receiver 2 input B. Pin 8 — GND — Digital Ground.
Pin 14 — RI4A — Receiver 4 input A. Pin 15 — RI4B — Receiver 4 input B. Pin 16 — Supply Voltage VCC — 4.75V VCC
5.25V.
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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DIFFERENTIAL ENABLES OUTPUT
A – B EN EN RO
V
0.2V H X H
ID
–0.2V < VID < +0.2V H X X
V
0.2V H X L
ID
X L H Hi–Z
Table 1. SP488A Truth Table
XLH
XLX
XLL
FEATURES…
The SP488A and SP489A are low–power quad differential line receivers meeting RS-485 and RS-422 serial protocol. The SP488A and SP489A feature Sipex's BiCMOS process allowing low power operational characteristics of CMOS technology while meeting all of the demands of the RS-485 and RS-422 serial protocols over 10Mbps under load in harsh environments. In fact, the SP488A and SP489A can transmit signals up to 30Mbps.
The RS-485 standard is ideal for multi-drop applications and for long-distance communica­tion. RS-485 allows up to 32 drivers and 32 receivers to be connected to a data bus, making it an ideal choice for multi-drop applications. Since the cabling can be as long as 4,000 feet, RS-485 transceivers are equipped with a wide (-7V to +12V) common mode range to accommodate ground potential differences. Because RS-485 is a differential interface, data is virtually immune to noise in the transmission line.
DIFFERENTIAL ENABLES OUTPUT
A – B EN
VID 0.2V H H
–0.2V < VID < +0.2V H X
VID 0.2V H L
X L Hi–Z
Table 2. SP489A Truth Table
/EN2 or EN3/EN
1
RO
4
Normally an RS-485 driver will produce no less than 1.5V before cable attenuation. After cable loss, the signal may degrade and have an amplitude of less than 1.0V. The receiver input sensitivity of the SP488A and SP489A allows the devices to receive signals as low as 200mV.
The SP488A features active high and active low common receiver enable controls; the SP489A provides independent, active high receiver enable controls for each pair of receivers. Both feature tri–state outputs and a -7V to +12V common–mode input range permitting a ±7V ground difference between devices on the communications bus. The SP488A/489A are equipped with a fail–safe feature which forces a logic high at the receiver output when the input is left floating. Both are available in 16-pin plastic DIP and SOIC packages.
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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ORDERING INFORMATION
Quad RS485 Receivers:
Model ........................ Enable/Disable ......................................Temperature Range........................ Package
SP488ACP ............... Common; active Low and Active High ..0°C to +70°C ....................16–pin Plastic DIP
SP488ACT................Common; active Low and Active High .. 0°C to +70°C.............................16–pin SOIC
SP488AEP................Common; active Low and Active High .. –40°C to +85°C................16–pin Plastic DIP
SP488AET................ Common; active Low and Active High ..–40°C to +85°C ......................... 16–pin SOIC
SP489ACP ............... One per driver pair; active High ............ 0°C to +70°C ....................16–pin Plastic DIP
SP489ACT................One per driver pair; active High ............0°C to +70°C ............................. 16–pin SOIC
SP489AEP................One per driver pair; active High ............–40°C to +85°C................16–pin Plastic DIP
SP489AET................ One per driver pair; active High ............ –40°C to +85°C ......................... 16–pin SOIC
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation Headquarters and
Sales Office
22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
PRELIMINARY INFORMATION
SP488A/489ADS/07 SP488A/489A High Speed Quad RS-485/RS-422 Line Receivers © Copyright 2000 Sipex Corporation
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