+15kV Human Body Model
+15kV IEC1000-4-2 Air Discharge
+8kV IEC1000-4-2 Contact Discharge
DESCRIPTION…
The Sipex SP385E is an enhanced version of the Sipex SP200 family of RS232 line drivers/
receivers. The SP385E offers +3.3V operation for EIA-562 and EIA-232 applications. The
SP385E maintains the same performance features offered in its predecessors. The SP385E is
available in plastic SOIC or SSOP packages operating over the commercial and industrial
temperature ranges. The SP385E is pin compatible to the LTC1385 EIA-562 transceiver, except
the drivers in the SP385E can only be disabled with the ON/OFF pin.
This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operation
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
The Sipex SP385E is a +3V to +5V EIA-232/EIA-
562 line transceiver. It is a pin-for-pin alternative for
the SP310A and will operate in the same socket with
capacitors ranging from 0.1µF to 10µF, either polarized or non–polarized, in +3V supplies. The SP385E
offers the same features such as 120kbps guaranteed
transmission rate, increased drive current for longer
and more flexible cable configurations, low power
dissipation and overall ruggedized construction for
commercial and industrial environments. The SP385E
also includes a shutdown feature that tri-states the
drivers and the receivers.
Driver/Transmitter
The drivers are inverting transmitters, which accept TTL or CMOS inputs and output the RS-232
signals with an inverted sense relative to the input
logic levels. Typically the RS-232 output voltage
swing is ±9V for 5V supply and ±4.2V for 3.3V
supply. Even under worst case loading conditions
of 3kΩ and 2500pF, the output is guaranteed to be
±5V for a 5V supply and ±3.7V for a 3.3V supply
which adheres to EIA-232 and EIA-562 specifications, respecitively. The transmitter outputs are
protected against infinite short-circuits to ground
without degradation in reliability.
The SP385E includes a charge pump voltage converter which allows it to operate from a single +3.3V
or +5V supply. These converters double the V
voltage input in order to generate the EIA-232 or EIA-
CC
562 output levels. For +5V operation, the SP385E
driver outputs adhere to all EIA-232D and CCITT
V.28 specifications. While at +3.3V operation, the
outputs adhere to EIA-562 specifications. Due to
Sipex's efficient charge pump design, the charge
pump levels and the driver outputs are less noisy than
other 3V EIA-232 transceivers.
The SP385E has a single control line which simul-
taneously shuts down the internal DC/DC converter and puts all transmitter and receiver outputs
into a high impedance state.
The SP385E is available in 18-pin plastic SOIC
and 20-pin plastic SSOP packages for operation
over commercial and industrial temperature
ranges. Please consult the factory for surfacemount packaged parts supplied on tape-on-reel
as well as parts screened to MIL-M-38510.
The SP385E is ideal for +3.3V battery applications requiring low power operation. The charge
pump strength allows the drivers to provide
±4.0V signals, plenty for typical EIA-232 applications since the EIA-232 receivers have input
sensitivity levels of less than ±3V.
THEORY OF OPERATION
The SP385E device is made up of three basic
circuit blocks — 1) a driver/transmitter, 2) a receiver and 3) a charge pump.
The instantaneous slew rate of the transmitter
output is internally limited to a maximum of 30V/
µs in order to meet the standards [EIA 232-D 2.1.7,
Paragraph (5)]. However, the transition region
slew rate of these enhanced products is typically
10V/µs. The smooth transition of the loaded output from VOL to VOH clearly meets the monotonicity requirements of the standard [EIA 232-D 2.1.7,
Paragraphs (1) & (2)].
Receivers
The receivers convert RS-232 input signals to
inverted TTL signals. Since the input is usually
from a transmission line, where long cable lengths
and system interference can degrade the signal, the
inputs have a typical hysteresis margin of 500mV.
This ensures that the receiver is virtually immune
to noisy transmission lines.
The input thresholds are 0.8V minimum and 2.4V
maximum, again well within the ±3V RS-232
requirements. The receiver inputs are also protected against voltages up to ±15V. Should an
input be left unconnected, a 5kΩ pull-down resistor to ground will commit the output of the receiver
to a high state.
In actual system applications, it is quite possible
for signals to be applied to the receiver inputs
before power is applied to the receiver circuitry.
This occurs for example when a PC user attempts
to print only to realize the printer wasn’t turned on.
In this case an RS-232 signal from the PC will
appear on the receiver input at the printer. When
the printer power is turned on, the receiver will
operate normally. All of these enhanced devices
are fully protected.
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach compared to older less–efficient designs. The charge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical 10V power supplies. There
is a free–running oscillator that controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— VSS charge storage —During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to +5V. C
then switched to ground and the charge in C
transferred to C
–
. Since C
2
+
is connected to
2
+
is
l
–
is
1
+5V, the voltage potential across capacitor C2 is
now 10V.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to ground,
and transfers the generated l0V across C2 to C4,
the VDD storage capacitor. Again, simultaneously
with this, the positive side of capacitor C1 is
switched to +5V and the negative side is connected to ground, and the cycle begins again.
Since both V+ and V– are separately generated
from VCC; in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
Phase 2
— VSS transfer — Phase two of the clock connects the negative terminal of C2 to the V
SS
storage capacitor and the positive terminal of C
to ground, and transfers the generated –l0V to
C3. Simultaneously, the positive side of capacitor C 1 is switched to +5V and the negative side
is connected to ground.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –5V in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C
The SP385E has a shut-down/standby mode to
conserve power in battery-powered systems. To
activate the shutdown mode, which stops the
operation of the charge pump, a logic "0" is
applied to the appropriate control line. The
shutdown mode is controlled on the SP385E by
a logic "0" on the ON/OFF control line (pin 18
for the SOIC and pin 20 for the SSOP packages);
this puts the transmitter outputs in a tri-state mode.
The Human Body Model has been the generally
accepted ESD testing method for semiconductors.
This method is also specified in MIL-STD-883,
Method 3015.7 for ESD testing. The premise of
this ESD test is to simulate the human body’s
potential to store electro-static energy and
discharge it to an integrated circuit. The
simulation is performed by using a test model as
shown in Figure 6. This method will test the IC’s
capability to withstand an ESD transient during
normal handling such as in manufacturing areas
where the ICs tend to be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
with IEC1000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipment that are accessible to personnel during
normal usage. The transceiver IC receives most
of the ESD current when the ESD source is
applied to the connector pins. The test circuit for
IEC1000-4-2 is shown on Figure 7. There are
two methods within IEC1000-4-2, the Air
Discharge method and the Contact Discharge
method.
ESD Tolerance
The SP385E device incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
DC Power
Source
R
RR
C
CC
SW1
SW1SW1
R
RR
S
SS
SW2
SW2SW2
C
CC
S
SS
Device
Under
Test
previous family for more rugged applications
and environments sensitive to electro-static
discharges and associated transients.The
improved ESD tolerance is at least ±15KV without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
Figure 6. ESD Test Circuit for Human Body Model
Contact-Discharge Module
Contact-Discharge ModuleContact-Discharge Module
R
R
RR
RR
V
S
VV
SS
SW2
SW2SW2
C
CC
S
SS
DC Power
Source
R
RR
C
CC
SW1
SW1SW1
Device
Under
Test
c) IEC1000-4-2 Direct Contact
RS and RV add up to 330Ω for IEC1000-4-2.
RR
andandRR
add up to 330add up to 330ΩΩ f for IEC1000-4-2.or IEC1000-4-2.
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be directly
discharged to the equipment from a person already
holding the equipment. The current is transferred
on to the keypad or the serial port of the equipment
directly and then travels through the PCB and
finally to the IC.
t=0nst=30ns
Figure 8. ESD Test Waveform for IEC1000-4-2
t ➙
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
through air. This simulates an electrically charged
person ready to connect a cable onto the rear of
the system only to find an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the system.
This energy, whether discharged directly or
through air, is predominantly a function of the
discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
The circuit models in Figures 6 and 7 represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the first switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kΩ an 100pF, respectively. For IEC-1000-42, the current limiting resistor (RS) and the source
capacitor (CS) are 330Ω an 150pF, respectively.
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the test
point.
SP385E HUMAN BODY IEC1000-4-2
Family MODEL Air Discharge Direct Contact Level
Model .......................................................................................Temperature Range................................................................................ Package
ORDERING INFORMATION
SP385ECA ..................................................................................... 0°C to +70°C ............................................................................... 20–pin SSOP
SP385EEA ................................................................................... –40°C to +85°C ............................................................................. 20–pin SSOP
SP385ECT ..................................................................................... 0°C to +70°C ................................................................................ 18–pin SOIC
SP385EET ................................................................................... –40°C to +85°C .............................................................................. 18–pin SOIC
CT and ET packages available Tape–on–Reel. Please consult the factory for pricing and availability for this option, and for parts screened to
MIL–STD–883.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.