Page 1
PRELIMINARY
1
www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-4
EPD TVS Diode Array
For ESD and Latch-Up Protection
Description
Features
Circuit Diagram Schematic & PIN Configuration
Revision 9/2000
The SLV series of transient voltage suppressors are
designed to protect low voltage, state-of-the-art CMOS
semiconductors from transients caused by electrostatic discharge (ESD), cable discharge events (CDE),
lightning and other induced voltage surges.
The devices are constructed using Semtechs proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions
in leakage currents and capacitance over siliconavalanche diode processes. The SLVU2.8-4 features
integrated low capacitance compensation diodes that
reduce the maximum capacitance to <8pF per line.
This, combined with low leakage current, means signal
integrity is preserved in high-speed applications such
as 10/100 Ethernet.
The SLVU2.8-4 is in an SO-8 package and may be used
to protect two high-speed line pairs. The flow-thru
design minimizes trace inductance and reduces voltage
overshoot associated with ESD events. The low
clamping voltage of the SLVU2.8-4 minimizes the
stress on the protected IC.
The SLV series TVS diodes will meet the surge requirements of IEC 61000-4-2, Level 4.
Applications
Mechanical Characteristics
u 10/100 Ethernet
u WAN/LAN Equipment
u Switching Systems
u Desktops, Servers, & Notebooks
u Instrumentation
u Base Stations
u Analog Inputs
u 400 Watts peak pulse power (tp = 8/20µs)
u Transient protection for high speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp = 5/50ns)
IEC 61000-4-5 (Lightning) 24A (tp = 8/20µs)
u Protects two line pairs (four lines)
u Comprehensive pin out for easy board layout
u Low capacitance
u Low leakage current
u Low operating and clamping voltages
u Solid-state EPD TVS process technology
u JEDEC SO-8 package
u Molding compound flammability rating: UL 94V-0
u Marking : Part number, date code, logo
u Packaging : Tape and Reel per EIA 481
SO-8 (Top View)
Page 2
2ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-4
Absolute Maximum Rating
Electrical Characteristics
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Page 3
3
ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-4
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
0
10
20
30
40
50
60
70
80
90
100
110
0 25 50 75 100 125 150
Ambient Temperature - T
A
(oC)
% of Rated Power or I
PP
Power Derating Curve
Pulse Waveform Clamping Voltage vs. Peak Pulse Current
0
10
20
30
40
50
60
70
80
90
100
110
0 5 10 15 20 25 30
Time (µs)
Percent of I
PP
e
-t
td = IPP/2
Waveform
Parameters:
tr = 8µs
td = 20µs
0.01
0.1
1
10
0.1 1 10 100 1000
Pulse Duration - tp (µs)
Peak Pulse Power - P
PP
(kW)
0
2
4
6
8
10
12
14
0 5 10 15 20 25
Peak Pulse Current - I
PP
(A)
Clamping Voltage - V
C
(V)
Waveform
Parameters:
tr = 8µs
td = 20µs
Page 4
4ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-4
SLVU2.8-4 Circuit Diagram
Low Capacitance Protection of Two Differential Line
Pairs
Device Connection for Protection of Four Data Lines
Electronic equipment is susceptible to transient disturbances from a variety of sources including: ESD to an
open connector or interface, direct or nearby lightning
strikes to cables and wires, and charged cables hot
plugged into I/O ports. The SLVU2.8-4 is designed to
protect sensitive components from damage and latchup which may result from such transient events. The
SLVU2.8-4 can be configured to protect two highspeed line pairs. The device is connected as follows:
1. Protection of two high-speed line pairs:
The SLVU2.8-4 is designed such that the data lines
are routed through the device. The first line pair
enters at pins 1 and 2 and exit at pins 8 and 7
respectively. The second line pair enters at pins 3
and 4 and exits at pins 6 and 5. The traces must
be connected at the bottom of the device as
shown.
Circuit Board Layout Recommendations for Suppression of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
l Place the SLVU2.8-4 near the input terminals or
connectors to restrict transient coupling.
l Minimize the path length between the TVS and the
protected line.
l Minimize all conductive loops including power and
ground loops.
l The ESD transient return path to ground should be
kept as short as possible.
l Never run critical signals near board edges.
l Use ground planes whenever possible.
Line 1
Line 3
Line 4
Line 2
1
2
3
45
6
7
8
Line 1
Line 3
Line 4
Line 2
Applications Information
Page 5
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ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-4
10/100 Ethernet Protection Circuit
Typical Applications
Page 6
6ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-4
Applications Information (continued)
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EPD TVS VI Characteristic Curve
EPD TVS Characteristics
The SLVU2.8-4 is constructed using Semtechs proprietary EPD technology. The structure of the EPD TVS is
vastly different from the traditional pn-junction devices.
At voltages below 5V, high leakage current and junction
capacitance render conventional avalanche technology
impractical for most applications. However, by utilizing
the EPD technology, the SLVU2.8-4 can effectively
operate at 2.8V while maintaining excellent electrical
characteristics.
The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in traditional silicon-avalanche TVS diodes. The EPD mechanism is achieved by engineering the center region of
the device such that the reverse biased junction does
not avalanche, but will punch-through to a conducting state. This structure results in a device with superior dc electrical parameters at low voltages while
maintaining the capability to absorb high transient
currents.
The IV characteristic curve of the EPD device is shown
in Figure 1. The device represents a high impedance
to the circuit up to the working voltage (V
RWM
). During a
transient event, the device will begin to conduct as it is
biased in the reverse direction. When the punchthrough voltage (VPT) is exceeded, the device enters a
low impedance state, diverting the transient current
away from the protected circuit. When the device is
conducting current, it will exhibit a slight snap-back or
negative resistance characteristic due to its structure.
This must be considered when connecting the device
to a power supply rail. To return to a non-conducting
state, the current through the device must fall below
the snap-back current (approximately < 50mA).
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ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PRELIMINARY
PROTECTION PRODUCTS
SLVU2.8-4
Land Pattern - SO-8
Outline Drawing - SO-8
Page 8
8ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
SLVU2.8-4
Contact Information
Semtech Corporation
Protection Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-2111 FAX (805)498-3804
Ordering Information
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Note:
(1) No suffix indicates tube pack.
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