Datasheet SLTS218B Datasheet (Fairchild)

Page 1

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PTB48500, PTB48501, PTB48502

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

Description

The PTB4850x power modules are a dual-output isolated DC/DC converter, designed to provide the logic supply voltages for AC-7 based xDSL applications. The PTB48500 is rated for 13 A of total output current, making it suitable for 32-channel xDSL applications. The PTB48501 and PTB48502 provide output current for powering up to 64 xDSL channels. The PTB48501 is rated for 16.5 A total output current, and the PTB48502, 21 A. The PTB48502 incorporates 10 W of additional capacity for powering peripheral circuitry. Any of these converters can be used for other applications with similar power requirements.

The modules operate from a standard telecom (-48 V) central office (CO) supply and include an “on/off” enable control,

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

Features

• Dual Outputs

(Independently Regulated)

• Input Voltage Range:

36 V to 75 V

• Power-up/Down Sequencing

• 1500 VDC Isolation

• Over-Current Protection

• Over-Temperature Shutdown

• Under-Voltage Lockout

output current limit, over-temperature protection, input under-voltage lockout (UVLO). The PTB48500 and PTB48501 also incorporates a power-up reset (POR) output.

The modules are designed to operate with one of the PTB4851x DC/DC converter modules. The combination of a PTB4850x and PTB4851x converter provides the complete the power supply for an AC7 chipset. The “EN Out” and “Sync Out” pins provide compatible output signals for controlling both the power up sequence and switching frequency of the PTB48510.

The PTB4850x modules employ double-sided surface mount construction, and are an industry standard size.

• Fixed Frequency Operation

• Temp Range: –40 to 100 °C

• Industry Standard Outline

• Operates with PTB4851x for

Complete AC7 Power Solution

• Powers up to 64 DSL Ports

• Safety Approvals:

UL/cUL 60950 EN 60950

Pin Configuration

Pin Function

1+V

2 Sync Out 3 Enable # 4 EN Out 5–V

6+VO 2 7 COM 8 POR* / COM † 9Vo2 Adjust 10 +VO 1

Shaded functions indicate signals that are referenced to –VI.

# Denotes positive logic:

Open = Normal operation –V

= Outputs Off

* Denotes negative logic:

High = Normal operation Low = Reset

† This pin is COM on the PTB48502

Stand-Alone Application

–V

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–V

Enable

Sync Out

PTB4850x

EN Out

POR

Adj

COM

2 4

* Pin 8 is ‘COM’ on PTB48502

(8) *

COM

7, (8) *

L O A D

Page 2

PTB48500, PTB48501, PTB48502

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

Ordering Information

Base Part No. (PTB4850❒xxx)

Order Prefix Description

PTB48500xxx 13 A (32-Ports) PTB48501xxx 16.5 A (48/64-Ports) PTB48502xx 21 A (64-Ports + 10 W)

Notes: (1) Reference the applicable package reference drawing for the dimensions and PC board layout

(2) “Standard” option specifies 63/37, Sn/Pb pin solder material.

Output Voltage

Code Voltage

A 3.3 V / 1.2 V

(PTB4850x❒xx)

Pin Descriptions

+VI: The positive input supply for the module with respect

. When powering the module from a –48 V telecom

to –V

central office supply, this input is connected to the primary system ground.

–V

: The negative input supply for the module, and the

0 VDC reference for the ‘Enable’, ‘EN Out’, and ‘Sync Out’ signals. When the module is powered from a +48-V

supply, this input is connected to the 48-V Return.

1: The higher regulated power output voltage, which

is referenced to the COM node.

2: The lower regulated power output voltage, which

is referenced to the COM node.

COM: The secondary return reference for the module’s two regulated output voltages. It is dc isolated from the input supply pins.

2 Adjust: Using a single resistor, this pin allows Vo2 to

be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit.

Enable: This is an open-collector (open-drain) positive logic input that enables the module output. This pin is referenced to -Vin. A logic ‘0’ at this pin disables the module’s outputs, and a high impedance enables the outputs. If not used the pin should be left unconnected.

EN Out: This open-collector output may be used to enable the output of other DC/DC converters in applications where the power-up sequence of the related voltages must be precisely controlled. The output is used principally to control the startup up of a PTB4851xx module when powering ADSL circuits based on the AC7 chipset. The signal is referenced to -Vin, and is active low. It is initially ‘off’ (high impedance), and turns ‘on’ when the output voltage, Vo

Sync Out: The signal generated by this pin is designed to be used exclusively with the PTB48510 in AC7 ADSL applications. When the ‘Sync Out’ of this converter is connected directly to the ‘Sync In’ pin of the PTB48510, both modules will operate at the same switch conversion frequency.

POR*: (Available to PTB48500 and PTB48501 only!) This pin produces an active-low power-on reset signal that may be used to reset logic circuitry. The output is set low during power up just as the output voltage from Vo

starts to rise. It remains low for 10 ms after the volt-

age at Vo1 has reached its nominal set-point voltage. This signal is referenced to the COM node, and has a

3.3-kΩ internal pull-up resistor to Vo

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

Package Options

Code Description Pkg Ref.

AH Horiz. T/H (ERH) AS SMD, Standard

, has risen to its nominal set-point voltage.

(PT4850xx❒❒)

(2)

(ERJ)

(1)

Environmental and General Specifications (Unless otherwise stated, all voltages are with respect to –V

Characteristics Symbols Conditions Min Typ Max Units

Input Voltage Range V Isolation Voltage Input–output/input–case 1500 — — V

Capacitance Input to output — 1500 — pF Resistance Input to output 10 — — MΩ

Operating Temperature Range T Over-Temperature Protection OTP Shutdown threshold — 115 —

Solder Reflow Temperature T Storage Temperature T Mechanical Shock Per Mil-STD-883D, Method 2002.3

Mechanical Vibration Mil-STD-883D, Method 2007.2 Suffix H — 20 —

Weight — — 20 — grams Flammability — Meets UL 94V-O

Notes: (i) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum.

reflow

Over output load range 36 48 75 VDC

Over Vin Range –40 — +85 °C

Hysterisis — 10 — Surface temperature of module body or pins 235 — –40 — 125 °C

1 msec, ½ Sine, mounted

20-2000 Hz Suffix C — 5 —

— 500 — G’s

For technical support and further information visit http://power.ti.com

)

(i)

°C

G’s

Page 3

PTB48500

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

Specifications (Unless otherwise stated, T

=25°C, VI =48 V, CI =0µF, CO =0 µF, and IO =50% Iomax)

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

PTB48500A

Characteristic Symbol Conditions Min Typ Max Units

Output Power Po

Output Current Io

Output Voltage Vo Temperature Variation ∆Reg

Line Regulation ∆Reg Load Regulation ∆Reg Cross Regulation ∆Reg

Efficiency η Io Vo Ripple (pk-pk) V

Transient Response t

Over Current Threshold Iotrip VI =36 V,

, Po

total

, Io

Io1 + Io

∆V

temp

line

load

cross

Both outputs — — 28 W

Over VI range Vo1 (3.3 V) 0 — 6

Total (both outputs) 0 — 13 A

Inlcudes set point, line, load, 3.2 3.3 3.4 –40 ≤ TA ≤ +85°C 1.16 1.2 1.24

–40° ≤TA ≤ +85°C, I

Over VI range Vo1, Vo Over IO range Vo1, Vo I

min ≤ Io2 ≤ I

min ≤ Io1 ≤ I

, Io2 =Iomax — 82 — %

20 MHz bandwidth Vo

1 A/µs load step, 50% to 100% Iomax — 30 — µs Vo1, Vo2 over/undershoot — ±2.0 — %V

reset followed by auto-recovery

=IO min Vo

max, Io

=1 A ∆Vo

max, Io

=1 A ∆Vo

Vo1 (3.3 V) — — 19.8 Vo2 (1.2 V) — — 8.4

Vo2 (1.2 V) 0 — 7

— ±0.5 —

— ±0.8 —

— ±1 ±10 mV

— ±3 ±12 mV

——10

—2050

+ Io

13.5 16 — A

(1) (1)

Output Voltage Adjust Range Vadj Vo2 only -10 — +20 %V Switching Frequency ƒ Under-Voltage Lockout VI on VI increasing — 34 —

On/Off Enable (pin 3) Referenced to –VI (pin 5) Input High Voltage V Input Low Voltage V

Input Low Current I

VI off VI decreasing — 32 —

IH IL

Over VI and IO ranges 500 550 600 kHz

+3.6 — +75 –0.2 — +0.8

(2)

—–1—mA Standby Input Current II standby pins 3 & 5 connected — 2 — mA Internal Input Capacitance C External Output Capacitance Co

Reliability MTBF Per Telcordia SR-332

Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating.

(2) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected

and may be connected to +VI. The maximum open-circuit voltage is 7 V. If it is left open circuit the converter will operate when input power is applied.

1 2

50% stress, TA =40°C, ground benign

—2 —µF

(3)

— 5,000 — 5,000

1.5 — — 10

(3) An output capacitor is not required.

µF

Hrs

For technical support and further information visit http://power.ti.com

Page 4

PTB48500

Typical Characteristics

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

PTB48500A Characteristic Data (See Note A)

Efficiency vs Load Current (See Note B)

100

Efficiency - %

024681012

Power Dissipation vs Load Current (See Note B)

Pd - Watts

Io1 + Io2 (A)

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

Safe Operating Area PTB48500A (See Note C)

=48 VDC (See Note B)

48 V 36 V 75 V

Ambient Temperature (°C)

0 5 10 15 20 25 30

Total Output Power (W)

Airflow

400LFM 200LFM 100LFM Nat Conv

024681012

Cross Regulation,

(mV)

-2

Cross Regulation ∆V

-4

-6 01234567

Io1 + Io2 (A)

∆∆

∆Vo

vs Ioy @Iox =1 A & VIN =48 V

∆∆

Io1 : Io2 (A)

Vo1 vs Io Vo2 vs Io

2 1

Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Load current is increased proportionally from both outputs, up to the respective maximum value of each output. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to

modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper.

For technical support and further information visit http://power.ti.com

Page 5

PTB48501

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

Specifications (Unless otherwise stated, T

=25°C, VI =48 V, CI =0 µF, CO =0 µF, and Io =50% IO max)

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

PTB48501A

Characteristic Symbol Conditions Min Typ Max Units

Output Power Po

Output Current Io1, Io

Output Voltage Vo Temperature Variation ∆Reg

Line Regulation ∆Reg Load Regulation ∆Reg Cross Regulation ∆Reg

Efficiency η Io Vo Ripple (pk-pk) V

Transient Response t

Over Current Threshold IO trip VI =36V,

, Po

total

Io1 + Io

∆V

temp

line

load

cross

Both outputs — — 32.4 W

Over VI range Vo1 (3.3 V) 0 — 6

Total (both outputs) 0 — 16.5 A

Inlcudes set point, line, load, 3.2 3.3 3.4 –40 ≤ TA ≤ +85°C 1.16 1.2 1.24

–40° ≤TA ≤ +85°C, I

Over VI range Vo1, Vo Over Io range Vo1, Vo I

min ≤ Io2 ≤ I

min ≤ Io1 ≤ I

, Io2 =Iomax — 81 — %

20 MHz bandwidth Vo

1 A/µs load step, 50% to 100% Iomax — 30 — µs Vo1, Vo2 over/undershoot — ±2.0 — %V

reset followed by auto-recovery

=IO min Vo

max, Io

=1 A ∆Vo

max, Io

=1 A ∆Vo

Vo1 (3.3 V) — — 19.8 Vo2 (1.2 V) — — 12.6

(1)

Vo2 (1.2 V) 0 — 10.5

— ±0.5 —

— ±0.8 —

— ±1 ±10 mV

— ±3 ±12 mV

——10

—2050

+ Io

—24—A

(1)

Output Voltage Adjust Range Vadj Vo2 only –20 — +10 %V Switching Frequency ƒ Under-Voltage Lockout V

On/Off Enable (pin 3) Referenced to –VI (pin 5) Input High Voltage V

Input Low Voltage V

Input Low Current I

on VI increasing — 34 —

VI off VI decreasing — 32 —

IH IL

IL —–1—mA

Over VI and IO ranges 500 550 600 kHz

+3.6 — +75 –0.2 — +0.8

(2)

Standby Input Current II standby pins 3 & 5 connected — 2 — mA Internal Input Capacitance C External Output Capacitance Co

Reliability MTBF Per Telcordia SR-332

Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating.

(2) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected

and may be connected to +VI. The maximum open-circuit voltage is 7 V. If it is left open circuit the converter will operate when input power is applied.

1 2

50% stress, TA =40°C, ground benign

—2 —µF

(3)

0 0

(3)

— 5,000 — 5,000

1.5 — — 10

(3) An output capacitor is not required.

µF

Hrs

For technical support and further information visit http://power.ti.com

Page 6

PTB48501

)

Typical Characteristics

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

PTB48501A Characteristic Data (See Note A)

Efficiency vs Load Current (See Note B)

100

Efficiency - %

0369121518

Power Dissipation vs Load Current (See Note B)

Pd - Watts

0369121518

Io1 + Io2 (A)

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

Safe Operating Area PTB48501A (See Note C)

=48 VDC (See Note B)

36 V 48 V 75 V

48 V 36 V 75 V

Ambient Temperature (°C

0 8 16 24 32

Output Power (W)

Airflow

400LFM 200LFM 100LFM Nat conv

Cross Regulation,

(mV)

-2

Cross Regulation V

-4

-6 024681012

∆∆

∆Vo

vs Ioy @Iox =1 A & VIN =48 V

∆∆

Io1 : Io2 (A)

Vo1 vs Io Vo2 vs Io

2 1

modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper.

For technical support and further information visit http://power.ti.com

Page 7

PTB48502

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

Specifications (Unless otherwise stated, T

=25°C, VI =48 V, CI =0 µF, CO =0 µF, and IO =50% IO max)

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

PTB48502A

Characteristic Symbol Conditions Min Typ Max Units

Output Power Po

Output Current Io1, Io

Output Voltage Vo Temperature Variation ∆Reg

Line Regulation ∆Reg Load Regulation ∆Reg Cross Regulation ∆Reg

Efficiency η Io Vo Ripple (pk-pk) V

Transient Response t

Over Current Threshold Iotrip VI =36V,

, Po

total

Io1 + Io

∆V

temp

line

load

cross

Both outputs — — 45 W

Over Vin range Vo1 (3.3 V) 0 — 10

Total (both outputs) 0 — 21 A

Inlcudes set point, line, load, 3.2 3.3 3.4 –40 ≤ TA ≤ +85 °C 1.16 1.2 1.24

–40° ≤TA ≤ +85°C, I

Over VI range Vo1, Vo Over IO range Vo1, Vo I

min ≤ Io2 ≤ I

min ≤ Io1 ≤ I

, Io2 =Iomax — 82 — %

20 MHz bandwidth Vo

1 A/µs load step, 50% to 100% Iomax — 30 — µs Vo1, Vo2 over/undershoot — ±2.0 — %V

reset followed by auto-recovery

=Iomin Vo

max, Io

=1 A ∆Vo

max, Io

=1 A ∆Vo

Vo1 (3.3 V) — — 33 Vo2 (1.2 V) — — 15.6

Vo2 (1.2 V) 0 — 13

— ±0.5 —

— ±0.8 —

— ±1 ±10 mV

— ±3 ±12 mV

——10

—2050

+ Io

—24—A

(1) (1)

Output Voltage Adjust Range Vadj Vo2 only –20 — +10 %V Switching Frequency ƒ Under-Voltage Lockout V

On/Off Enable (pin 3) Referenced to –VI (pin 5) Input High Voltage V

Input Low Voltage V

Input Low Current I

on VI increasing — 34 —

VI off VI decreasing — 32 —

IH IL

IL —–1—mA

Over VI and Io ranges 500 550 600 kHz

+3.6 — +75 –0.2 — +0.8

(2)

Standby Input Current II standby pins 3 & 5 connected — 2 — mA Internal Input Capacitance C External Output Capacitance Co

Reliability MTBF Per Telcordia SR-332

Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating.

(2) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected

and may be connected to +VI. The maximum open-circuit voltage is 7 V. If it is left open circuit the converter will operate when input power is applied.

1 2

50% stress, TA =40°C, ground benign

—2 —µF

(3)

0 0

(3)

— 5,000 — 5,000

1.5 — — 10

(3) An output capacitor is not required.

µF

Hrs

For technical support and further information visit http://power.ti.com

Page 8

PTB48502

Typical Characteristics

Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL

PTB48502A Characteristic Data (See Note A)

[Io1 =10 A, Io2 =10 A represents 100% load]

Efficiency vs Load Current (See Note B)

100

Efficiency - %

0 20406080100

Power Dissipation vs Load Current (See Note B)

Power Dissipation – W

0 20406080100

Output Load – %

36 V 48 V 75 V

75 V 48 V 36 V

SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004

PTB48502A Characteristic Data (See Note A)

[Io1 =8 A, Io2 =13 A represents 100% load]

Efficiency vs Load Current (See Note B)

100

Efficiency - %

0 20406080100

Power Dissipation vs Load Current (See Note B)

Power Dissipation – W

0 20406080100

Output Load – %

36 V 48 V 75 V

75 V 48 V 36 V

Cross Regulation, ∆Vx vs. ∆V

– (mV)

-2

Cross Regulation V

-4

-6 0246810

Safe Operating Area, VIN =48 V (See Notes B, C)

Ambient Temperature – °C

0 102030405060708090100

Io1 : Io2 – (A)

Output Load – %

@Iox =1 A & VI =48 V

Vo1 vs Io Vo2 vs Io

Airf low

400LFM 200LFM 100LFM Nat conv

Cross Regulation, ∆Vx vs. ∆V

– (mV)

2 1

-2

Cross Regulation V

-4

-6 024681012

Safe Operating Area, VIN =48 V (See Notes B, C)

Ambient Temperature – °C

0 102030405060708090100

Io1 : Io2 – (A)

Output Load – %

@Iox =1 A & VI =48 V

Vo1 vs Io Vo2 vs Io

Airflow

400LFM 200LFM 100LFM Nat conv

2 1

Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Load current is increased proportionally from both outputs, up to the indicated maximum value of each respective output. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to

modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper.

For technical support and further information visit http://power.ti.com

Page 9

Application Notes

PTB48500, PTB48501, & PTB48502

Adjusting the Lower Output Voltage of the PTB4850x Series of DC/DC Converters

The PTB4850x series of DC/DC converters are designed to produce two logic-level supply voltages for use with the AC-7 ADSL chipset. The magnitude of lowest output voltage (Vo2) can be adjusted higher or lower by up to +10% or –20% of the nominal. The adjustment method uses a single external resistor.

The value of the resistor determines the amount of adjustment, and its placement determines whether the voltage is increased or decreased. The resistor values can be calculated using the appropriate formula (see below), or simply selected from the range of values given in Table 1-2. The placement of each resistor is as follows.

Adjust Up: To increase the magnitude of both output voltages, place a resistor R

between Vo2 Adj (pin 9) and the

Vo2 (pin 6) voltage rail; see Figure 1-1(a).

Figure 1-1a

PTB4850x

Vo2 Adj

COM

Adjust Up

Adjust Down: To decrease the magnitude of both output voltages, add a resistor (R2), between Vo2 Adj (pin 9) and the COM (pin 7) voltage rail; see Figure 1-1(b).

Figure 1-1b

Calculation of Resistor Adjust Values

The value of the adjust resistor is calculated using one of

– R

to adjust

kΩ

or (R2)

the following equations. Use the equation for R up, or (R2) to adjust down.

R1 [Adjust Up] = Rp ·

(R2) [Adj Down] = Rn ·

Where: V

= Magitude of the original output voltage

V (V

– Vo )

– Va )

Va= Magnitude of the adjusted voltage Rp= Adjust-up constant from Table 1-1 Rn= Adjust-down constant from Table 1-1 Rs= Internal series resistor from Table 1-1

Table 1-1

ADJUSTMENT RANGE AND FORMULA PARAMETERS

Part No. PTB48500(1)A PTB48502A

Vo(nom) 1.2 V 1.2 V Va(min) 0.96 V 0.84 V Va(max) 1.32 V 1.32 V

ΩΩ

Rp (k

Ω) 1.648 1.196

ΩΩ ΩΩ

Rn (k

Ω) 4.624 3.598

ΩΩ

Rs (k

Ω) 18.2 13.0

ΩΩ

Notes:

1. A 0.05 W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C or better. Place the resistor in either the R location, as close to the converter as possible.

2. Never connect capacitors to the Vo2 Adj pin. Capacitance added to this pin can affect the stability of the regulated output.

PTB4850x

Vo2 Adj

(R2) Adj Down

COM

For technical support and further information visit http://power.ti.com

Page 10

Application Notes

continued

PTB48500, PTB48501, & PTB48502

Table 1-2

ADJUST RESISTOR VALUES

Part No. PTB4850xA PTB48502A % Adjust Va (V) R1 / (R2) R1 / (R2)

–21 0.848 N/A (0.5) kΩ –20 0.960 (0.3) kΩ (1.4) kΩ –19 0.972 (1.5) kΩ (2.3) kΩ –18 0.984 (2.9) kΩ (3.4) kΩ –17 0.996 (4.4) kΩ (4.6) kΩ –16 1.008 (6.1) kΩ (5.9) kΩ –15 1.020 (8.0) kΩ (7.4) kΩ –14 1.032 (10.2) kΩ (9.1) kΩ –13 1.044 (12.7) kΩ (11.1) kΩ –12 1.056 (15.7) kΩ (13.4) kΩ –11 1.068 (19.2) kΩ (16.1) kΩ –10 1.080 (23.4) kΩ (19.4) kΩ – 9 1.092 (28.6) kΩ (23.4) kΩ – 8 1.104 (35) kΩ (28.4) kΩ – 7 1.116 (43.2) kΩ (34.8) kΩ – 6 1.128 (54.2) kΩ (43.4) kΩ – 5 1.140 (69.7) kΩ (55.4) kΩ – 4 1.152 (92.8) kΩ (73.4) kΩ – 3 1.164 (131) kΩ (103.0) kΩ – 2 1.176 (208) kΩ (163.0) kΩ – 1 1.188 (440) kΩ (343.0) kΩ 0 1.200 + 1 1.212 148 kΩ 108.0 kΩ + 2 1.224 65.8 kΩ 48.0 kΩ + 3 1.236 38.4 kΩ 28.1 kΩ + 4 1.248 24.6 kΩ 18.1 kΩ + 5 1.260 16.4 kΩ 12.1 kΩ + 6 1.272 10.9 kΩ 8.1 kΩ + 7 1.284 7 kΩ 5.3 kΩ + 8 1.296 4.1 kΩ 3.2 kΩ + 9 1.308 1.8 kΩ 1.5 kΩ +10 1.320 0 kΩ 0.2 kΩ

=Adjust up, (R2) =Adjust down

For technical support and further information visit http://power.ti.com

Page 11

Application Notes

PTB4850x & PTB4851x

Configuring the PTB4850x & PTB4851x DC/DC Converters for DSL Applications

When operated as a pair, the PTB4850x and PTB4851x converters are specifically designed to provide all the required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB4851x produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When used together in these types of applications, the PTB4850x and PTB4851x may be configured for power-up sequencing, and also synchronized to a common switch conversion frequency. Figure 2-1 shows the required cross-connects between the two converters to enable these two features.

Switching Frequency Synchronization

Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output AC ripple components from the converters. The beat frequency can vary considerably with any slight variation in either converter’s switch frequency. This results in a variable and undefined frequency spectrum for the ripple waveforms, which would normally require separate filters at the input of each converter. When the switch frequency of the converters are synchronized, the ripple components are constrained to the fundamental and higher. This simplifies the design of the output filters, and allows a common filter to be specified for the treatment of input ripple.

Power-Up Sequencing

The desired power-up sequence for the AC7 supply voltages requires that the two logic-level voltages from the PTB4850x converter rise to regulation prior to the two complementary voltages that power the transceiver ICs. This sequence cannot be guaranteed if the PTB4850x and PTB4851x are allowed to power up independently, especially if the 48-V input voltage rises relatively slowly. To ensure the desired power-up sequence, the “EN Out” pin of the PTB4850x is directly connected to the activelow “Enable” input of the PTB4851x (see Figure 2-1). This allows the PTB4850x to momentarily hold off the outputs from the PTB4851x until the logic-level voltages have risen first. Figure 2-2 shows the power-up waveforms of all four supply voltages from the schematic of Figure 2-1.

Figure 2-2; Power-Up Sequencing Waveforms

V (1 V/Div)

CCIO

V (1 V/Div)

CORE

+V (5 V/Div)

TCVR

–V (5 V/Div)

TCVR

HORIZ SCALE: 10 ms/Div

Figure 2-1; Example of PTB4850x & PTB4851x Modules Configured for DSL Applications

–48 V RTN

–48 V

Input Filter

–

PTB4850xA

Enable

–V

Sync In ±V

Sync OutEN Out

PTB4851xA

Enable

–V

Adj

COM

–V

CCIO

CORE

TCVR

For technical support and further information visit http://power.ti.com

Page 12

PACKAGE OPTION ADDENDUM

www.ti.com

11-Oct-2005

PACKAGING INFORMATION

Orderable Device Status

PTB48500AAH ACTIVE DIP MOD

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

ERH 10 9 TBD Call TI Level-1-235C-UNLIM

ULE

PTB48500AAS ACTIVE DIP MOD

ERJ 10 9 TBD Call TI Level-1-235C-UNLIM

ULE

PTB48500AAZ ACTIVE DIP MOD

ERJ 10 9 Pb-Free

ULE

PTB48501AAH ACTIVE DIP MOD

ERH 10 9 TBD Call TI Level-1-235C-UNLIM

ULE

PTB48501AAS ACTIVE DIP MOD

ERJ 10 9 TBD Call TI Level-1-235C-UNLIM

ULE

PTB48501AAZ ACTIVE DIP MOD

ERJ 10 9 Pb-Free

ULE

PTB48502AAH ACTIVE DIP MOD

ERH 10 9 TBD Call TI Level-1-235C-UNLIM

ULE

PTB48502AAS ACTIVE DIP MOD

ERJ 10 9 TBD Call TI Level-1-235C-UNLIM

ULE

PTB48502AAZ ACTIVE DIP MOD

ERJ 10 9 Pb-Free

ULE

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

Call TI Level-3-260C-168 HR

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

Page 13

Page 14

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