Datasheet SC75823A, SC75823B Datasheet (SILAN)

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Semiconductors

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1/3 DUTY GENERAL-PURPOSE LCD
DRIVER

DESCRIPTION

The SC75823 is a general-purpose LCD driver that can be used

for frequency display in microprocessor-controlled radio receives

and in other display applications. In addition to being able to directly

drive up to 156 LCD segments.

FEATURES

• Supports both 1/3 duty 1/2 bias and 1/3 duty 1/3 bias LCD

drive of up to 156 segments under serial data control.

• Serial data input supports CCB format communication with the

system controller.

• Serial data control of the power-saving mode based backup

function and all the segments forced off function.

• High generality since display data is displayed directly without

decoder intervention.

• The

INH pin can force the display to the off state.

• The LCD drive bias voltage can be provided internally or

externally.

• Power supply voltage: 4.5 to 6.0V

BLOCK DIAGRAM

SC75823

QFP-64-14x14-0.8

LQFP-64-10 x 10-0.5

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ORDERING INFORMATION

Device Package

SC75823A LQFP-64-10 X 10-0.5

SC75823B QFP-64-14 X 14-0.8

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S1S51S52COM1 COM2 COM3

V

V

INH

OSC

DD1

DD2

Common Driver

Clock

Generator

DI CL CE

Latch & Driver

Shift Register

Address
Detector

V

DDVSS

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PIN CONFIGURATION

S48

48 47 46 45 44 43 42 41 40 39 38 37

49

S49

50

S50

51

S51

52

S52

53

COM1

54

COM2

55

COM3

56

DD

V

57

INH

58

DD1

V

59

V

DD2

V

60

SS

61

OSC

62

CE

63

CL

64

DI

1

S1



S34

S35

S36

S37

S38

S39

S40

S41

S42

S43

S44

S45

S46

S47

36 35 34 33

SC75823

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

S2

S4

S3

S5S6S7S8S9

S10

S11

S12

S13

S14

S15

SC75823

S33

S32

32

S31

31

S30

30

S29

29

S28

28

S27

27

S26

26

S25

25

S24

24

S23

23

S22

22

S21

21

S20

20

19

S19

18

S18

S17

17

S16

ABSOLUTE MAXIMUM RATINGS

Characteristics Symbol Value Unit

Maximum Supply Voltage V

Input Voltage

Output Voltage V

Output Current

Allowable Power Dissipation P

Operating Temperature T

Storage Temperature T

(Tamb=25°C, VSS=0 V)

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-0.3 to +6.5 V

DDmax

V

-0.3 to +6.5 V

IN1

-0.3 to VDD+0.3 V

V

IN2

-0.3 to VDD+0.3 V

OUT

I

300

OUT1

3 mA

I

OUT2

200 mW

Dmax

-40 to +85

opr

-55 to 125

stg

µA

°C

°C

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ALLOWABLE OPERATING RANGE

Characteristics Symbol Test Condition Min. Typ. Max. Unit

Supply Voltage VDD VDD 4.5 6.0 V

Input Voltage

Input High level Voltage VIH

Input Low Level Voltage VIL

Recommended External Resistance R

Recommended External Capacitance C

Guaranteed Oscillator Range f

Data Setup Time tds CL, DI: figure 2 100 ns

Data Hold Time tdh CL, DI: figure 2 100 ns

CE Wait Time tcp CE, CL: figure 2 100 ns

CE Setup Time tcs CE, CL: figure 2 100 ns

CE Hold Time tch CE, CL: figure 2 100 ns

High-level Clock Pulse Width

Low-level Clock Pulse Width

Rise Time tr CE, CL, DI: figure 2 100 ns

Fall Time tf CE, CL, DI: figure 2 100 ns

Switching Time

INH

V

V

(Tamb=-40 to +85°C, VSS=0V)

V

DD1

DD2

OSC

OSC

OSC 19 38 76 kHz

OSC

tφH

tφL

t2

2/3VDD 6.0 V

DD1

V

1/3VDD 6.0 V

DD2

CE, CL, DI,

CE, CL, DI,

OSC 47

OSC 1000 pF

CL: figure 2 100 ns

CL: figure 2 100 ns

, CE: figure 3

INH

INH

INH

4.0 6.0 V

0 0.7 V

10

SC75823

kΩ

µs

ELECTRICAL CHARACTERISTICS

Characteristics Symbol Test Condition Min. Typ. Max. Unit

Input High Level Current IIH

Input Low Level Current IIL

Oscillator Frequency f

Hysteresis Width VH

Output High Level Voltage V

Output Low Level Voltage V

Output High Level Voltage V

Output Low Level Voltage V

Intermediate Level Voltage

V

V

OSC

OH1

OL1

OH2

OL2

MID1

MID2

CE, CL, DI,

CE, CL, DI,

OSC;R

OSC

C

=1000pF

OSC

CE, CL, DI,

S1 to S52; I

S1 to S52; I

COM1 to COM3; I

COM1 to COM3; I

1/2 bias, COM1 to COM3;

I

=±100µA

O

1/3 bias, COM1 to COM3;

I

=±100µA

O

INH

INH

=47kΩ,

INH

=-20µA

O

=20µA

O

; VI=6V

; VI=0V

; VDD=5V

=-100µA

O

=100µA

O

5

-5

38 kHz

0.3 V

-1.0 V

V

DD

1.0 V

-1.0 V

V

DD

1.0 V

±1.0

1/2V

2/3V

DD

DD

±1.0

V

V

(To be continued)

µA

µA

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(Continued)

Characteristics Symbol Test Condition Min. Typ. Max. Unit

V

Intermediate Level Voltage*

Supply Current

Note: * Except the bias voltage generation divider resistors that are built into V

V

V

1/3 bias, COM1 to COM3;

MID3

I

=±100µA

O

1/3 bias, S1 to S52;

MID4

I

=±20µA

O

1/3 bias, S1 to S52;

MID5

I

=±20µA

O

I

Power saving mode 5

DD1

I

f=38kHz, 1/2 bias, VDD=5V 400 800

DD2

I

f=38kHz, 1/3 bias, VDD=5V 300 600

DD3

I

f=38kHz, 1/2 bias, VDD=6V 650 1300

DD2

I

f=38kHz, 1/3 bias, VDD=8V 580 1200

DD3

Figure 1

V

DD

1/3V

2/3V

1/3V

DD

DD

DD

DD1

SC75823

±1.0

±1.0

±1.0

V

V

V

and V

.(see figure 1)

DD2

µA

µA

µA

µA

µA

V

DD1

To the common segment driver

V

DD2

Except these resistors

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1.When CL is stopped at the low level

CE

t¶Ht¶L

CL

DI

2.When CL is stopped at the high level

CE

V

IH

50%

V

IL

V

IH

V

IL

tds tdh

tr

V

V



tf

IH

IL

SC75823

Fig 2

IH

V

V

IL

V

V

V

IL

IH

V

IH

IH

tchtcstcp

V

IL

¶

Ht¶L

t

CL

V

IH

50%

IL

V

DI

IH

V

V

IL

tds tdh

tr tf

V

IH

V

IL

V

IH

V

IL

tcp tcs tch

V

IH

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PIN DESCRIPTION

Pin No Symbol I/O Description



SC75823

1-52 S1 to S52 O

53 COM1

54 COM2

55 COM3

61 OSC I/O

62 CE CE: chip enable

63 CL CL: synchronization clock

64 DI

57

58 V

59 V

56 VDD -- Power supply. Provide a voltage of between 4.5 and 6.0V

60 VSS -- Ground. Connect this pin to the system ground.

INH

I

DD1

I

DD2

Segment outputs for displaying the display data transferred by serial data

input.

Common driver outputs. The frame frequency f

O

f

=(f

/384)Hz

O

OSC

Oscillator connection

An oscillator circuit is formed by connecting an external resistor and

capacitor to this pin.

Serial data transfer inputs. These pins are

I

connected to the control microprocessor.

Display off control input

=low (VSS)……Display forced off (S1 to S52, COM1 to COM3=low)

INH

I

=high (VDD)……Display on

INH

note that serial data transfers can be performed when the display is forced

off.

Used for the 2/3 bias voltage when bias voltage are provided externally.

Connect to V

Used for the 1/3 bias voltage when bias voltage are provided externally.

Connect to V

when 1/2 bias is used.

DD2

when 1/2 bias is used.

DD1

is given by:

O

DI: transfer data

FUNCTION DESCRIPTION

Serial data transfer format

1. When CL is stopped at the low level

CE

CL

10000010 D1D2D3 D154D155D156DRSCBU*

DI

B0 B1 B2 B3 A 0 A1 A2 A3

CCB address 8 bits

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Display data 156 bits Control data 4 bits

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6

*: don't care

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2. When CL is stopped at high level

CE

CL

1000001 0 D1D2D3 D154D155D156DRSCBU*

DI

B0 B1 B2 B3 A0 A1 A2 A3

• CCB address…….41H

• D1 to D156……….Display data

• DR…………………1/2-bias drive or 1/3-bias drive switching control data

• SC…………………Segments on/off control data

• BU…………………Normal mode/power-saving mode control data

Serial data transfer examples

• When 63 segments are used

63 bits is display data (D94 to D156) must be sent.

CCB address 8 bits

Dn (n=1 to 156)=1……..Display on

Dn (n=1 to 156)=0……..Display off

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Display data 156 bits Control data 4 bits

8 bits 67 bits

SC75823

*: don't care

10000010

B0 B1 B2 B3 A0 A1 A2 A3

D94 D95 D96

Control data function

1. DR: 1/2-bias drive or 1/3-bias drive switching control data

This control data selects either 1/2-bias drive or 1/3-bias drive.

DR Drive type

0 1/2-bias drive

1 1/3-bias drive

2. SC: segments on/off control data

This control data bit controls the on/off state of the segments.

SC Display state

0 On

1 Off

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D154 D155 D1 56

DR SC SU *

*: don't care

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However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting

segment off waveforms from the segment output pins.

3. BU: Normal mode/power-saving mode control data

BU Mode

0 Normal mode

1 Power-saving mode. In this mode the OSC pin oscillator is stopped and the common and segment

pins output V

Display data to segment output pin correspondence

SS

levels.

SC75823

Segment

output pin

S1 D1 D2 D3 S27 D79 D80 D81

S2 D4 D5 D6 S28 D82 D83 D84

S3 D7 D8 D9 S29 D85 D86 D87

S4 D10 D11 D12 S30 D88 D89 D90

S5 D13 D14 D15 S31 D91 D92 D93

S6 D16 D17 D18 S32 D94 D95 D96

S7 D19 D20 D21 S33 D97 D98 D99

S8 D22 D23 D24 S34 D100 D101 D102

S9 D25 D26 D27 S35 D103 D104 D105

S10 D28 D29 D30 S36 D106 D107 D108

S11 D31 D32 D33 S37 D109 D110 D111

S12 D34 D35 D36 S38 D112 D113 D114

S13 D37 D38 D39 S39 D115 D116 D117

S14 D40 D41 D42 S40 D118 D119 D120

S15 D43 D44 D45 S41 D121 D122 D123

S16 D46 D47 D48 S42 D124 D125 D126

S17 D49 D50 D51 S43 D127 D128 D129

S18 D52 D53 D54 S44 D130 D131 D132

S19 D55 D56 D57 S45 D133 D134 D135

COM3 COM2 COM1

Segment

output pin

COM3 COM2 COM1

To be continued

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(Continued)

Segment

output pin

S20 D58 D59 D60 S46 D136 D137 D138

S21 D61 D62 D63 S47 D139 D140 D141

S22 D64 D65 D66 S48 D142 D143 D144

S23 D67 D68 D69 S49 D145 D146 D147

S24 D70 D71 D72 S50 D148 D149 D150

S25 D73 D74 D75 S51 D151 D152 D153

S26 D76 D77 D78 S52 D154 D155 D156

For example, the table below lists the segment output states for the S11 output pin.

COM3 COM2 COM1

Segment

output pin

COM3 COM2 COM1

SC75823

Display data

D31 D32 D33

0 0 0 The LCD segments corresponding to COM1 to COM3 are off.

0 0 1 The LCD segments corresponding to COM1 is on.

0 1 0 The LCD segments corresponding to COM2 is on.

0 1 1 The LCD segments corresponding toCOM1 and COM2 are on.

1 0 0 The LCD segments corresponding to COM3 is on.

1 0 1 The LCD segments corresponding to COM1 and COM3 are on.

1 1 0 The LCD segments corresponding to COM2 and COM3 are on.

1 1 1 The LCD segments corresponding to COM1 to COM3 are on

and display control

INH

Since the LSI internal data (D1 to D156, DR, SC and BU) is undefined when power is first applied, the display is

off (S1 to S52, COM1 to COM3= low) by setting the

meaningless display at the power-on can be prevented by transferring serial data from the controller while the

display is off and setting

pin high after the transfer completes.(see figure3).

INH

Segment output pin (S11) state

pin low at the same as power is applied. Then,

INH

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Figure 3

V

DD

R

INH

C

V

DD

SC75823

INH

t1

CE

Internal data Undefined Delined

Transfer of
display and
control data

t1.......Determined by the value of C and R



t2......10

s(minimum)

V

IL

t2

V

IL

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TIMING DIAGRAM

1/2 Bias , 1/3 Duty Drive Technique

COM1

COM2

COM3

LCD driver output when all LCD
segments corresponding to COM1,
COM2, and COM3 are turnned off.

LCD driver output when only LCD
segments corresponding to COM1,
are on.

LCD driver output when only LCD
segments corresponding to COM2,
are on.

LCD driver output when only LCD
segments corresponding to
COM1and COM2 are on.

LCD driver output when only LCD
segments corresponding to COM3
are on.

LCD driver output when LCD
segments corresponding to COM1
and COM3 are on.

LCD driver output when LCD
segments corresponding to COM2
and COM3 are on.

LCD driver output when all LCD
segments corresponding to
COM1,COM2, and COM3 are on.



SC75823

DD

V

V

DD1, VDD2,

(1/2 VDD)

SS

V

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

V

DD

V

DD1, VDD2

V

SS

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1/3 Bias, 1/3 Duty Drive Technique

COM1

COM2

COM3

LCD driver output when all LCD
segments corresponding to COM1,
COM2, and COM3 are turnned off.

LCD driver output when only LCD
segments corresponding to COM1,
are on.

LCD driver output when only LCD
segments corresponding to COM2,
are on.

LCD driver output when LCD
segments corresponding to
COM1and COM2 are on.

LCD driver output when only LCD
segments corresponding to COM3
are on.

LCD driver output when LCD
segments corresponding to COM1
and COM3 are on.

LCD driver output when LCD
segments corresponding to COM2
and COM3 are on.

LCD driver output when all LCD
segments corresponding to
COM1,COM2, and COM2 ar e on.

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SC75823

V

DD

V

DD1

(2/3 VDD)

V

DD2

(1/3 VDD)

SS

V

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

V

DD

V

DD1

V

DD2

V

SS

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TEST CIRCUIT1

1/3 Bias (for use with small panels)

V

DD

From the
microcontroller

TEST CIRCUIT2

1/3 Bias (for use with normal size panels)



SC75823

61

OSC

56

V

DD

INH

57

SS

V

60

V

DD1

58

OPEN

59

V

DD2

62

CE

CL

63

DI S52

64

COM1

COM2

COM3

S1

53

54

55

1

LCD panel (up to 156 segments)

52

61

OSC

V

From the
microcontro ller

DD

C0.047F

C

56

V

DD

INH

57

V

SS

60

V

DD1

58

59

V

C

DD2

62

CE

CL

63

DI S52

64

COM1

COM2

COM3

S1

53

54

55

1

LCD panel (up to 156 segments)

52

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TEST CIRCUIT3

1/3 Bias (for use with large panels)

V

DD

10KR1K

C



0.047F

From the
microcontroller



C

C



SC75823

61

OSC

56

V

DD

INH

57

R

R

R

V

SS

60

V

DD1

58

59

V

DD2

62

CE

CL

63

DI S52

64

COM1

COM2

COM3

S1

53

54

55

1

LCD panel (up to 156 segments)

52

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PACKAGE OUTLINE

QFP-64-14 x 14-0.8 UNIT: mm

SC75823

15.00

1.50

12.00

0.127B0.05

B

0.10



16.00B0.20

14.00

B

0.10

48 33

49

1.0

1

B

0.1

0.35

32

14.00B0.10

16.00B0.20

1764

16

0.8

LQFP-64-10x10-0.5 UNIT: mm

B

0.20

12.00

10.00B0.10

48 33

49

32

1.50B0.10

7.50

11.00

13.6B0.4

10.0B0.2

1.0

1

0.20B0.05 0.5

1764

16

0.127B0.05



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Attach

Semiconductors



SC75823

Revision History

Data REV Description Page

2001.12.30 1.0 Original

2002.03.04 1.1 Modify the “SC7523” to “SC75823”

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