Datasheet SC3010, SC3010S Datasheet (SILAN)

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Silan Semiconductors
DESCRIPTION
SC3010 is a remote control transmitter utilizing CMOS Technology specially designed for use on general purpose (RC-5) infrared applications with low voltage supply and large debounce time. SC3010 supports 32 systems. Each system has a maximum of 64 commands; thus, SC3010 can provide up to a total of 2,048 commands.
FEATURES
* CMOS Technology * Low Voltage Supply * Supports up to 32 systems * Single Pin Oscillator * Bi-phase Transmission Technique * Provides 2,048 Commands
APPLICATIONS
* Television *VCR * Audio Equipment * Multi-Media System * Personal Computer
PIN CONFIGURATIONS
1
7
KI
2
SMS
3
C
0
4
C
1
5
C
2
6
C
3
MD
7
OUT
D
OUT
KO
7
KO
6
KO
5
KO
4
KO
3
V
SS
SC3010
8
9 10 11 12 13 14
SC3010
SOP-28
DIP-28
ORDERING INFORMATION
28 27 26 25 24 23 22 21 20 19 18 17 16 15
SC3010 SC3010S
V
DD
KI
6
KI
5
KI
4
KI
3
KI
2
KI
1
KI
0
T
1
T
2
OSC
0
KO KO
1
KO
2
DIP-28 Package SOP-28 Package
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.1 2002-02-28
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Silan Semiconductors
BLOCK DIAGRAM
SC3010
OSC
T1
T2
SMS
C3
C2
C1
C0
KI7
KI6
KI5
KI4
KI3
KI2
KI1
KI0
18 20 19
2 6 5 4 3
1 27 26 25 24 23 22 21
OSC
Test Mode
Select
Mode Selection
Keyboard
Encoder
Output
8 7 14 28
DOUT MDOUT Vss VDD
ABSOLUTE MAXIMUM RATING
Characteristic Symbol Test conditions Value Unit
Supply Voltage* V Input Voltage* V Output Voltage* V Operating Temperature T NOTE: * = with reference to Vss
DD
IN
OUT
OPR
Master
Reset
Generator
Control
Unit
Command
and System
Address
Latch
Parallel to
Serial
converter
DividerDecoder
Keyboard
Driver
Decoder
(Tamb=25°C, unless otherwise specified)
VSS-0.3 ~ 5.5 V VDD=3 V -0.5~VDD+0.5 V VDD=3 V -0.5~VDD+0.5 V VDD=3 V -20~85
KO0
17
KO1
16
KO2
15
KO3
13
KO4
12
KO5
11
KO6
10
KO7
9
°C
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.1 2002-02-28
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Silan Semiconductors
ELECTRICAL CHARACTERISTICS
Parameter Symbol Test conditions Min Typ Max Unit
Supply Voltage V Stand-By Current I Input Current(KI0~KI7,C0~C3) I High Level Input Voltage (KI0~KI7,C0~C3,SMS,T1,T2) Low Level Input Voltage (KI0~KI7,C0~C3,SMS,T1,T2)
(KI0~KI7,C0~C3) Input Current Leakage (OSC)
(SMS,T1,T2) High Level Output Voltage
(Dout, MD Low Level Output Voltage (Dout, MD
(Dout, MD Low Level Output Voltage
(KO0~KO7)
(KO0~KO7) Drive Current (Dout, MDout) ID VDD=3V Vo=1.5V 1.5 2 mA Operational Frequency Fosc1 VDD=3V 400 600 KHz Free-Running Frequency Fosc2 VDD=3V 50 100 KHz
OUT
OUT
OUT
)
)
)
DD
V
V
I
LEAK1
I
LEAK2
I
LEAK3
I
LEAK4
V
V
I
LEAK5
V
I
LEAK6
(Tamb=25°C, unless otherwise specified)
Freq=455KHz 2.0 3.0 5.5 V
DD
VDD=3V (Output no load) 0 10 µA VI=0V T1=0 T2=0 SMS=0 15 600 µA
IN
VDD=3V,(KI0~KI7 And
IH
C0~C3 Connected To V VDD=3V ,( T1,T2,OSC,SMS
IL
Connected To V VI=3V VDD=3V T1=T2=High 0 1.0Input Current Leakage VI=0V VDD=3V T1=T2=High 0 1.0 VI=0V VDD=3V T1=T2=High 0 1.0 VI=3V VDD=3V T1=T2=High 4.5 15 30 VI=3V VDD=3V T=25°C01.0Input Leakage Current VI=0V VDD=3V T=25°C01.0
OHVDD
OL
OL
=3V IOH=0.4mA
VDD=3V IOH=0.6mA 0.35 Vo=3V VDD=3V T=25°C10Output Current Leakage
Vo=0V VDD=3V T=25°C1 VDD=3V IOL=0.3mA 0.8 V Vo=3V VDD=3V T=25°C01Output Current Leakage
Vo=3V VDD=3V T=-25~85°C310
SS
)
DD
0.7 V
)
V
DD-
0.3
PIN DESCRIPTION
Pin No. Symbol I/O Description
1 KI7 IP Key Sense Input Pin 2 SMS I System Mode Selection Input Pin
3~6 C0~C3 IP Key Sense Input Pins
7MD 8D
9~13 KO7~KO3 OD Scan Driver Pins
14 V
15~17 KO2~KO0 OD Scan Driver Pins
18 OSC I Oscillator Input Pin 19 T2 I Test Pin 2 20 T1 I Test Pin 1
21~27 KI0~KI6 IP Key Sense Input Pins
28 V
OUT
OUT
SS
DD
Power Negative Power Supply
Power Positive Power Supply
Generated Output Data Pin modulated with
O
1/12 oscillator frequency at a 25% duty factor
O Generated Output Data Pin
SC3010
DD
0.3 V
DD
NOTE
IP= Input with p-channel pull-up transistor;
OD = Output with open drain n-channel transistor
V
V
µA
µA
µA
V
µA
µA
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
Rev: 2.1 2002-02-28
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Silan Semiconductors
FUNCTIONAL DESCRIPTION
1. KEY INPUT OPERATI ON
A Key Input Operation may be considered legal or illegal depending on the keys pressed. For key interconnection refer to the application circuit diagram in APPLICATION CIRCUIT SECTION. The maximum value of the switched key contact series resistance is 7kΩ.
a). Legal Key Input
A legal key input operation enables the device to activate the corresponding codes. A key input operation is considered as legal if it is 1). a connection of one K-Input (KI0~KI7) to one K-Output (KO0~KO7), or 2).a connection of one C-Input(C0~C3) to one K-Output (KO0~KO7) when the System Mode Selection (SMS) Pin is in a LOW state. If the SMS is in a HIGH state, then a wired connection must be made between a C-Input to a K-Output in order to generate the system number. For connections consisting of one K-Input or C-Input to more than one K-Output Pins, the last scan signal is recognized as LEGAL.
b). Illegal Key Input
An illegal key input operation does not produce any activity. No activity will be generated if 1) two or more K­Input/C-Input Pins or 2) C-Input and K-Input Pins are activated simultaneously. The oscillator will not start. Thus, this operation is considered as ILLEGAL.
2. INPUTS: KI0~KI7 & C0~C3
In the quiescent state, the command inputs KI0~KI7 are pulled HIGH by an internal pull-up transistor. Also if the system is quiescent and the System Mode Selection Input (SMS) is in High state so that current flow may be prevented. A wired connection in the C-KO Matrix provides 32 systems.
3. DATA OUTPUT
One Code
MSB
SC3010
LSBLSB MSB
Debounce Time
(16-Bit Time)
Where: debounce time+ scan time=18 bit-times, Repetition time=4x16 bit-times
Scan
Start Bit
Time (2-Bit Time)
First Code Second Code
Repetition Time
Figure 1: Data Output Format
System Bits Command Bits
Control
Bit
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Silan Semiconductors
The generated information is transmitted through the output signal D Start Bits (2xLogic 1), 1 Control Bit, 5 System Bits, and 6 Command Bits. Please refer to the diagram above for the data output format. (See also Command and System Matrixes).
After a legal key operation is performed, the KO outputs are switched off and a 16-bit debounce time period is experienced followed by a 2-bit scan cycle time. During the scanning cycle the outputs are switched to the conductive state one at a time.
Code is transmitted using a biphase technique. Please refer to the diagram below. The MDOUT Output Signal transmits the generated data modulated by 1/12 of the oscillator frequency with a 25% duty factor.
Logic 1 Logic 0
where: 1 bit-time=3x28xTosc=1.688ms (typ. Tosc=1/455KHz)
Figure 2: Biphase Code Transmission Technique
. The Data Output Code consists of 1.5
OUT
SC3010
Both the D Outputs (KO0~KO7) are open drain n-channel and conduct when the circuit is in the quiescent state.
4. SYSTEM MODES
a). Combined System Mode (SMS=Low)
The KI and the C Sense Inputs have p-channel pull-up transistors (meaning they are normally in HIGH state). They are pulled to LOW state when an output is connected, to them as a result of a legal key operation. A legal key operation in the KI-KO or C-KO Matrix will initiate a debounce cycle. Once key contact has been established for 18­bit time without any interruption, the Oscillator Enable Signal is latched and the key may be released. The device is reset when there is an interruption during the 18-bit time period. At the end of the debounce cycle, KO Outputs are switched off and two scan cycles begins.
When KI or C Input senses a low level output, a Latch-Enable Signal is fed to the System (C-Input) or Command (KI-Input) Latches. After latching a system number, the device will generate the last command (i.e. all command bits logic 1) in the selected system for as long as the key is pressed. Latching of a command number causes the chip to generate this command together with the system number stored in the system latch. By releasing the key, the device will be reset if no data is to be transmitted at the time. The complete code frame is transmitted even if the key is released during code transmission.
and the MD
OUT
are non-conducting (3-state outputs) when in the quiescent state. The Scan Driver
OUT
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Silan Semiconductors
b). Single System Mode (SMS=High)
In the Single SystemMode, the KI-Sense Inputs are also pulled High by the p-channel pull-up transistors, as in the Combined System Mode. The C-Sense Inputs, however, are disabled by switching off their pull-high transistors. A system code is provided by a wired connection between the C-KO Matrix. The debounce cycle can ONLY be started by any legal key operation in the KI-KO Matrix. Once the key contact has been established for 18-bit time without any interruption, the Oscillator-Enable Signal is latched and the key may be released. Any interruption during the 18­bit time period resets the internal action.
At the end of the debounce cycle, the pull-up transistors in the KI-Lines are then switched off and the pull-up transistors in the C-lines are turned ON for the first scan cycle. The wired connection in the C-matrix matrix is then translated into a system number and stored in the system latch. At the end of the first scan cycle, 1) the C-Input pull­up transistors are switched off and the inputs are again disabled, 2) KI-Sense Input pull-up transistors are turned on. The command number is generated by the second scan cycle. This command number is then latched and transmitted together with the system number.
5.KEY RELEASE DETECTION
An additional control bit is complemented after key release. This additional control bit tells the decoder that the next code is a new command. This feature is important in cases where more digits are needed to be inputted (i.e. Teletext channel numbers or Viewdata pages). The extra control bit will only be complemented after the completion of at least one code transmission. The scan cycles are repeated before every code transmission; thus, even with the Take Over of key operation during the code transmission, the correct system and command numbers are generated.
6.RESETTING THE DEVICE
The device will immediately reset under the following conditions:
1). A key is released during the debounce time
2). A key is released between two codes
3). During Matrix Scanning a). A key is released while one of the drivers outputs is in the low ohmic state (Logic 0) b). A key is released before that key has been detected. c). There is no wired connection in the C-KO Matrix when SMS is in High State.
SC3010
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7.OSCILLATOR
The OSC is a 1-pin oscillator input/output terminal. The oscillator is constructed by connecting in series a ceramic
resonator like TOKO CRK429.
8. TEST MODE
When T1,T2 and OSC Pins are in HIGH State, the circuit initializes. All internal nodes except for the LATCH are
defined. The latch is defined when a scan cycle starts by pulling down a KI or a C Input while the oscillator is active.
If the debounce cycle has been completed, then the scan cycle can be accomplished 3x2 the T1 to HIGH. If the scan cycle has been completed, the Latch contents can be read 3x2 theT2toHIGH.
SC3010
3
times faster by setting
7
times faster by setting
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Rev: 2.1 2002-02-28
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Silan Semiconductors
SC3010 COMMAND MATRIX DATA CODE
The Command Matrix Data Code is given in the table below:
No.
0 1 2 34 56 70 123 45 6 7 54 3 2 10
0
1
2
3
4
5
6
7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
25
• •
26
• •
27
28
• •
29
30
31
KI-Line KO-Line Command Bits
SC3010
000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 010101 010110 010111 011000 011001 011010 011011 011100 011101 011110 011111
(to be continued)
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(continued)
No.
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
Silan Semiconductors
KI-Line KO-Line Command Bits
0 1 2 34 56 70 123 45 6 7 54 3 2 10
• •
• •
• •
• •
• •
SC3010
100000 100001 100010 100011 100100 100101 100110 100111 101000 101001 101010 101011 101100 101101 101110 101111 110000 110001 110010 110011 110100 110101 110110 110111 111000 111001 111010 111011 111100 111101 111110 111111
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SC3010 SYSTEM MATRIX DATA CODE
The System Matrix Data Code for K-KO Lines are given in the table below:
System No. C-Line KO-Line System Bits
0 1 2 3 0 1 2 3 4 5 6 7 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
SC3010
00000 00001 00010 00011 00100 00101 00110
00111
01000 01001 01010 01011 01100 01101 01110
01111
10000 10001 10010 10011 10100 10101 10110
10111
11000 11001 11010 11011 11100 11101 11110
11111
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APPLICATION CIRCUIT
SC3010
1213 10111617 915
KO0KO
21 22 23 24 25 26
KI
0
KI
1
KI
2
KI
3
KI
4
KI
5
1
KO2KO3KO4KO5KO6KO
7
DD
V
28
47F
Vss
14
SC3010
KI
6
27
7
KI
1
C0
3
C1
4
C2
5
C3
IR LED
6
V
MD
OUT
SMS T1 T2 OSC
DD
V
DD
270
¡
Resonator
D
OUT
87 2 20 19 18
1
¡
NOTE: There is a connection between the C0~C3 Lines and KO0~KO7 Lines if SMS is tied to VDD.
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Rev: 2.1 2002-02-28
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CHIP TOPOGRAPHY
25 24 23 22 21 20 19 18
26
27
SC3010
17 16
15
28
1 2
size: 1.71 x 1.69 mm
2
14 13 12
11109876543
PAD COORDINATES
No. Symbol X Y No. Symbol X Y
1 P1 -674.50 -407.50 15 P15 693.50 -49.00 2 P2 -674.50 -554.00 16 P16 693.50 91.00 3 P3 -674.50 -704.00 17 P17 693.50 231.00 4 P4 -450.50 -704.00 18 P18 537.00 680.50 5 P5 -309.75 -704.25 19 P19 386.75 680.50 6 P6 -146.50 -704.25 20 P20 246.75 680.50 7 P7 -18.75 -704.25 21 P21 97.25 680.50 8 P8 221.75 -704.25 22 P22 -42.75 680.50
9 P9 400.25 -704.25 23 P23 -192.25 680.50 10 P10 539.25 -704.25 24 P24 -332.00 680.50 11 P11 679.00 -704.25 25 P25 -481.50 680.50 12 P12 693.50 -468.75 26 P26 -674.50 614.50 13 P13 693.50 -329.00 27 P27 -674.50 449.00 14 P14 693.50 -189.00 28 P28 -674.50 267.375
Note: The original point of the coordinate is the die center.
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
(Unit: µm)
Rev: 2.1 2002-02-28
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PCB WIRE LAYOUT SCHEMATIC:
SC3010
Transmitting tube output ground line
The transmitting tube ground line and IC ground line should layout separated or overstriking ground line.
The above IC only use to hint, not to specified.
Note:
* In wire layout, the power filter capacitor should near to IC.
* In wire layout, should avoid power line and ground line too long.
* Recommended infrared transmit unit and IC ground line should layout separated, or overstriking lines.
* The emitter of triode connect 1
* Recommended triode use 9014.
resistor at least.
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2
Semiconductors
PACKAGE OUTLINE
DIP-28-600-2.54 UNIT: mm
2.54
0.25
B
13.8
SC3010
0.05
B
0.25
15.24(600)
0.46B0.08
1.52B0.5
4.96MAX3.00MIN
.16MAX
37.34B0.3
0.5MIN
15 degree
SOP-28-375-1.27 UNIT: mm
0.4
0.3
B
B
17.75B0.25
1.27
0.45
7.6
10.2
B
0.1
9.525(375)
0.15B0.05
16.51
2.8 MAX
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Attach
Semiconductors
SC3010
Revision History
Data REV Description Page
2001.11.07 2.0 Modify the “Absolute maximum rating “
2002.02.28 2.1
Modify the “Application circuit “ Add the “PCB wire layout schematic” Modify the “package outline”
2 11 13 14
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