Datasheet SA56600-42 Datasheet (Philips) [en, ca]

INTEGRATED CIRCUITS

SA56600-42

System reset for lithium battery backup

Product data
Supersedes data of 2001 Apr 24
File under Integrated Circuits, Standard Analog

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2001 Jun 19

Philips Semiconductors Product data

TYPE NUMBER

SA56600-42System reset for lithium battery back-up

GENERAL DESCRIPTION

The SA56600-42 is designed to protect SRAM data in computer
systems during periods of sagging power supply voltages and power
outages. When the power supply voltage drops to typically 4.2 V , the
CS output goes to a logic LOW state pulling CE to a LOW state,
disabling the SRAM device. In addition, a reset logic LOW is asserted
for system use. If the supply voltage drops further, to 3.3 V typically
or lower, the SA56600-42 switches the system’s operation from the
main power supply source to the Lithium back-up battery. As the
main supply is restored and the voltage rises to 3.3 V or higher, the
SRAM support voltage transfers from the Lithium back-up battery to
the main supply. When the main supply voltage rises to greater than
typically 4.2 V, the CS output goes to a logic HIGH state for SRAM
CE control. Reset assertion is released and normal operation is
resumed. This sequence ensures reliable preservation of SRAM
data during periods of supply deficiency and interruptions.

The SA56600-42 is offered in the SO8 surface mount package.

FEA TURES

• Supply switching at 4.2 V

threshold (falling supply)

DC

• RESET output

• Both CS and CS outputs available for SRAM control

• During battery back-up operation:

– Low supply current (0.3 µA typical)
– Low input/output voltage drop (0.3 V typical at 100 µA)
– Low reverse current leakage (0.1 µA max.)

• During normal operation:

– Low input/output voltage drop (0.2 V typical at 50 mA)
– 4.8 V typical output voltage at 50 mA with V
– Restoration of main supply operation at 3.3 V

SIMPLIFIED SYSTEM DIAGRAM

SA56600-42

V

CC

8

= 5.0 V

CC

3.3 V

DETECTION

CITCUIT

4.2 V

DETECTION

CITCUIT

APPLICATIONS

• Memory cards (SRAM)

• PCs, word processors

• FAX machines, photocopiers, office equipment

• Sequence controllers

• Video games and other equipment with SRAM

V

OUT

6

V

BATT

4

V

CC

V

DD

SRAM

CE

GND

2

CS

3

5CS

R

PU

RESET

LITHIUM

BATTERY

R

ORDERING INFORMATION

GND

1

7
Y

SL01277

Figure 1. Simplified system diagram.

PACKAGE
NAME DESCRIPTION

TEMPERATURE
RANGE

SA56600-42D SO8 plastic small outline package; 8 leads; body width 3.9 mm –40 to +85 °C

2001 Jun 19 853–2249 26559

2

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

Part number marking

The package is marked with a four letter code in the first line to the
right of the logo. The first three letters designate the product. The
fourth letter, represented by ‘x’, is a date tracking code. The
remaining two or three lines of characters are internal manufacturing
codes.

5

6

7

8

PIN CONFIGURATION

1

GND

2

RESET

3

CS

4

V

BATT

TOP VIEW

SO8

8

7

6

5

SL01278

V

Y

V

CS

CC

OUT

Figure 2. Pin configuration.

2

1

3

4

Part number Marking

SA56600-42 A A A x

PIN DESCRIPTION

PIN SYMBOL DESCRIPTION

1 GND Circuit ground for the device.
2 RESET Asserted open collector output LOW whenever the VCC input source voltage falls below VS (4.2 V typical).

3 CS Chip select HIGH output signal, asserted whenever the VCC input source voltage is above VS (4.2 V typical).

4 V

BATT

5 CS Asserted chip select LOW output signal whenever the VCC input source voltage is above VS (4.2 V typical)

6 V

OUT

7 Y Open Emitter input to microcontroller used to enable CS output (microcontroller controls CS function).
8 V

CC

The open collector topology requires an external pull-up resistor.

Can be used as a chip enable HIGH (CE) signal for system SRAM.
Positive polarity connection for lithium back-up battery.

and Y is grounded. Can be used as a chip enable LOW (CE) signal for system SRAM.
Primary power with lithium battery back-up power for the protected system. Switch over to lithium battery

back-up operation occurs when VCC falls below VS.

Primary input power source for device.

MAXIMUM RATINGS

SYMBOL PARAMETER RATING UNIT

V

CC(max)

V

CC(op)

IO (VCC) Output current 80 mA
IO (V
T
T

) Output current 200 µA

BATT
oper
stg

P Power dissipation 250 mW

2001 Jun 19

Power supply voltage –0.3 to +7.0 V
Operating voltage –0.3 to +7.0 V

Operating temperature –40 to +85 °C
Storage temperature –40 to +125 °C

3

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

ELECTRICAL CHARACTERISTICS

Characteristics measured with VCC = 5.0 V, and T

SYMBOL

I

CC

V

SAT1

V

O1

V

O2

V

S

∆V

S

V

RSL

I

RSH

V

OPL

V

CSL

V

CSH

V

CSL

V

CSH

Supply current VCC = 5.0 V; V
I/O voltage difference 1 VCC = 5.0 V; V
Output voltage 1 VCC = 5.0 V; V
Output voltage 2 VCC = 5.0 V; V
Detection threshold VCC falling 4.00 4.20 4.40 V
Detection hysteresis ∆VS = VSH (rising VCC) – VSL (falling VCC) – 100 – mA
Reset output LOW VCC = 3.7 V – 0.2 0.4 V
Reset leakage current HIGH VCC = 5.0 V; VRS = 7.0 V – ±0.01 ±0.1 µA
Reset assertion

(minimum operating voltage)
CS output voltage LOW VCC = 3.7 V; V
CS output voltage HIGH VCC = 5.0 V; V
CS output voltage LOW VCC = 5.0 V; V
CS output voltage HIGH VCC = 3.7 V; V

PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆VS/∆T Detection voltage temperature

characteristic

V

BT

V

BT(HYS)

Battery back-up threshold VCC falling 3.15 3.30 3.45 V
Battery back-up hysteresis V

VBT/∆T Switching voltage temperature

characteristic

I

L

V
V
V
V
I

BL

I

YLO

t

PLH

t

PHL

SAT2
O3
O4
REF

Loss current VCC = 0 V; V
I/O voltage difference 2 VCC = 0 V; V
Output voltage 3 VCC = 0 V; V
Output voltage 4 VCC = 0 V; V
Reference voltage (typical) – 1.25 – V
V

leakage current VCC = 5.0 V; V

BATT

Y current VCC = 5.0 V; V
Y propagation delay time (Note 1) VY = logic LOW to logic HIGH – 8.0 20 ns
Y propagation delay time (Note 1) VY = logic HIGH to logic LOW – 8.0 20 ns

NOTE:

1. Y

input rise and fall time less than 6.0 ns. 15 pF capacitance load on CS (Pin 5 to GND).

= 25 °C, unless otherwise specified.

amb

BATT

= 3.0 V; IO = 1.0 mA – 0.03 0.05 V

BATT

= 3.0 V; IO = 1.0 mA 4.95 4.97 – V

BATT

= 3.0 V; IO = 15 mA 4.75 4.90 – V

BATT

V

≤ 0.4 V; VCC falling; RPU = 10 kΩ – 0.8 1.2 V

RSL

= 3.0 V; ICS = 1.0 µA – – 0.1 V

BATT

= 3.0 V; ICS = –1.0 µA 4.90 – – V

BATT

= 3.0 V; ICS = 1.0 µA – – 0.2 V

BATT

= 3.0 V; ICS = –1.0 µA VO – 0.1 – – V

BATT

–40 ≤ T

amb

V

(VCC rising) – V

BTH

BT(HYS)

–40 ≤ T

amb

= 3.0 V; IO = 0 µA – 0.3 0.5 µA

BATT

= 3.0 V; IO = 1.0 µA – 0.2 0.3 V

BATT

= 3.0 V; IO = 1.0 µA 2.7 2.8 – V

BATT

= 3.0 V; ICS = 100 µA 2.6 2.7 – V

BATT

BATT

= 3.0 V; IO = 0 mA – 1.4 2.2 mA

≤ +85 – – ±0.05 %/°C

=

(VCC falling)

BTL

– 100 1.0 mV

≤ +85 – – ±0.05 %/°C

= 0 V – – 0.1 µA

BATT

= 3.0 V; VY = 0 V – 150 400 µA

2001 Jun 19

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Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

TYPICAL PERFORMANCE CURVES

5.0

T

= –40 °C

4.9

4.8

4.7

, OUTPUT VOLTAGE (V)

OUT

4.6

V

4.5
01020304050607080

amb

T

= 25 °C

amb

T

= 85 °C

amb

T

= 125 °C

amb

I

, OUTPUT CURRENT (mA)

OUT

VCC = 5.0 V
V

= 3.0 V

BATT

Figure 3. Output voltage versus output current.

3.0

2.9

2.8

2.7

2.6

2.5

, OUTPUT VOLTAGE (V)

O

V

T

= 25 °C

amb

2.4
T

= –40 °C

amb

2.3

0 200 400 600 800 1000

VCC = 0 V
V

= 3.0 V

BATT

IO, OUTPUT CURRENT (mA)

T

amb

T

= 125 °C

= 85 °C

amb

Figure 5. Output voltage versus current.

SL01330

SL01331

5.3
VCC = 5.0 V

V

= 3.0 V

BATT

5.2

RESET, RESET, CS, CS = OPEN
Y = GND

5.1

I

20 mA

OUT

= 0 mA

5.0

4.9

4.8

, OUTPUT VOLTAGE (V)

4.7

OUT

V

4.6

4.5

–50 –25 0 25 50 75 100 125

80 mA

40 mA

60 mA

T

, TEMPERATURE (°C)

amb

Figure 4. Output voltage versus temperature.

3.0
VCC = 0 V

V

= 3.0 V

BATT

2.9

2.8

2.7

2.6

2.5

, OUTPUT VOLTAGE (V)

O

V

2.4

2.3

, RESET, CS, CS = OPEN

RESET

Y = GND

800 µA

1000 µA

–50 –25 0 25 50 75 100 125

T

, TEMPERATURE (°C)

amb

I

OUT

600 µA

= 1.0 µA

200 µA

400 µA

Figure 6. Output voltage versus temperature.

SL01332

SL01333

5.0
V

= OPEN

OUT

V

= 3.0 V

BATT

T

= 25 °C

amb

0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10

VCC, SUPPLY VOLTAGE (V)

, SUPPLY CURRENT (mA)

CC

I

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

Figure 7. Supply current versus supply voltage.

2001 Jun 19

SL01334

15

IO = 0 mA

V

= 3.0 V

BATT

T

= 25 °C

amb

10

5.0

0

, BATTERY CURRENT (nA)

–5.0

BATT

I

–10

0 1.0 3.0 5.04.02.0 6.0 8.07.0 9.0 10.0

VCC, SUPPLY VOLTAGE (V)

SL01335

Figure 8. Battery current versus supply voltage.

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Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

4.30
VCC = FALLING

V

= 3.0 V

BATT

RESET, CS = OPEN

Y = GND

4.25

4.20

4.15

, DETECTION THRESHOLD (V)

S

V

4.10

–50 –25 0 25 50 75 100 125

T

, TEMPERATURE 〈°C)

amb

Figure 9. Detection threshold versus temperature.

3.00
V

= 3.0 V

BATT

= OPEN

V

OUT

2.75

2.00

1.75

SL01336

150

125

∆VS = VSH – V
(VCC = Rising then Falling)
V

BATT

RESET, CS, V
Y = GND

SL

= 3.0 V

OUT

100

75

, DETECTION THRESHOLD (mV)V

S

∆

50

–50 –25 0 25 50 75 100 125

T

, TEMPERATURE (°C)

amb

Figure 10. Detection hysteresis versus temperature.

4

10

VCC = 5.0 V

= 0 V

V

BATT

3

10

2

10

= OPEN

SL01337

1.50

1.25

, POWER SUPPLY CURRENT (mA)I

CC

1.00

–50 –25 0 25 50 75 100 125

T

, TEMPERATURE (°C)

amb

Figure 11. Power supply current versus temperature.

4

10

VCC = 0 V
V

= 3.0 V

BATT

I

= 0 µA

OUT

3

10

2

10

1

10

, BATTERY LOSS CURRENT (nA)I

BL

0

10

–50 –25 0 25 50 75 100 125

T

, TEMPERATURE (°C)

amb

Figure 13. Battery loss current versus temperature.

SL01338

SL01334

1

10

, OUTPUT REVERSE CURRENT (nA)I

OR

0

10

–50 –25 0 25 50 75 100 125

T

, TEMPERATURE (°C)

amb

Figure 12. Output reverse current versus temperature.

SL01339

2001 Jun 19

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Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

CS

TECHNICAL DESCRIPTION

The SA56600-42 provides battery back-up functions to protect
SRAM data in computer memory systems. In addition, it provides
RESET, Chip Select HIGH (CS), and Chip Select LOW (CS
outputs. The device incorporates a 3.3 V detection circuit,

4.2 V detection circuit, PNP switching transistor, and Schottky diode
for low drop lithium battery connection to the output.

During power-up, RESET
V

voltages as low as 0.8 V and does not output a release (HIGH

CC

logic state) until V

is actively asserted (LOW logic state) at

attains 4.2 V plus hysteresis. CS, in a similar

CC

manner, only transitions to a HIGH logic state when V

4.2 V plus hysteresis. This ensures adequate voltage being present
at the output of the SA56600 for proper operation of the associated
computer system.

If the V

voltage falls below 4.2 V, CS and RESET both go to a

CC

LOW logic state. During this time, with CS in a LOW logic state, no
data ca be read from, or written to, the SRAM device. If the primary
voltage (V

) continues to fall to 3.3 V and below, the PNP

CC

switching transistor disconnects the primary input source power
(V

) from the output and the Schottky diode automatically couples

CC

the lithium battery power to the output of the SA56600 to supply
sustaining power to the SRAM memory.

The SA56600 provides complementary CS and CS
outputs differ in ways other than being simple complements of each
other. The logic state of CS is strictly a function of V
When V
state. When V

is above 4.2 V plus hysteresis, CS is in a HIGH logic

CC

is below 4.2 V, CS is in a LOW logic state.

CC

)

attains

CC

outputs. The

voltage.

CC

goes to a LOW logic state only when VCC is above 4.2 V plus
hysteresis, and Y
a LOW logic state (is open or at a HIGH logic state) CS
HIGH logic state. Essentially, Y

is simultaneously at a LOW logic state. If Y is not

will be at a

functions as a control switch for CS
and is normally used as an input gating signal from the computer’s
microprocessor.

Caution should be exercised in the application to keep the voltage
on Y

to less than 5.0 V when the VCC voltage is less than 4.2 V to
avoid breaking down the Emitter-Base junction of the internal NPN
transistor associated with Y. Breakdown of the junction may produce
excessive current flow causing damage to the device. When the
V

voltage is less than 4.2 V, the base of the NPN transistor

CC

associated with the Y
to an overvoltage on Y

is at a LOW logic state and most susceptible

.

Recovering primary VCC power is sensed by the 3.3 V detection
circuit. The PNP switching transistor is activated when the applied
V

voltage reaches 3.3 V plus hysteresis. When this event occurs,

CC

the Schottky diode becomes back-biased, automatically
disconnecting the lithium battery from the output and the SRAM is
once again supported by the primary V
operation is restored when the applied primary V

power source. Full

CC

voltage reaches

CC

the required 4.2 V plus hysteresis value. This level is sensed by the

4.2 V detection circuit. RESET

and CS are then caused to go to a
HIGH logic state, and the computer memory is back in full operation
without any loss of SRAM data.

V

SA56600–42

V

GND

CC

8

R

R

47 kΩ

7

Y

R

R

R

CS

R
47 kΩ

3

5

CS

R

RR

R

C1 C2

R

1

R

R

2

RESET

R

R

R

R1 = OVERVOLTAGE CURRENT LIMITING RESISTOR

C1, C2 = POWER SUPPLY BYPASS CAPACITOR

R

PNP
SWITCHING
TRANSISTOR

RR

OUT

6

V

BATT

4

LITHIUM

BATTERY

1

Figure 14. Functional diagram.

VOLTAGE

TO SRAM

R1

GND

SL01342

2001 Jun 19

7

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

Timing diagram

The Timing Diagram shown in Figure 15 depicts the operation of the
SA56600-42 in its intended application, with a 3.0 V Lithium battery
serving as a backup power source for external SRAM circuitry (see
the Simplified system diagram, Figure 1). Letters indicate events
along the Time axis.

A: At ‘A’, the V
backup battery, the CS
Lithium battery potential (V

primary power source is off. As a result of the

CC

and V

outputs are almost up to the

OUT

). All other outputs (Y, RESET, and CS)

B

are at or very near ground potential.
B - C: At ‘B’, the V

voltage begins to rise. Also the RESET

CC

voltage initially rises but then abruptly returns to a LOW state at ‘C’.
when the V
bias circuitry and asserts RESET

voltage reaches the level which activates the internal

CC

to a logic LOW. This occurs at

approximately 0.8 volts.
D - E: At ‘D’ the internal 3.3 V detection circuit is activated when

V

voltage rises to 3.3 V. The circuit causes the PNP series pass

CC

switching transistor in the output to activate, connecting the main
power supply voltage (VCC) to the output. This causes the Lithium
battery to be automatically disconnected from V
the Schottky diode. As a result, CS

and V

OUT

by back-biasing

OUT

begin to rise with VCC.

E: At ‘E’, VCC has risen to the upper detection threshold (VS plus
hysteresis) as sensed by the device’s internal 4.2 V detection circuit.
This event signals that the output voltage is adequate to support full
operation of the associated external computer circuitry. RESET

goes
HIGH, allowing the microprocessor circuitry to operate.
Simultaneously, CS also goes HIGH, signaling the SRAM to start
receiving data. CS

goes LOW as a result of Y simultaneously being

at a LOW state.
Y

controls the CS output. As long as Y is LOW, the CS output is

enabled.

F: As V
rise. Just before ‘F’, Y
circuitry. This causes CS
state. Following ‘F’ the microprocessing circuitry is signaling Y
through repetitive cycles. This causes CS to also cycle, but has no
effect on the battery circuit.

G: At ‘G’, the V
and V

H: When the V

internal 4.2 V detector circuit. The detector circuit forces RESET

CS LOW, deselecting the SRAM and stopping data storage and
retrieval. The PNP series pass switching transistor disconnects the
primary input source voltage from the output, transferring the SRAM
to the backup battery. In addition, because Y
state, CS
V

B

J: At ‘J’, V
dictated by the Lithium battery potential. The Lithium battery is now
maintaining the V

K - L: As the VCC voltage falls to a level which no longer allows the
internal bias circuitry to remain active, the assertion of RESET
no longer be maintained. RESET
as V

M: Y
V

CC

preventing the SRAM from being selected.

continues to rise, RESET, CS, and V

CC

also continue to

OUT

is asserted HIGH by the microprocessing

to change from a LOW state to a HIGH

voltage begins to fall. As a result RESET, CS,

CC

fall.

CC

voltage falls to VS (4.2 V) it is detected by the

CC

is already at a LOW

rises abruptly close to VS followed by a continued fall to

(Lithium battery potential), following VCC.

has also fallen with VCC to a level that is now

OUT

voltage to preserve the SRAM data.

OUT

rises slightly, then falls to ground

falls to ground.

CC

is asserted HIGH again by the microprocessor, but because

is below VS, CS remains HIGH and CS remains LOW,

and

can

V

RESET

CS

CS

V

OUT

5.0
V

S

V

CC

Y

B

V

OPL

0

0

V

TIME

V

CSL

V

O1, O2

RSH

V

CSH

V

V

O3, O4

RSL

≤V

B

V

V

CSL

CSH

0

0

0

0

ABCDEF GHJ K

Figure 15. Timing diagram.

L

SL01341

2001 Jun 19

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Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

PACKING METHOD

GUARD

BAND

BARCODE

LABEL

BOX

TAPE

REEL
ASSEMBLY

Figure 16. Tape and reel packing method.

TAPE DETAIL

COVER TAPE

CARRIER TAPE

SL01305

2001 Jun 19

9

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

SO8: plastic small outline package; 8 leads; body width 3.9 mm

1.73

0.068

pin 1 index

B

2

4.95

4.80

0.189

0.195

0.51

0.33

0.013

0.020

4.95

4.80

1.27

0.38

0.050

0.015

0.076

0.003

2001 Jun 19

SO8

10

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

NOTES

2001 Jun 19

11

Philips Semiconductors Product data

SA56600-42System reset for lithium battery back-up

Data sheet status

Product

Data sheet status

Objective data

Preliminary data

Product data

[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on

the Internet at URL http://www.semiconductors.philips.com.

[1]

status

Development

Qualification

Production

[2]

Definitions

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.

This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 2001

All rights reserved. Printed in U.S.A.

Date of release: 06-01

Document order number: 9397 750 08448

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

2001 Jun 19

12