Datasheet RF9958, RF9958PCBA Datasheet (RF Micro Devices)

Page 1
RF9958
5
Typical Applications
• CDMA/FM Cellular Systems
• CDMA PCS Systems
• Wireless Local Loop Systems
Product Description
The RF9958 isan integrated complete Quadrature Modu­lator, IF AGC amplifier, and Upconverter designed for the transmit section of dual-mode CDMA/FM cellular and PCS applications. It is designed to modulate baseband I and Q signals, amplify the resulting IF signals while pro­viding 95 dB of gain control range, and perform the final upconversion to UHF. NoiseFigure, IP
cations are designed to be compatible with the IS-98 Interim Standard for CDMA cellular communications. This circuit is designed as part of RFMD’s newest CDMA Chip Set, which also includes the RF9957 CDMA/FM Receive IF AGC and Demodulator. The IC is manufactured on an advanced 15GHz F
Silicon Bipolar process, and is sup-
T
plied in a 28-lead plastic SSOP package.
, and other specifi-
3
CDMA/FM TRANSMIT MODULATOR, IF AGC,
AND UPCONVERTER
• Spread Spectrum Cordless Phones
• High Speed Data Modems
• General Purpose Digital Transmitters
6.20
5.79
3.99
PIN 1
INDENT
0.25
0.10
3.81
10.01
1.27
0.38
NOTES:
1. Shaded lead is Pin1.
2. Lead frame material: Copper 194
3. Mold flash shall not exceed 0.006 (0.15 mm) per end.
4. Interlead flash shall not exceed 0.010 (0.25 mm) per side.
5. All dimensions are excluding mold flash and protrusions.
9.80
0.25
0.10
1.73
1.47
0.36
0.23
0.635 TYP
TYP
5
UPCONVERTERS
MODULATORS AND
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
ü
Si Bi-CMOS
Q SIG
2
Q REF
3
LO1-
8
LO1+
9
I REF
5
I SIG
4
Quad.
÷
SiGe HBT
MODE
1
Σ
2
Band Gap Reference
10
13
PD1
GOUT
27
Gain
Control
15
GC
PD2
Si CMOS
17
LO2+
RF OUT
25 24 21 22
2019
LO2-
Functional Block Diagram
MOD OUT+ MOD OUT­MIX IN­MIX IN+
Package Style: QSOP-28
• Supports Dual Mode Operation
• Digitally Controlled Power Down Modes
• 2.7V to 3.3V Operation
• Digital First LO Quadrature Divider
• Double-Balanced UHF Upconvert Mixer
•IFAGCAmpwith95dBGainControl
Ordering Information
RF9958 CDMA/FM Transmit Modulator, IF AGC,and Upcon-
RF9958 PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro,NC 27409, USA
verter
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev B11 010720
5-93
Page 2
RF9958
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.5 to +5 V Power Down Voltage (VPD) -0.5toVCC+0.7 V I and Q Levels, per pin 1 V LO1 Level, balanced +3 dBm
LO2 Level, balanced +6 dBm Operating Ambient Temperature -40 to +85 °C Storage Temperature -40 to +150 °C
DC
PP
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice.RF Micro Devices does not assume responsibility for the use of the described product(s).
5
Parameter
Min. Typ. Max.
I/Q Modulator & AG C
I/Q Input Frequency Range 0 to 20 MHz Balanced I/Q Input Impedance 50 80 110 k Balanced I/Q Input Reference Level 0.6 V
LO1/FM Frequency R ange 100 to 360 MHz LO1/FM Input Level -15 -8 -5 dBm
UPCONVERTERS
MODULATORS AND
LO1/FM Input Impedance 170 200 230 Balanced Sideband Suppression 35 40 dBc I/Q Amplitude adjusted to within ±20mV
Carrier Suppression 40 50 dBc I/Q DC Offset adjusted to within ±20mV
Max Output, FM Mode +2.5 +4 dBm V Max Output, CDMA Mode -3 0 dBm V
Min Output, CDMA Mode -95 -89 dBm V
Output Power Accuracy -3 +3 dB T=-20 to +85°C, Ref=25 °C
Adjacent Channel Power Rejec-
tion @ 885kHz
Adjacent Channel Power Rejec-
tion @ 1.98MHz
Output No ise Power -116 -111 dBm/Hz P
Output Impedance 170 200 230 Balanced Power Dissipation 150 mW T=-20°C to +85°C
UHF Upconverter
Conversion Gain -1 0.5 dB Noise Figure (SSB) 15 dB Output IP3 +14 dBm IF Input Impedance 170 200 230 Balanced IF Input Frequency Range 50 to 180 MHz LO2 Input Impedance 50 Single Ende d LO2 Input Level -6 -3 0 dBm LO2 Input Frequency Range 700 to 1100 MHz RF to LO2 Isolation 20 dB
Specification
30 dBc Unadjusted
30 dBc Unadjusted
-2 0 dB m ISIG=QSIQ=300mVpp@ 100kHz
-2 +2 dB 1.4VGC2.5
-55 dBc IS-95A CDMA Modulation
-67 dBc IS-95A CDMA Modulation
-137 -132 dBm/Hz P
-164 -159 dBm/Hz P
Unit Condition
DC
T=25°C, VCC=3.0V, Z LO1=-8dBm@260M Hz,
LO2=-3dBm@960MHz, I SIG=Q SIG=300mV
RF Output externally matched
Per Pin
=2.5 VDC,T=-20°Cto+85°C
GC
=2.5 VDC,T=-20°Cto+85°C,
GC
IS-95A CDMA Modulation
=0.5 VDC,T=-20°Cto+85°C,
GC
IS-95A CDMA Modulation
P
=-5dBm
OUT
=-5dBm
P
OUT
=-3dBm,T=-20°Cto+85°C
OUT
= -23 dBm,T=-20°C to +85°C
OUT
< -70 dBm,T=-20°C to +85°C
OUT
Output externally matched
LOAD
,
PP
=50Ω,
5-94
Rev B11 010720
Page 3
RF9958
Parameter
Power Supply
Supply Voltage 2.7 3.0 3.3 V Current Consu mption 43 mA Modulator and AGC only, CDMA Mode Current Consumption 20 mA Mixer Only Power Down Current 20 µA VPD HIGH Voltage V
VPD LOW Voltage 0.5 V
Min. Typ. Max.
Specification
-0.7 V
CC
Unit Condition
5
UPCONVERTERS
MODULATORS AND
Rev B11 010720
5-95
Page 4
RF9958
Pin Function Description Interface Schematic
1MODE
Selects between CDMA and FM mode. This is a digitally controlled input. A logic “high” (≥V
(<0.5V
) selects FM mode. In FM mode, this switch enables the FM
DC
-0.7VDC) selects CDMA mode. A logic “low”
CC
amplifier and turns off the I&Q modulator. The impedance on this pin is 30k. A DC voltage less than or equal to the maximum allowable Vcc may be applied to this pin when no voltage is applied to the Vcc pins.
MODE
60 k
BIAS
60 k
5
2QSIG
Baseband input to theQ mixer. This pinis DC coupled. The DC level of
0.6V must be supplied to this pin to bias the transistor. Input imped­ance of this pin is 50kminimum. A DC voltage less than or equal to the maximum allowable Vcc may be applied to this pin when no voltage
BIAS BIAS
8k
8k
is applied to the Vcc pins.
Q SIG Q REF
3QREF
Reference voltage for the Q mixer. This voltage should be the same as the DC voltage supplied to the Q SIG pin.For maximum carrier sup-
See pin 2.
pression, DC voltage on this pin relative to the Q SIG DC voltage may be adjusted. Input impedance of this pin is 50kminimum. A DC volt­age less than or equal to the maximum allowable Vcc may be applied to this pin when no voltage is applied to the Vcc pins.
4IREF
UPCONVERTERS
MODULATORS AND
Reference voltage for the I mixer. This voltage should be the same as the DC voltage supplied tothe I SIG pin. Formaximum carrier suppres­sion, DC voltage on this pin relative to the I SIG DC voltage may be
See pin 5.
adjusted. Input impedance of this pin is 50kminimum. A DC voltage less than or equal to the maximum allowable Vcc may be applied to this pin when no voltage is applied to the Vcc pins.
5ISIG
Baseband input to the Imixer. This pin is DC coupled. The DC level of
0.6V must be supplied to this pin to bias the transistor. Input imped­ance of this pin is 50kminimum. A DC voltage less than or equal to the maximum allowable Vcc may be applied to this pin when no voltage
BIAS BIAS
8k
8k
is applied to the Vcc pins.
I SIG I REF
6 GND1
7 VCC1
8LO1+,FM+
9LO1-,FM-
5-96
Ground connection for all baseband circuits in cluding bandgap, AGC, flip-flop, modulator and FM amp. Keep traces physically short and con­nect immediately to ground plane for best performance.
Supply Voltageforthe LO1 flip-flopand limiting amponly.Thissupplyis isolated to minimize the carrier leakage.A 1nF external bypass capaci­tor is required, and an additional 0.1µF will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacito rs shouldbe minimized.The groundside of the bypass capacitors should connect immediately to ground plane.
One half of the balanced modulator LO1 input. The other half of the input, LO1-, is AC grounded for single-ended input applications. The frequency on these pins is divided by a factor of 2, hence the carrier frequency for the modulator becomes one hal f of the appliedfrequency. The single-ended input impedance is 100(balanced is 200). This pin is NOT internally DC blocked. An external blocking capacitor (1nF recommended) mustbe provided if the pin is connected to a device with DC present. When FM mode is selecte d, the output of the flip-flop divider circuit is switched to the AGC amplifier inputsand the modulator mixers are not used. Note that the frequency deviation input here w ill be reduced by a factor of two,due to the frequency divider operation.
One half ofthe balanced modulato r LO1 input. In single-ended applica­tions (100inpu t impedance), this pin is AC grounded with a 1nF capacitor.
V
CC1
100
LO1+, FM+ LO1-, FM-
V
CC1
100
See pin 8.
Rev B11 010720
Page 5
RF9958
Pin Function Description Interface Schematic
10 BG OUT
11 VCC3
12 GND1 13 PD1
14 VCC4
15 PD2
Bandgap voltage reference. This voltage, constant overtemperature and supply variation, is used to bias internal circuits. A 1nF external bypass capacitor is required.
Supply voltage for the AGC and the Bandgap circuitry. A 1nF external bypass capacitor is required and an additional 0.1µF will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane.
Same as pin 6. Power down control for overall circuit. When logic “high” (≥VCC-0.7V),
all circuits are operating; when logic “low” (0.5V), all circuits are turned off. The inputimpedance of this pin is >10k.ADCvoltageless than or equal to the maximum allowable Vcc may be applied to this pin when no voltage is applied to the Vcc pins.
Supply for the mixer stage only. The supply for the mixer is separated to maximize IF to RF isolations and reduce the carrier leakage. A 100pF external bypass capacitor is required and an additional 0.1µF will be required if no other low frequency bypass capacitors are nearby. The trace length between the pin and the bypass capacitors should be min­imized. The ground side of the bypass capacitors should connect immediately togro und plane.
Power down control for mixer only. When connected to pin 10 (BG OUT) the mixer circuits are operating; when connected to ground (0.5V), the mixer is turned off but all othercircuitsare operating. A DC voltage less than or equal to the maximum allowable Vcc maybe applied to this pin when no voltage is applied to the Vcc pins.
PD1
PD2
10 k
1k
450
5
UPCONVERTERS
MODULATORS AND
16 GND2 17 RF OUT
18 DEC
19 LO2+
20 LO2­21 MIX IN-
Ground connection for the mixer stage. Keep traces physically short and connect immediately to ground plane for best performance.
RF output pin. An external shunt inductor to VCCplus a series blocking/ matching capacitor are required for 50 output.
Current Mirror decoupling pin. A 1000pF external capacitor is required to bypass this pin. The ground side of the bypass capacitors should connect immediately to ground plane.
One half of the balancedmixer LO2 input.In single-ended applications, the other half of the input, LO2- is AC grounded. This is a 50imped­ance port. This pin is NOT internally DC blocked. An external blocking capacitor (100pF recommended) must be provided if the pi n is con­nected to a device with D C present.
One half of the balance mixer LO2 input. In single ended applications, this pin is AC grounded with a 100pF capacitor.
One half of the 200balanced impedance input to the mixer stage. This pin is NOT internally DC blocked. An external blocking capacitor (2200pF recommended) must be provided if the pin is connected to a device with DC present. If no IF filter is needed this pin may be con­nected to MOD OUT+ through a DC blo cking capacitor. An appropriate matching network may be n eeded if an IF filter is used.
V
CC4
300
RF OUT
BIAS
40
LO2+ LO2-
BIAS
40
See pin 19.
BIAS
100
MIX IN- MIX IN+
BIAS
100
Rev B11 010720
5-97
Page 6
RF9958
Pin Function Description Interface Schematic
22 MIX IN+ 23 GND2 24 MOD OUT-
Same as pin 21, except complementary input. See pin 21. Same as pin 16. One half of the balanced AGC output port. The impedance of this port
is 200balanced. If no filtering is required, this pin can be connec ted
V
CC3
to the MIX IN- pin througha DC blocking capacitor.This pin requires an inductor to V
to achieve full dynamic range. In order to maximize
CC
100
gain, this inductor should be a high-Q type and should be parallel reso­nated out with a capacitor (see application schematic). This pin is NOT DC blocked. A blocking capacitor of 2200pF is needed when this pin is connected to a DC path. An appropriate matching network may be needed if an IF filter is used.
V
CC3
100
MOD OUT­MOD OUT+
5
25 MOD OUT+ 26 DEC
Same as pin 24, except complementary output. See pin 24. AGC decoupling pin. Anexternal bypasscapacitor of 10nF capacitor is
required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect im mediately to ground plane.
27 GC
Analog gain control for AGC amplifiers. Valid control voltage ranges are from 0.5V
to 2.5VDC. The gain range for the AGC is 88dB. These
DC
voltages are valid ONLY for a 37ksource impedance. A DC voltage less than or equal to the maximum allowable Vcc may be applied to this
BIAS
21 k
pin when no voltage is applied to the Vcc pins.
UPCONVERTERS
MODULATORS AND
28 VCC2
Supply for the modulator stage only. A 10nF external bypass capacitor is required and an additional 0.1µF will be required ifno other low fre-
GC
40 k
quency bypass capacitors are nearby.The trace length betweenthe pin and the bypass capacitors should be minimized.The ground sideof the bypass capacitors should connect immediately to ground plane.
5-98
Rev B11 010720
Page 7
RF9958 Pin-Out
RF9958
MODE
Q SIG
Q REF
I REF
I SIG
GND1
VCC1
LO1+
LO1-
BG OUT
VCC3
GND1
PD1
VCC4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
VCC2
27
GC
26
DEC
25
MOD OUT+
24
MOD OUT-
23
GND2
22
MIX IN+
21
MIX IN-
20
LO2-
19
LO2+
18
DEC
17
RF OUT
16
GND2
15
PD2
5
UPCONVERTERS
MODULATORS AND
Rev B11 010720
5-99
Page 8
5
RF9958
Mode Select
Q Signal
Reference
I Signal
LO1/FM In
10 nF
Application Schematic
1
10 nF
V
CC
2
3
4
5
6
7
8
MODE
Q SIG
Q REF
I REF
I SIG
GND1
VCC1
LO1+
VCC2
MOD OUT+
MOD OUT-
GND2
MIX IN+
MIX IN-
GC
DEC
V
18 pF
82 nH 82 nH
18 pF
IF Filter,
DC Blocked
CC
Gain Control
V
CC
10 nF
10 nF
28
37 k
27
1nF
26
10 nF
25
24
23
22
21
9
LO1-
1nF
10
11
12
13
14
BG OUT
VCC3
GND1
PD1
VCC4
RF OUT
UPCONVERTERS
MODULATORS AND
1nF
Power Down 1
100 pF
10 nF
1nF
LO2-
LO2+
DEC
GND2
PD2
20
100 pF
19
100 pF
18
1000 pF
17
16
15
1nF
LO2 In
V
CC
L1
RF Out
C1
Power Down 2
5-100
Rev B11 010720
Page 9
MODE Q SIG
J3
IREF
I SIG
J2
LO IN
J1
PD1
VCC
RF9958
Evaluation Board Schemati c
(Download Bill of Materials from www.rfmd.com.)
P1
C20
µ
C3 1 nF
C4 100 nF
F
1 2 3
C2
10 nF
C1
1nF
C5
1nF
MODE GND GC
1nF
10
11
12
13
14
C6
1
2
3
4
5
6
7
8
9
P2-1
P2-3
MODE
Q SIG
Q REF
I REF
I SIG
GND1
VCC1
LO1+
LO1-
BG OUT
VCC3
GND1
PD1
VCC4
P1-1
P1-3
C19 1
µ
F
50
Ω µ
strip
1
P2
1 2 3
9958400B
R3 0
VCC GND IREF
VCC2
GC
DEC
MOD OUT+
MOD OUT-
GND2
MIX IN+
MIX IN-
LO2-
LO2+
DEC
RF OUT
GND2
PD2
P3-2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
P3
1 2 3 4 5
C8 10 nF
C15
10 nF
C16 2.2 nF
C17 2.2 nF
C12 100 pF
C18 100 pF
C11 1000 pF
GND PD1
PD1P3-4
C9
10 nF
C10 1nF
T1
1
T2
1
C13 33 pF
L2
12 nH
C7
1nF
VCC
R1
27 k
MOD OUT
J4
VCC
MIX IN
J5
LO2 IN
J6
50
Ω µ
strip
VCC
MODE
RF OUT
5
UPCONVERTERS
MODULATORS AND
J7
R2
10 k
50
Ω µ
strip
50
Ω µ
strip
50
Ω µ
strip
L1
15 nH
C14
1.3 pF
Rev B11 010720
5-101
Page 10
5
RF9958
Evaluation Board Layout
2.689" X 2.521"
UPCONVERTERS
MODULATORS AND
5-102
Rev B11 010720
Page 11
RF9958
5
UPCONVERTERS
MODULATORS AND
Rev B11 010720
5-103
Page 12
RF9958
5
MODOU TOutput Power versus Gain Control Voltage
10.0
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
MODOUT Output Power (dBm)
-80.0
-90.0
-100.0
0.5 1.0 1.5 2.0 2.5
(VCC=3.0V, 130 MHz)
GC (V)
+25°C
-30°C +85°C
-100.0
-110.0
-120.0
-130.0
-140.0
Noise Power (dBm/Hz)
-150.0
-160.0
-170.0
0.5 1.0 1.5 2.0 2.5
MODOUT Noise Power versus Gain Control
(VCC=3.0 V, 85 MHz)
GC(V)
-40C +25 C +85 C
MODOUT IM3 Suppression versus Output Level
43.0
UPCONVERTERS
MODULATORS AND
42.0
41.0
(VCC=3.0V, 130 MHz)
40.0
39.0
38.0
MODOUT Output IM3 Suppression (dBc)
37.0
-18.0 -16.0 -14.0 -12.0 -10.0 -8.0 -6.0 -4.0 -2.0
MODOUTOutputLevel (dBm)
5-104
Rev B11 010720
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