Datasheet RF9957, RF9957PCBA Datasheet (RF Micro Devices)

RF9957

0

7

Typical Applications

• CDMA/FM Cellular Systems

• CDMA PCS Systems

• Wireless Local Loop Systems

Product Description

The RF9957 is an integrated complete IF AGC amplifier
and Quadrature Demodulator designed for the receive
section of dual-mode CDMA/FM cellular and PCS appli­cations.It is designed to amplify received IF signals, while
providing100dB ofgain control range, and demodulate to
baseband I and Q signals. Noise Figure, IP

specifications are designed to be compatible with the IS­98 and J-STD-018 Interim Standard for CDMA cellular
communications. The IC is manufactured on an advanced
15 GHz F

Silicon Bipolar process, and is packaged in a

T

standard miniature 24-lead plastic SSOP package.

, and other

3

CDMA/FM RECEI VE AGC AND DEMODULATOR

• Spread-Spectrum Cordless Phones

• High Speed Data Modems

• General Purpose Digital Receivers

0.344

0.337

8°MAX

0°MIN

.157

0.150

1

0.2440

0.2284

0.012

0.008

0.025

0.0098

0.0040

0.0688

0.0532

7

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT

ü

Si Bi-CMOS

CDMA IN+

4

CDMA IN-

5

14IN SEL

FM IN+

8
9

FM IN-

Input

Select

SiGe HBT

Gain

Control

Band Gap
Reference

10 24

BG OUT

GC

23

PD

Si CMOS

FL+FL-

19

18

Quad.

÷

2

Functional Block Diagram

16
15
13
12
21
22

Q OUT+
Q OUT-

LO+
LO­I OUT+
I OUT-

0.050

0.0098

0.016

0.0075

Package Style: SSOP-2 4

Features

• Supports Dual Mode Operation (CDMA
and FM)

• Digitally Controlled Power Down Mode

• 2.7V to 3.3V Operation

• Quadrature LO Divider

• IF AGC Amp with 100dB Gain Control

Ordering Information

RF9957 CDMA/FM ReceiveAGC and Demodulator
RF9957 PCBA Fully Assembled EvaluationBoard

RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro,NC 27409, USA

Tel [phone]

Fax [phone]

http://www.rfmd.com

QUADRATURE

DEMODULATORS

Rev C11 010622

7-27

RF9957

Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage -0.5 to +5 V
Power Down Voltage (VPD) -0.5toVCC+0.7 V
Input RF Power +3 dBm

Ambient Operating Temperature -40 to +85 °C
Storage Temperature -40 to +150 °C

DC
DC

Caution! ESD sensitive device.

RF Micro Devices believes thefurnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).

7

QUADRATURE

Parameter

Min. Typ. Max.

Overall (Cascaded)

Maximum Gain +45 +50 dB V
Minimum Gain -55 -50 dB V
Gain Variation vs. V
Input IP3 -50 dBm V

Noise Figure 5 dB V

IF Input Frequency Range 50 to 250 MHz
IF Input Impedance 2040 2400 2760 Ω FM or CDMA, Balanced

I/Q Frequency Range 0 to 50 MHz
I/Q Amplitude Balance 0.1 0.5 dB

DEMODULATORS

I/Q Phase Balance 1 5 deg
Max I/Q Output Voltage 500 mV

I/Q DC Output 2.0 V
I/Q DC Offset 5 20 mV
LO Input Frequency Range 100 to 500 MHz

LO Input Level 60 to 600 mV
LO Input Impedance 680 800 920 Ω Balanced

and T -3 +3 dB VCC=2.7V to 3.3V and T=-30°C to +85°C

CC

Specification

-39 -36 dBm Gain = 35 dB, P

-4 dBm VGC=0.5V, Minimum Gain

70 dB V

1020 1200 1380 Ω FM or CDMA, Single Ended

340 400 460 Ω Single Ended

Unit Condition

T=25°C, VCC=3.0V, Z
LO=170MHz @400mV
Z

=500Ω(CDMA), ZS=850Ω (FM)

S

=2.5V, FM or CDMA Input, Balanced

GC

=0.5V, FM or CDMA Input, Balanced

GC

=2.5V, Maximum Gain

GC

=2.5V, Maximum Gain

GC

=0.5V, Minimum Gain

GC

Balanced, maximum output level

PP

DC

Common Mode
IOUT+toIOUT-;QOUT+toQOUT-

DC

Balanced

PP

Power Supply

Supply Voltage 2.7 3.0 3.3 V
Current Consumption 14.5 18 mA CDMA Mode

12.5 16 mA FM Mode
10 µA SleepMode (PD≤0.5V)

DC

=-61dBm

IN

=5kΩ,

LOAD

,IFFreq=85MHz,

PP

7-28

Rev C11 010622

RF9957

Pin Function Description Interface Schematic

1VCC1

2VCC2

3VCC3

4 CDMA IN+

Supply voltage for the LO flip-flop divider and limiting amp. This pin
may be connected in parallel with pins 2 and 3. It should be bypassed
by a 10nF capacitor. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci­tor should con nect immediately to ground plane. The part is designed
to work from a 2.7V to 3.3V supply.

Supply voltage for the bandgap, gain control bias circuitry,and AGC
stages 2, 3, and 4. This pin may be connected in parallel with pins 1
and 3. It should be bypassed by a 10nF capacitor. The trace length
between the pin and the bypass capac itor should be minimized. The
ground side of the bypass capacitor should connect immediately to
ground plane. The part is designed to work from a 2.7V to 3.3V supply.

Supply voltage for the FM and CDMA AGC input stages. This pin may
be connected in parallel with pins 1 and 2. It should be bypassed by a
10nF capacitor. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci­tor should con nect immediately to ground plane. The part is designed
to work from a 2.7V to 3.3V supply.

CDMA Balanced Input pin. This pin is internally DC biased and sho u ld
be DC blocked if connected to a device with a DC level present. For sin­gle-ended input operation, one pin is used as an input a nd the other
CDMA input is ACcoupledto ground. The balanced input impedan ce is

2.4kΩ, while the single-ended input impedance is 1.2kΩ.

BIAS BIAS

CDMA IN+

1200

Ω

1200

Ω

CDMA IN-

7

5 CDMA IN­6GND

7GND
8FMIN+

9FMIN-

10 BG OUT

11 DEC

12 LO-

Same as pin 4, except complementary input. See pin 4.
Ground connection. Keep traces physically short and connect immedi-

ately to ground plane for best performance.
Same as pin 6.

FM Balanced Input pin. This pin is internally DC biased and should be

BIAS BIAS

DC blocked if connected to a device with DC present.For single-ended
input operation, one pin is used as an input and the other FM input is
AC coupled to ground. The balanced input impedance is 2.4kΩ, while
the single-ended input impedance is 1. 2kΩ.

FM IN+

Same as pin 8, except complementary input. See pin 8.
Bandgap Voltage Reference. This voltage,constant over temperature

and supply variation, is used to bias internal circuits. A 10nF external
bypass capacitor is required. The trace length between the pin and the
bypass capacitor s hould be minimized. The ground side of the bypass
capacitor should connect immediately to ground plane.

AGC decoupling pin. An external bypass capacitor of10nF capacitor is
required. The trace length between the pin and the bypass capacitor
should be minimized. The ground side o f the bypass capacitor should
connect immediately to ground plane.

LO Balanced Input pin. This pin is internally DC biased and should be
DC blocked if connected to a device with DC present.For single-ended

BIAS BIAS

input operation, one pin is used as an input and the other LO input is
AC coupled to groun d. The frequency of the signal applied to these
pins is internally divided by a factor of2,hencethe carrierfrequencyfor
the modulator becomes one half of the applied frequency. The single-

LO-

ended input impedance is 400Ω (balanced is 800Ω). The LO input may
be driven single-ended but balanced provides optimum gain and phase
balance.

400

1200

QUADRATURE

DEMODULATORS

1200

400

Ω

FM IN-

Ω

LO+

Ω

Ω

13 LO+

Rev C11 010622

Same as pin 12, except complementary input. See pin 12.

7-29

RF9957

Pin Function Description Interface Schematic

14 IN SEL

Selects between CDMA and FM mode. This is a digitally controlled
input. A logic “high” (≥VCC-0.7V

(<0.5V

) selects FM mode. In FM mode, ONLY the I mixer is active.

DC

) selects CDMA mode. A logic “low”

DC

There is no Q output in FM mode. The impedance on this pin is 30kΩ.

IN SEL

BIAS

60 k

60 k

Ω

Ω

7

QUADRATURE

15 Q OUT-

16 Q OUT+
17 GND
18 FL-

Balanced Baseband Outputof QMixer. This pinis internally DC biased
and should be DC blocked externally.This output is active in CDMA
mode, but is NOT active in FM mode. The output can be used in a sin­gle-ended configu ration by leaving one of the two pins unconnected,

V

CC

1kΩ1k

however half the output voltage will be lost. Each pin should be loaded
with 2.5kΩ.The balanced load should be 5kΩ. The single-ended output
impedance is 1kΩ, while the balanced output impedance is 2kΩ.

Same as pin 15, except complementary output. See pin 15.
Same as pin 6.
Balanced AGC Output/Demod Input. This balanced node is pinned out

to allow shunt filtering of the AGC output signal as it enters the demod­ulator. The basic co nfiguration of the filter should consist of a shunt
inductor and shunt capacitor, both connected to the power supply, as

V

CC2VCC2

V

CC

Ω

Q OUT+

Q OUT-

FL+FL-

V

CC1VCC1

the interna l circuitry requires t his power supply connection through the
inductor to operate.

DEMODULATORS

19 FL+
20 GND
21 I OUT+

Same as pin 18, except complementary. See pin 18.
Same as pin 6.
Balanced Baseband Output of I Mixer. This pin is internally DC biased

and should be DC blocked externally.This output is active in both
CDMA and FM modes. The output can be used in a sing le-ended con­figuration by leaving one of the two pins unconnected, however half the
output voltage will be lost. Each pin should be loaded with 2.5kΩ.The
balanced load should be 5kΩ. The single-ended output impedance is
1kΩ, while the balanced output impedance is 2kΩ.

1.2 kΩ1.2 k

V

CC

1kΩ1k

Ω

V

CC

Ω

I OUT+

I OUT-

22 I OUT­23 GC

7-30

Same as pin 21, except complementary output. See pin 22.
Analog Gain Control for AGC Amplifiers. The valid control range is from

0.5to2.5V

. These voltages are valid for ONLY a 37kΩ source

DC

impedance. The ga in range for the AGC is 95dB.

GC

BIAS

21 k

Ω

40 k

Ω

Rev C11 010622

RF9957

Pin Function Description Interface Schematic

24 PD

Power Down Control. When logic “high” (≥VCC-0.3 V), all circuits are
operating;when logic“low” (≤0.5V), all circuits are turned off. The input

impedance of this pin is 10kΩ.

Pin Out

10 k

PD

Ω

VCC1

VCC2

VCC3

CDMA IN+

CDMA IN-

GND

GND

FM IN+

FM IN-

BG OUT

DEC

LO-

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

PD

GC

I OUT-

I OUT+

GND

FL+

FL-

GND

Q OUT+

Q OUT-

IN SEL

LO+

7

QUADRATURE

DEMODULATORS

Rev C11 010622

7-31

7

QUADRATURE

RF9957

Application Schematic

V

CC

PD

GC

IOUT-

IOUT+

GND

FL+

FL-

GND

QOUT+

QOUT-

IN SEL

LO+

CDMA IN+

CDMA IN-

FM IN+

CDMA

SAW Filter

10 nF

680 Ω

10 nF

10 nF

10 nF

10 nF

1nF

1

2

3

4

5

6

7

8

9

10

11

12

VCC1

VCC2

VCC3

CDMA IN+

CDMA IN-

GND

GND

FM IN+

FM IN-

BG OUT

DEC

LO-

DEMODULATORS

24

23

22

21

20

19

18

17

16

15

14

13

100 nF

100 nF

100 nF

100 nF

1nF

100 pF

37 kΩ

10 nF

390 nH

7pF

7pF

390 nH

100 pF

Power Down

Gain Control

IOUT-

IOUT+

V

CC

10 nF

QOUT+

QOUT-

Input Select

LO IN

7-32

Rev C11 010622

Evaluation Board Schemati c

(Download Bill of Materials from www.rfmd.com.)

RF9957

J1

CDMA

P1-1

P1-3

J2

FM

J3

LO

50 Ω µstrip

50 Ω µstrip

50 Ω µstrip

P1-1 PD

P1-3 VCC

C5

13 pF

T1

C6

C6

1

13 pF

13 pF

C8

9.1 pF

P1

1
2
3

GND

C26

100 nF

C2

10 µF

L2

390 nH

L3

330 nH

P2

1

P2-1 GC

2

GND

P2-3 IN SEL P3-3 -5 VDC

3

1

C1

10 nF

C3

10 nF

R1

C4

680 Ω

10 nF

L1

390 nH

C7

20 pF

R14

C9 10 nF

3kΩ

C10 10nF

C11 10nF

T2

1

C12 1 nF

R2

270 Ω

C13
1nF

2

3

4

5

6

7

8

9

10

11

12

VCC1

VCC2

VCC3

CDMA IN+

CDMA IN-

GND

GND

FM IN+

FM IN-

BG OUT

DEC

LO-

P3

1

P3-1 +5 VDC

2

GND

3

IOUT-

IOUT+

QOUT+

QOUT-

IN SEL

GND

FL+

GND

LO+

R15

R13

1kΩ

36 kΩ

C25

100 nF

24

PD

23

GC

22

21

L4 390 nH

20

C20 6.8 pF

19

L5 390 nH

18

FL-

C19 6.8 pF

17

16

15

14

13

9957400 Rev B

C30

100 nF

C31

100 nF

C27

4.6 nF

C28

100 nF

C29

100 nF

R9

820 Ω

R8

4.3 kΩ

P1-3

R4

820 Ω

R3

4.3 kΩ

R12

1.6 kΩ

327

+

-

R10

8.2 kΩ

R5

1.6 kΩ

327

+

-

R6

8.2 kΩ

100 nF

CLC426/

V

CL

6

+
V-

4

U2

100 nF

100 nF

CLC426/

V

CL

6

+
V-

4

U1

100 nF

C21

C23

C17

C15

R11

51 Ω

R7

51 Ω

C22

10 µF

50 Ω µstrip

C24

10 µF

C18

10 µF

50 Ω µstrip

C16

10 µF

C14

100 nF

P2-1

P3-1

J5

IOUT

P3-3

P3-1

J4

QOUT

P3-3

P2-3

7

QUADRATURE

DEMODULATORS

Rev C11 010622

7-33

7

RF9957

Evaluation Board Layout

Board Size 3.025” x 3.025”

Board Size 0.031”, Board Material FR-4

QUADRATURE

DEMODULATORS

7-34

Rev C11 010622

RF9957

7

QUADRATURE

DEMODULATORS

Rev C11 010622

7-35

RF9957

7

CDMA CascadeConversion Gain versus

60

50
40

30
20

10

0

-10

-20

-30

Cascade Conversion Gain (dB)

-40

-50

-60

0.5 1 1.5 2 2.5

Gain Control Voltage

(VCC=3.0 V, 85 MHz)

GC (V)

CDMA IIP3versus Gain

0

-10

-20

(VCC=3.0V,85MHz)

+25°C

-30°C
+85°C

FM Cascade ConversionGain versus

60

50
40

30
20

10

0

-10

-20

-30

Cascade Conversion Gain (dB)

-40

-50

-60

0.5 1 1.5 2 2.5

Gain Control Voltage

(VCC=3.0V,85MHz)

GC (V)

FM IIP3 versus Gain

0

-10

-20

(VCC=3.0V,85MHz)

+25°C

-30°C
+85°C

QUADRATURE

-30

DEMODULATORS

IIP3 (dBm)

-40

-50

-60

-60 -40 -20 0 20 40 60

Gain (dB)

CDMA Noise Figure versus Gain

(VCC=3.0V,85MHz)

Noise Figure (dB)

80

70

60

50

40

30

20

10

-30

IIP3 (dBm)

-40

-50

-60

-60 -40 -20 0 20 40 60

Gain (dB)

FM Noise Figure versus Gain

(VCC=3.0V,85MHz)

Noise Figure (dB)

80

70

60

50

40

30

20

10

0

-60 -40 -20 0 20 40 60

Gain (dB)

7-36

0

-60 -40 -20 0 20 40 60

Gain (dB)

Rev C11 010622