Datasheet RF9678, RF9678PCBA Datasheet (RF Micro Devices)

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Page 1

Preliminary

RF9678

Typical Applications

• W-CDMA Systems

• EDGE Systems

Product Description

The RF9678 is an integrated complete quadrature modulator and IF AGC amplifier designed for the transmit section of W-CDMA applications. It is designed to mo dulate baseband I and Q signals, and amplify the resulting IF signals while providing 55dB of gain control range. This circuit is designed as part of RFMD’s single mode W-CDMA Chipset, which also includes the RF2679 W-CDMA Receive IF AGC and Demodulator. The IC is manufactured on an advanced Silicon Bi-CMOS process, and is supplied in a16-pin leadless chip carrier.

W-CDMA TRANSMIT MODULATOR AND IF AG C

• CDMA Systems

• TDMA Systems

1.00

0.85

.80 .65

12°

max

NOTES:

Shaded Pin is Lead 1.1 Dimension applies to plated terminaland is measured between 0.02 mm and

0.25 mm from terminal end.

Pin 1 identifier must existon top surface of package by identification mark or feature on the package body.Exact shape and size is optional.

Package Warpage: 0.05 max.

4 5 Die thickness allowable: 0.305 mmmax.

.60 .24 typ

.35

.23

.75 .50

.05 .01

4.00 sq.

.65 .30

4 PLCS

1.85

1.55 sq.

.23 .13

.65

4 PLCS

Dimensions in mm.

UPCONVERTERS

MODULATORS AND

Optimum Technology Matching® Applied

Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS

1VGC

2VCC2

3MOD+

4MOD-

SiGe HBT

Gain Control

ISIG+

ISET

Quad

ISIG-

AGC DEC

QSIG+

Si CMOS

VCC1

12 NC

11 BG OUT

10 LO+

9 LO-

QSIG-

Functional Block Diagram

Package Style: LCC, 16-Pin, 4x4

Features

• Digitally Controlled Power Down Modes

• 2.7V to 3.3V Operation

• Digital LO Quadrature Divider

• AGC Linearity/Current Consumption Var.

•IFAGCAmpwith55dBGainControl

Ordering Information

RF9678 W-CDMA TransmitModulator and IF AGC RF9678 PCBA Fully Assembled Evaluation Board

RF Micro Devices, Inc. 7628 Thorndike Road Greensboro,NC 27409, USA

Tel (336) 664 1233

Fax (336) 664 0454

http://www.rfmd.com

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RF9678

Absolute Maximum Ratings

Parameter Rating Unit

Supply Voltage -0.5 to +5 V Power Down Voltage (VPD) -0.5toVCC+0.7 V I and Q Levels, per pin 1.2 V LO1 Level, balanced +3 dBm

Operating Ambient Temperature -40 to +85 °C Storage Temperature -40 to +150 °C

Preliminary

Caution! ESD sensitive device.

RF Micro Devices believesthe furnishedinformation is correctand accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice.RF Micro Devices does not assume responsibility for the use of the described product(s).

Parameter

Min. Typ. Max.

Overall

I/Q Input Frequency Range 0 to 10 MHz Balanced I/Q Input Impedance 20 kΩ Balanced I/Q Input Reference Level 1.3 V

LO1 Frequency Range 0to 1200 MHz LO1 Input Level -15 -8 -5 dBm Specifications LO1 Input Impedance 200 Ω Balanced (Evaluation Board Schematic)

UPCONVERTERS

MODULATORS AND

Sideband Suppression 45 50 dB c I/Q Amplitude adjusted to within ±20mV

Carrier Suppression 45 50 dB c I/Q DC Offset adjusted to within ±20mV

IF=380MHz

Max Output Power,W-CDMA

Mode Min Output Power, CDMA Mode -63 -59 -56 dBm V Output Power Accuracy -3 +3 dB T=-20 to +85 °C, Ref=25°C

Adjacent Channel Power Rejec-

tion @ 5MHz Adjacent Channel Power Rejec-

tion @ 10 MHz Output No ise Power -135 dBm/Hz @ 20MHz offset, VGC=2.4V

Output Impedance 200 Ω Balanced

IF=570MHz

Max Output Power,W-CDMA

Mode Adjacent Channel Power Rejec-

tion @ 5MHz Adjacent Channel Power Rejec-

tion @ 10 MHz

Specification

2kΩ Balanced, IC input

25 30 dBc Unadjusted

20 28 dBc Unadjusted

-6 -4.5 -3 dBm W-CDMA ACPR=-50dBc, V

-46 dBc W-CDMA Modulation, V

-56 dBc W-CDMA Modulation, VGC=0.2VDCto

-4 dBm W-CDMA ACPR=-50dBc, V

-46 dBc W-CDMA Modulation, V

-56 dBc W-CDMA Modulation, VGC=0.2VDCto

Unit Condition

T=25°C, VCC=3.0V; Z I=Q=500mV Output externally matched

Per Pin

I=Q=500mVPP, 1000mVPPDifferential; LO1=760MHz; Output externally matched

T=-20°Cto +85°C

=0.2V

2.4V

I=Q=700mVPP, 1400mVPPDifferential; LO1=1140MHz; Output externally matched

T=-20°Cto +85°C

2.4V

LOAD

, 1000mVPPDifferential;

=200Ω;

=2.4VDC,

=0.2VDCto

=2.4VDC,

=0.2VDCto

Power Supply

Supply Voltage 2.7 3.0 3.3 V Current Consumption 30 39 46 mA Over temperature Power Down Current <10 µA V

HIGH Voltage VCC-1.0 V

LOW Voltage 0.9 V

Gain Control Range 0.2 2.4 V V

Current 40 µA

5-92

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Preliminary

RF9678

Pin Function Description Interface Schematic

1VGC

2VCC2 3MOD+

4MOD-

5 I SIG+

6 I SIG-

Analog gain control for AGC amplifiers. Valid control voltage ranges are from 0.2V

voltages are valid ONLY for a 39kΩ source impedance. A DC voltage less than or equal to the maximum allowable VCCmay be applied to

this pin when no voltage is applied to the V DC supply. This pin should b e bypassed to ground with a 10nF capaci-

tor. Same as pin 4, except complem entary output. See pin 4.

One half of the balanced AGC output port. The impedance of this port is 200Ω balanced. This pin requires an inductor to V

dynamic range. In order to maxi mize gain, this inductor should be a high-Q type and should be parallel resonated out with a capacitor (see application schematic). This pin is NOT DC blocked. A blocking capacitor of 2200pF is needed when this pin is connected to a DC path. An appropriate matching network may be needed if an IF filter is used.

One half of the balanced baseband input to th e I mi xer. This pin is DCcoupled and must be supplied with 1.3VDC to bias the input transistor. Input impedance of this pin is 10kΩ minimum. For maximum carrier suppression, DC voltage on this pin relative to ISIG- DC voltage may be adjusted. (In case a balun is needed, a seperate balun board (RD0102 PCBA) could be ordered as an accessory.)

to 2.4VDC. The gain range for the AGC is 55dB. These

pins.

to achieve full

BIAS BIAS

See pin 8.

BIAS

VGC

MOD OUTMOD OUT+

I SIG-I SIG+

UPCONVERTERS

MODULATORS AND

7 Q SIG+

8 Q SIG-

9LO-

10 LO+

11 BG OU T

12 NC 13 VCC1

14 AGC DEC

One half of the balanced baseband input to the Q mixer.T his pin is DCcoupled and must be supplied with 1.3VDC to bias the input transistor. Input impedance of this pin is 10kΩ minimum. For maximum carrier suppression, DC voltage on this pin relative to QSIG- DC voltage may be adjusted.

One half of the balanced modulator LO1 input. In single-ended applications (100Ω input impedance), this pin is AC grounded with a 1nF capacitor.

One half of the balanced modulator LO1 input. The other half of the input, LO1-, is AC grounded for single-ended input applications. The frequency on these pins is divided by a factor of 2, hence the carrier frequency for the modulator becomes one halfof the appliedfre quency. The single-ended input impedance is 1kΩ (balanced is 2kΩ). This pin is NOT internally DC blocked. An external blocking capacitor (1nF recommended) must be provided if the pin is connected to a device with DC present.

Bandgap voltage reference. This voltage, constant over temperature and supply variation, is used to bias internal circuits. A 10nF external bypass capacitor is required.

No connection. DC supply. This pin should b e bypassed to ground with a 10nF capaci-

tor. AGC decoupling pin. An external bypass capacitor of 10nF capacitor is

required. The trace length between the pin and the bypass capacitors should be minimized. The ground side of the bypass capacitors should connect immediately to ground plane.

See pin 10.

BIAS BIAS

LO1+,

FM+

Q SIG-Q SIG+

LO1-, FM-

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RF9678

Preliminary

Pin Function Description Interface Schematic

15 ISET

16 PD

Pkg

GND

Base

Connected to ground through an external resistor. The value can be varied to change the current in the AGC for optimum linearity and current consumption.

Power down control for overall circuit. When logic “high” (≥VCC-0.7V), all circuits are operating; when logic “low” (≤0.5V), all circ uits are

turned off. The input impedance of this pin is >10kΩ. A DC voltage less than or equal to the maximum allowable V

when no voltage is applied to the V Ground connection. The backside of the package should be soldered to

a top side ground pad which is connected to the ground pla ne with multiple vias.

may be applied to this pin

pins.

UPCONVERTERS

MODULATORS AND

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Preliminary

RF9678

Application Notes

Quadrature modulator performance can be correlated to a set of specifications known as Carrier and Sideband Suppression. In addition, Sideband Suppression can be correlated with the amplitude and phase balance of the In-Phase (I) and Quadrature (Q) signals and Carrier Suppression can be correlated to the DC offset between the I and Q signals (see Figure 1). For a m ore thorough discussion of the theory and mathematics behind these specifications refer to RF Micro Devicesapplication note AN0001

In-Phase Signal

Quadrature Signal

RF Output Signal

LO Signal

0°

90°

Figure 1. Quadrature Modulator Block Diagram

Effects of Carrier Suppression and Sideband Suppression on W-CDMA (QPSK) Mo dulation

W-CDMA signals may be displayed on a vector signal analyzer as a collection of points called a c onstellation. Each point in the constellation is called a symbol and is representative of a bit sequence. In QPSK m odulation, there are four symbols and each symbol is representative of two data bits (see Figure 2). The I and Q signals are added together to create a vector of precise phase and amplitude. The vector is then sampled at a rate called the symbol rate and it's position at these intervals corresponds to the target symbol locations. E rrors in the phase and amplitude of the I and Q signals will translateto errors in the vector's phase and amplitude.This phase and amplitude error will result in a displacement of the vector from it's target symbol point. A measurement of this error is called the Error VectorMagnitude (EVM) and it represents the magnitude of the displacement of the actual vector from it's target location.

IMAG

CF 380 MH z

Ref Lvl

0dBm

1.5

SR 3.84 MHz

Meas Signal Constellation

Constellation Demod QPSK

EXT

UPCONVERTERS

MODULATORS AND

-1.5

-1.875 1.875REAL

Date: 6.FEB. 20 01 01:20:38

Figure 2. W-CDMA (QPSK) Constellation

QPSK constellation points exist on a circle of constant radius around the origin. Amplitude errors result in symbol points being displaced either inside or outside of their target locations on this circle. Phase errors result in symbol points being displaced on an arc either to the left or right of their target location. Finally, DC offset errors cause the origin to shift, resulting in a constant I and Q offset of all target points (see Figure 3).

Rev A4 010622

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RF9678

Preliminary

Ref Lvl

0dBm

1.5

IMAG

-1.5

-1.875 1.875REAL

Date: 6.FEB.2001 00:38:12

CF 38 0 M Hz SR 3.84 MHz

Meas Signal Constellation

Constellation Demod QPS

EXT

Figure 3. DC Offset Error (Carrier Feedthrough)

As is shown above, the EVM performance of a modulator can be correlated to it's carrier and sideband suppression performance.

Unadjusted Performance

A Wideband CDMA signal is a noise-like signal occupying a channel bandwidth of 3.84MHz. When viewed on a spec-

UPCONVERTERS

MODULATORS AND

trum analyzer the channel appears as a plateau raised above the noise floor (see Figure 4). In some cases, it is normal to see a spike over the center of the W-CDMA plateau. This will occur when the absolute power level of the unadjusted carrier feedthrough is higher than that of the W-CDMA channel level. The cause of this phenomenon can be understood by examining the relative powers of the carrier signal and the W-CDMA channel power.

For Example, a 1Hz channel with a power of 0dBm has an absolute power level of 0dBm when viewed on a spectrum analyzer. When that 0 dBm channel power is spread over a 3.84MHz channel, as in W-CDMA, it results in an absolute channel power level of -65.8dBm (-10*log (BW)). The absolute channel level displayed on the spectrum analyzer will increase with the resolution bandwidth setting on the instrument although the integrated channel power will remain constant. A resolution bandwidth (RBW) of 30kHz will increase the displayed power level by 44.7dB (+10*log(RBW)) to -

21.0dBm. With a desired signal output power of +2.0dBm and a carrier suppression of >20dBc, the absolute carrier level canbeashighas-18.0dBm(P

-Suppression=Carrier Level). This will result in a 3dB carrier spike above the W-

OUT

CDMA channel level (see Figure 4). (Note: The relative height of the carrier spike above the W-CDMA channel level is directly related to the RBW of the spectrum analyzer being used. The example above assumes a 30kHz RBW.)

The following equations may be used to calculate W-CDMA channel and carrier feedthrough levels. W-CDMA Channel Level=Channel Power (Integrated over BW)-[10*log*(BW)] +[10*log*(RBW)] Carrier Feedthrough=P

(Desired Sideband)-Carrier Suppression

OUT

The next section describes a procedure that may be used to dramatically reduce carrier feedthrough by tuning or optimizing the modulator input signals.

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Preliminary

RF9678

Ref Lvl

-3 dBm

-10

-20

-30

-40

-50

-60

-70

-80

-90

cl1

-100

Date: 6.FEB.2001 00 :47:49

Marker 1 [T1]

380.01503006 MHz

cl1

-21.97 dBm

RBW 30 kHz VBW 300 kHzRef Lvl SWT 2 s Unit dBm

1.46848 MHz/Center 380 MHz Span 14.6848 MHz

RF Att 2 0 dB

1 [T1] -21.97 dBm

380.01503006 MHz CH PWR -2.62 dBm ACP Up -50.30 dB ACP Low -49.72 dB

cu1

EXT

Figure 4. W-CDMA Spectral Plot

Adjusted Performance

In theor y, an ideal quadrature modulator will completely suppress the carrier and sideband signals. In practice, due to process and packaging effects, real quadrature modulators lack the balance necessary to completely cancel the carrier and sideband signals. The imbalance caused by process and packaging effects is usually very small and may be corrected by preadjusting the input signals to the modulator. This process of adjusting the input signals to minimize the carrier and sideband suppression is known as optimization.

UPCONVERTERS

MODULATORS AND

Sideband suppression results from the summing together of the I and Q channel mixer outputs. In an ideal quadrature modulator, at the summing point the sideband signals from the I and Q mixers are 180° out of phase and have equal magnitudes. In a real modulator, the am plitude and phase are not exactly balanced and 100% cancellation does not occur.The problem is corrected by introducing amplitude and phase corrections before applying a signal to the modulator. Maximum sideband suppression is achieved when the amplitude and phase errors introduced by the modulator are compensated for.

Complete carrier suppression occurs when there is no DC offset between the mixer signal input and the mixer reference voltage (i.e., ISIG+ and ISIG-). In real devices, zero DC offset is difficult to achieve. This problem is corrected by introducing a DC offset of equal and opposite magnitude before applying the signal to the m odulator. The internal error is thereby canceled and maximum carrier suppression is achieved.

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RF9678

Procedure for RF9678 Quadrature Modulator/AGC Optimization

1) Configure the test bench as shown in Figure 5.

HPE4422B or Equiv Analog Signal Generator (LO)

Preliminary

HP66332A or Equiv DC Power Supply (VCC, PD)

HP6624A or Equiv DC Power Supply Output 3 (VGC)

VCC

VGC

Rhode and Schwartz FSIQ7 or Equiv, Spectrum Analyzer

Figure 5. RF9678 Test Setup

UPCONVERTERS

MODULATORS AND

2) Apply V

3) Set gain control to maximum. (V

to the part. (VCC=3.0V)

=2.4V)

4) Apply the LO signal. (760MHz@-5dBm, for an IF out of 380MHz)

5) Apply the I+ and Q+ signals: (Single Ended) I Signal: 150kHz@ 500mVp,Phase=0°, 1.3V DC Offset Q s ignal: 150kHz@ 500mVp, Phase =90°, 1.3V DC Offset

9678410

MOD OUT

Q-

Q+

I-

I+

HP8904 or Equiv Multifunction Signal Generator (Sine, I+ and Q+)

HP6624A or Equiv DC Power Supply Outputs 1 and 2 (VREF)

6) Set the DC levels at I

-andQ

SIG

- input pins to the nominal value (1.3V). The output spectrum should look similar to

SIG

Figure 6.

Ref Lvl

15 dBm

-10

-20

-30

-40

-50

-60

-70

-80

Date: 6.FEB.2001 00:54:00

Figure 6. Unassigned Single Sideband Output

5-98

RBW 5 kHz VBW 50 kHz SWT 2 s Unit dBm

32.5 kHz/Center 380 MHz Span 325 kHz

RF Att 40 dB

EXT

Rev A4 010622

Page 9

Preliminary

RF9678

Carrier Suppression Optimization

7) While maintaining a constant DC level (1.3V) on the "ISIG-" pin, adjust the DC level of the "ISIG+" input in as small an increment (~1.0mV) as the test equipment will allow. Observe the output on the spectrum analyzer. Adjust the DC level until the carrier signal is at a minimum. Typically, the minimum will occur within a ±20mV window of the reference voltage (1.3±0.02V).

8) While maintaining a constant DC level (1.3V) on the "QSIG-" pin, adjust the DC level of the "QSIG+" input in as small an increment as the test equipment will allow (1.0mV). Observe the output on the spectrum analyzer. Adjust the DC level until the carrier signal is at a minimum. Typically, the minimum will occur within a ±20mV window of the reference voltage (1.3±0.02V).

9) Repeating Steps 7 and 8 may yield slightly better suppression. The output spectrum should look similar to Figure 7. (Note the suppressed carrier signal.)

Ref Lvl

15 dBm

-10

-20

-30

-40

-50

-60

-70

-80

Date: 6.FEB.2001 00:55:31

Marker 1 [T1]

379.84987475 MHz

0.22 dBm

RBW 5 kHz VBW 50 kHz SWT 33 ms

32.5 kHz/Center 380 MHz Span 325 kHz

RF A tt 40 dB

Unit dBm

EXT

UPCONVERTERS

MODULATORS AND

Figure 7. Optimized Carrier Suppression

Sideband S uppression Optimization

10) Adjust the AC amplitude of the "ISIG+" signal in as small an increment as the test equipment will allow (~1mV). Observe the output of the spectrum analyzer. Adjust the AC amplitude of the signal until the sideband signal is at a minimum. The minimum sideband signal level should occur within ±20mV adjustment. (0.500 ±0.02V)

11) Adjust the AC amplitude of the "QSIG+" signal in as small an increment as the test equipment will allow (~1mV). Observe the output of the spectrum analyzer. Adjust the AC amplitude of the signal until the sideband signal is at a minimum. The minimum sideband signal level should occur within ±20mV adjustment (0.500 ±0.02V).

12) Adjust the phase of the "QSIG+" signal in as small an increment as the test equipment will allow (`0.1°). Observethe output of the spectrum analyzer. Adjust the phase of the "QSIG+" signal until the sideband suppression is at a minimum. The sideband signal should reach a minimum within ±1° of adjustment (90±1°).

13) The device is now optimized for maximum carrier and sideband suppression. The output spectrum should look similar to Figure 8. (Note the suppressed carrier and sideband signals.)

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RF9678

Preliminary

Ref Lvl

15 dBm

-10

-20

-30

-40

-50

-60

-70

-80

Date: 6.FEB.2001 00:57:07

Figure 8. Optimized Carrier and Sideband Suppression

UPCONVERTERS

MODULATORS AND

Marker 1 [T1]

379.8498747 5 MH z

RBW 5 kHz

0.21 dBm

VBW 5 0 k Hz SWT 3 3 m s

32.5 kHz/Center 380 MHz Span 325 kHz

RF A tt 40 dB

Unit dBm

EXT

5-100

Rev A4 010622

Page 11

Preliminary

Pin Out

1VGC

ISET

RF9678

VCC1

AGC DEC

12 NC

VGC

MOD+

MOD-

2200 pF

2VCC2

3MOD+

4MOD-

ISIG-

ISIG+

QSIG+

11 BG OUT

10 LO+

9 LO-

QSIG-

Application Schemati c

VPD

15 nH

1nF

39 kΩ

10 nF

10 pF15 nH

10 pF

1500

Ω

Gain Control

Quad

5 6 7 8

10 nF

UPCONVERTERS

MODULATORS AND

10 nF

13141516

10 nF

1nF

LOIN

QSIGQSIG+ ISIGISIG+

Rev A4 010622

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RF9678

Preliminary

Evaluation Board Schema t ic

(Download Bill of Materials from www.rfmd.com.)

P1-1 PD P1-2 VCC1

VGC

MOD

UPCONVERTERS

MODULATORS AND

ISIG+

ISIG-

1 2

GND

CON3

50 Ωµstrip

P2-1 VGC

1 2 3

CON3

T1 1:4

GND GND

39 kΩ

VCCNC

VPD

1500 Ω

Gain Control

5 6 7 8

Qua

10 nF

VCC

13141516

10 nF

200 Ω

4:1

50 Ωµstrip

LO IN

QSIG-

QSIG+

5-102

Rev A4 010622

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Preliminary

RF9678

Evaluation Board Layout

Board Size 2.0” x 2.0”

Board Thickness 0.031 ”, Board Material FR-4

UPCONVERTERS

MODULATORS AND

Rev A4 010622

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Page 14

RF9678

Preliminary

ICCversus V

(1 V

50.0

45.0

40.0

35.0

(mA)

30.0

25.0

20.0

15.0

10.0

0.0 0.5 1.0 1.5 2.0 2.5

P-P

, 380 MHz)

+25C

-2

-4

-6

(dbm)

-8

OUT

-10

-12

-14

-16 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

(VGC=2.4V

VGC(VDC)

ACPR versus VGC(W-CDMA,3GPP, Temp. +25oC, - 40oC, +85oC)

(LO Freq. 760MHz@-8dBm,V

0.0

ACPR [dBc]@+25C

UPCONVERTERS

MODULATORS AND

-10.0

-20.0

ACPR [dBc]@- 40C ACPR [dBc]@+85C

=3.0V, VGC=2.4to 0.2V)

60.00

50.00

40.00

versus V

OUT

380 Mhz, W-CDMA)

VIN(VPDifferential)

Performance versus V

BIAS

VIN=300mVPP(Differential)

(25°C)

0.00

-5.00

-10.00

-30.0

-40.0

Adjacent Channel Power (dBc)

-50.0

-60.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(V)

Alternate Channel Power (dBc)

-10.0

-20.0

-30.0

-40.0

-50.0

-60.0

-70.0

-80.0

Altr. Channel Power versus V

(W-CDMA-3GPP,Temp.+25oC, -40oC,+85oC)

0.0

(LO Freq. 760MHz@-8dBm, V

ALTR.Ch.Power [dBc]@ +25C ALTR.Ch.Power[dBc]@-40C ALTR.Ch.Power[dBc]@+85C

=3.0V,VGC=2.4V to 0.2V)

30.00

ACPR (dBc)

20.00

ACPup(dbc)

10.00

Channel Output Power (dBm)

0.00

0.0

-10.0

-20.0

-30.0

-40.0

-50.0

-60.0

ACPlow (dbc) ALTup (dbc) ALTlow (dbc) ChPout (dbm)

1.00 1.10 1.20 1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00 2.10

(LO Freq. 760MHz@-8dBm,VCC=2.7, 3.0, 3.3V, VGC=2.4 to 0.2V)

Ch.Power out [dBm]@3V Ch.Power out [dBm]@2.7V Ch.Power out [dBm]@3.3V

)

BIAS(VDC

Channel OutputPowerversusV

(W-CDMA-3GPP,Temp. +25

-15.00

-20.00

Channel Power Out (dBm)

-25.00

-30.00

-90.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(V)

5-104

-70.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

VGC(V)

Rev A4 010622

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Preliminary

RF9678

(LO Freq. 760MHz@-8dBm,VCC=VPD=3.0V, VGC=2.4to 0.2V)

IGCversus V

25.0

20.0

15.0

10.0

5.0

0.0

(uA)

-5.0

-10.0

-15.0

-20.0

-25.0

-30.0

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

Igc [uA]

VGC(V)

12.0

10.0

EVMversus V

(W-CDMA-3GPP, Temp. +25oC, - 40oC, +85oC)

(LO Freq. 760MHz@-8dBm, V

8.0

=3.0V, VGC=2.4 to 1.0V)

EVM [%] @ +25C EVM [%] @ - 40C EVM [%] @ +85C

Channel OutputPower versus V

(W-CDMA 3GPP, Temp.+25oC,-40oC,+85oC)

(LO Freq. 760MHz@-8dBm,V

Ch.Power out [dBm]@+25C Ch.Power out [dBm]@-40C Ch.Power out [dBm]@+85C

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4

-10.0

-20.0

-30.0

-40.0

-50.0

Channel Output Power (dBm)

-60.0

-70.0

0.0

=3.0V,VGC=2.4 to 0.2V)

VGC(V)

UPCONVERTERS

MODULATORS AND

6.0

EVM (%)

4.0

2.0

0.0

1.01.21.41.61.82.02.22.4

VGC(V)

Rev A4 010622

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Page 16

RF9678

Preliminary

UPCONVERTERS

MODULATORS AND

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Rev A4 010622

Datasheet RF9678, RF9678PCBA Datasheet (RF Micro Devices)

Specifications and Main Features

Frequently Asked Questions

User Manual