Datasheet RF5176, RF5176PCBA Datasheet (RF Micro Devices)

Page 1
Preliminary
RF5176
2
Typical Applications
• 3V 1850-1910MHz CDMA-2000 Handsets
• 3V 1920-1980MHz W-CDMA Handsets
• Spread-Spectrum Systems
Product Description
The RF5176 is a high-power, high-efficiency linear ampli­fier IC targeting 3V handheld systems. The device is manufactured on an advanced Gallium Arsenide Hetero­junction Bipolar Transistor (HBT) process, and has been designed for use as the final RF amplifier in 3V CDMA-2000 and W-CDMA handsets as well as other applications in the 1850MHz to 2000MHz band. The device is self-contained, and the output can be easily matched to obtain optimum power, efficiency, and linear­ity characteristics over all recommended supply voltages. The device has a continuously variable bias circuit to allow idle current to be optimized for a given output power.
3V W-CDMA POWER 1900MHZ/
3V LINEAR POWER AMPLIFIE R
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
1.00
0.90
0.60
0.24 typ
0.20
3
12°
MAX
0.05
Dimensions inmm.
NOTES:
1
Shaded lead is Pin 1.
2
Pin 1 identifier must exist on top surface of package byidentification mark or feature on the package body. Exact shape and sizeis optional.
Dimension applies to plated terminal: to be measured between 0.02 mm
3
and 0.25 mm from terminal end.
4
Package Warpage: 0.05 mm max.
5
Die Thickness Allowable: 0.305 mm max.
0.75
0.50
4.00 sq.
0.50
Note orientation of package.
2.10
0.23
0.13
4 PLCS
2
0.65
0.30
4 PLCS
sq.
POWER AMPLIFIERS
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS
VREG1
VCC BIAS
VREG2
VS2
BIAS GND
ü
SiGe HBT
NC
NC
20 19 18 17
1
2
Bias
3
5
6 7 8 9 10
NC
Q1B
NC
RF OUT
Si CMOS
NC
16
RF OUT
RF IN
15
NC
14
NC
VCC1
13
124
VCC1
11
NC
RF OUT
Functional Block Diagram
Package Style: LCC, 20-Pin, 4x4
• Single 3V Supply
• 27dBm Linear Output Power
• 26dB Linear Gain
• 40% Linear Efficiency
• On-board Power Down Mode
Ordering Information
RF5176 3V W-CDMAPower 1900MHZ/ 3V Linear Power
RF5176 PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro,NC 27409, USA
Amplifier
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A0 010910
2-197
Page 2
2
RF5176
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage (RF off) +8.0 V Supply Voltage (P Bias Voltage (V Control Voltage (V Input RF Power +6 dBm
Operating Case Temperature -30 to +100 °C Storage Temperature -30 to +150 °C
31dBm) +5.0 V
OUT
)+3.0V
BIAS
)+3.0V
REG
DC
DC DC DC
Preliminary
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice.RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
POWER AMPLIFIERS
Overall
Usable Frequency Range 1850 2000 MHz Typical Frequency Range 1850 to 1910 MHz
Linear Gain 26 dB Second Harmonic (including
second harmonic trap) Third Harmonic -50 dBc Maximum Linear Output Power
(W-CDMA Modulation) Total Linear Efficiency 40 % P
Adjacent Channel Power
Rejection@5MHz Adjacent Channel Power
Rejection@10MHz Noise Power -144 dBm/Hz P
Input VSWR < 2 :1 Output Load VSWR 5:1 No oscillations
Min. Typ. Max.
Specification
1920 to 1980 MHz
-55 dBc
27 dBm
-40 -38 dBc P
-50 -48 dBc P
Unit Condition
T=25°C, VCC=3.4V, Freq=1920MHz to 19 80MHz, V unless othe rwise specified
OUT OUT
3GPP 3.2 03-00 DPCCH + 1 DPDCH
OUT
3GPP 3.2 03-00 DPCCH + 1 DPDCH
OUT
Rx Band 2110MHz to 2170MHz
Power Supply
Power Supply Voltage 3.0 3.4 5.0 V Idle Current 80 mA V
VREG Current 10 µA Total pins 1 and 3, V Turn On/Off time ns
Total Current (Power down) 10 µAV
“Low” Voltage 0 0.2 V
V
REG
“High” Voltage 2.5 V S ee Alternative Biasing Network table follow-
V
REG
REG
REG
ing the application schematic.
REG
=27dBm =27dBm, W-CDMA Modulation,
=27dBm, W-CDMA Modulation,
=+27dBm,
=2.5V
=2.5V
REG
=Low
=2.5V,
2-198
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Page 3
Preliminary
RF5176
Pin Function Description Interface Schematic
1VREG1
2 VCC BIAS 3VREG2
4 VS2 5BIASGND 6NC
7NC 8RFOUT
9RFOUT 10 RF OUT 11 NC 12 VCC1
13 VCC1 14 NC 15 NC 16 RF IN
17 NC 18 Q1B
19 NC 20 NC
Pkg
GND
Base
Bias control for the first stage. Needs to be divided down from its nomi­nal value of 2.5V using a resistive divider network of 240kand 360kΩ.V
a given outputpower.AlternativeV defined on the application schematic. Supply for bias circuits.
Bias control for the second stage. Needs to be divided down from its nominal value of 2.5V using a resistive divider network of 240kand 240kΩ.AlternativeV
cation schematic. Second stage bias circuit source. For best linearity, decouple with
bypassing capaci tors of 15pF and 100 nF. Connect to ground p lane via a 15nH inductor. DC return forthe second
stage bias circuit. Not currently used.
Not currently used. RF output and power supply for the final stage. Thi s is the unmatched
collector of the final stage. It requires an output matching network, including a DC blocking capacitor.
Same as pin 8. Same as pin 8. Not currently used. Powersupply for the first stage and interstage match. Requires a shunt
capacitor of 12pF close to the pin for optimum match. Same as pin 12.
Not currently used. Not currently used. RF input. Requires a blocking capacitor and shunt inductor to provide
2:1 VSWR. Not currently used.
Base bias for first stage. For best linearity, decouple with 15pF and 100nF capacitors.
Not currently used. Not currently used. Ground connection. The backside of the package should be soldered
to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane.
REG1
and V
maybeadjustedtominimizeidlecurrentfor
REG2
voltages can be used as defined on the appli-
REG
voltages can be used as
REG
2
POWER AMPLIFIERS
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Page 4
RF5176
Preliminary
Application Schematic
2
5.6 pF
W = 0.028"
15 pF
RF IN
16
L = 0.120"
1.5 nH
15
14
13
124
11
W = 0.028"
L = 0.060"
12 pF
16 nH
15 pF 10nF 1 µF
10 nH
10 nF 1 µF 4.7 µF
V
CC
100 nF
15 pF
R6
360 k
VREG
R8
240 k
R7
POWER AMPLIFIERS
VCC BIAS
240 k
15 pF100 nF
R5
240 k
15 nH
VCC=3.4V
=2.5V
V
REG
V
BIAS = 3.4 V
CC
= 4.7 H = 14 mils
E
R
20 19 18 17
1
2
3
5
Bias
6 7 8 9 10
W = 0.028"
L = 0.060"
3.6 pF
3pF
Alternative Biasing Networks for Various V
V
(V) R5 (1ST) k R6 (1ST-GND) k R7 (2ND-GND) k R8 (2ND) k
REG
2.50 240 360 240 240
2.60 240 330 360 380
2.70 240 300 200 230
2.80 240 270 220 270
2.90 220 240 180 240
2-200
REG
RF OUT
Voltages
Rev A0 010910
Page 5
Preliminary
P2
R8
240 k
R7
240 k
P3
C16
100 nF
C7
15 pF
Evaluation Board Schemati c
(Download Bill of Materials from www.rfmd.com.)
C3
100 nF
R6
360 k
R5
240 k
L3
15 nH
VCC=3.4V
V
=2.5V
REG
V
BIAS = 3.4 V
CC
E
= 4.7 H = 14 mils
R
C2
15 pF
20 19 18 17
1
2
3
5
Bias
6 7 8 9 10
W = 0.028"
L = 0.060"
C12
3.6 pF
C1
5.6 pF
16
W = 0.028"
L = 0.120"
L1
1.5 nH
15
14
13
124
11
W = 0.028"
L = 0.060"
L2
16 nH
15 pF
C4
12 pF
C8
L4
10 nH
C5
10 nF
C9
10 nF
RF5176
P1
1
P1 VCC
CON1
P2
1
P2 VREG
CON1
P3
1
P3 VCCBIAS
CON1
P4
1
GND
CON1
+ +
C6
1 µF
C10 1 µF
C11
4.7 µF
+
J1
RF IN
2
POWER AMPLIFIERS
P1
C13 3pF
15 pF
J2
RF OUT
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Page 6
2
RF5176
Preliminary
Evaluation Board Layout
Board Size 2.0" x 2.0"
Board Thickness 0.028”, Board Material FR-4, Multi-Layer
Ground Plane at 0.014”
POWER AMPLIFIERS
2-202
Rev A0 010910
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