
Preliminary
RF3330
3
Typical Applications
• CATV Set-Top Boxes
• Cable Modems
Product Description
The RF3330 is a gain-controlled amplifier suitable for
application in the IF receive section of a cable tuner. It
consists of a high impedance differential input stage, a
low impedance differential output stage, and a differential
gain-controlled am plifier. The voltage gain may be varied
by applying an analog control voltage. The device is fabricated on an advanced Bi-CMOS process, and is housed
in an eight-lead SOT23 package.
IF GAIN CONTROLLED AMPLIFIER
• Cable-Ready TVs
1.59
1.61
TEXT*
2.80
3.00
2.60
3.00
*When Pin 1 is in upper
left, text reads downward
(as shown).
3°MAX
0°MIN
0.365
0.650
1.44
1.04
0.15
0.05
0.127
3
AMPLIFIERS
LINEAR CATV
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
ü
SiGe HBT
1VCC 8VCC
2GND
3VOUT
4VOUTB
Biasing &
AGC
Control
Si CMOS
7VIN
6VINB
5VAGC
Functional Block Diagram
0.35
0.55
Package Style: SOT23-8
Features
• Single 5V Positive Power Supply
• 26dB Gain Range
• 150MHz Bandwidth
• Compact Package
Ordering Information
RF3330 IF Gain Controlled Amplifier
RF3330 PCBA Fully Assembled Evaluation Board - 75Ω
RF3330 PCBA Fully Assembled Evaluation Board - 50Ω
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro,NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A2 010820
3-1

RF3330
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage 7 V
Operating Ambient Temperature -40 to +85 °C
Storage Temperature -60 to +150 °C
Preliminary
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
3
Specification
Unit Condition
Typical performance is at TA=+25°C,
V
=5V.
CC
Overall
Parameter
Min. Typ. Max.
DC Specifications
SupplyVoltage 4.75 5.0 5.25 V
Supply Current 18 25 mA
AGC Control Voltage 0.5 3.3 V 0.5V=Minimum Gain
AMPLIFIERS
LINEAR CATV
AGC Input Impedance 10 MΩ
3.3V=Maximum Gain
AC Specifications
3dB Bandwidth 150 MHz
Voltage Gain
Maximum 33.0 34.0 dB V
Minimum 8.0 10.0 dB V
Maximum Input Level 50 dBmV(rms) While meeting distortion specification
Maximum Output Level 50 dBmV(rms) While mee ting distortion specification
Output 1dB Compression 66 dBmV(rms) Maximum Gain
Output Harmonic Distortion -44 -40 dBc Output level=50dBmV(rms); V
Input IP3, Maximum Gain 45 dBmV(rms) Output level=50dBmV(rms); V
Input IP3, Minimum Gain 60 dBmV(rms) Output level=50dBmV(rms); V
Input Noise, Maximum Gain 4.5 nV/rtHz
Input Noise, Minimum Gain 42 nV/rtHz
Output Impedance 10 Ω Differential
Input Impedance 2000 Ω Differential
Output Load Impedance 1 kΩ Differential
Output Load Capacitance 2 pF Differential
AGC
AGC
=3.3V
=0.5V
AGC
AGC
AGC
=3.3V
=3.3V
=0.5V
3-2
Rev A 2 010820

Preliminary
RF3330
Pin Function Description Interface Schematic
1VCC
2GND
3VOUT
Supply Voltage
Supply Ground
Output pin.
OUT
OUTB
3
4VOUTB
5VAGC
6VINB
7VIN
Complementary output pin.
AGC control voltage.
Complementary input pin. This should be externally AC-coupled to signal source.
Input pin. This should be externally AC-coupled to signal source.
VAGC
VBIAS
VBIAS
OUT
OUTB
100 kΩ
1kΩ
IN
1kΩ
IN
10 kΩ
75
75
1kΩ
1kΩ
VREF
VBIAS
INB
VBIAS
INB
AMPLIFIERS
LINEAR CATV
8VCC
Rev A2 010820
Supply Voltage
3-3

RF3330
Preliminary
Pin Out
1VCC 8VCC
3
2GND
3VOUT
4VOUTB
7VIN
6VINB
5VAGC
Application Schematic
AMPLIFIERS
LINEAR CATV
V
CC
+
VOUT
VOUTB
VIN
VINB
VAGC
Biasing &
AGC
7
6
5
Control
Note orientation of board.
100 pF 3.3µF
18
2
3
4
3-4
Rev A 2 010820

Preliminary
Evaluation Board Schemati c
(Download Bill of Materials from www.rfmd.com.)
P1-1 VCC
P1-3 AGC
VCC
HEADER4
RF3330
P1
1
GND
2
3
GND
4
3
+
C3
3.3 µF
J2
VIN
(BAL)
J3
VIN
(BAL)
J1
VIN
(UNBAL)
AGC
NOTES:
1. C3, Tantulum Capacitor: Case Size Y, 6.3 V.
2. See Evaluation Test Procedure for more information.
3. Parts with * following the reference designator should not be populated on the evaluation board.
50 Ωµstrip
50 Ωµstrip
50 Ωµstrip
C2
100 nF
C7
100 nF
C8
100 nF
R6
5.1 kΩ
C9
100 pF
F1*
C6
33 nF
Biasing &
AGC
7
6
5
Control
Note orientation of board.
18
2
3
4
3330410-
C1
100 pF
R2
470 Ω
R4
470 Ω
R3
51 Ω
6
5
4
T1
TTWB
1010-1
R1*
DNI
R5*
DNI
C4*
DNI
1
2
3
C5*
DNI
50 Ωµstrip
50 Ωµstrip
J5
VOUT
(BAL)
J4
VOUT
(UNBAL)
AMPLIFIERS
LINEAR CATV
Rev A2 010820
3-5

3
RF3330
Preliminary
Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.062”, Board Material FR-4
AMPLIFIERS
LINEAR CATV
3-6
Rev A 2 010820

Preliminary
RF3330
Evaluation Test Procedure
Introduction
The RF3330 is an IF amplifier with AGC, designed for
use in Cable Television applications. Voltage gain is
varied using an analog voltage control signal. The differential input is high impedance (2000Ω)andthedifferential output is low impedance (10Ω). The 3dB
bandwidth is 150MHz and has a maximum voltage
gain of 34dB and a minimum voltage gain of 8dB. The
AGC Control Voltage ranges from 0.5V for minimum
gain to 3.3V for maximum gain. The device is packaged in the SOT23-8, which minimizes board area.
Evaluation Board
The 3330410 board has been designed to achieve
maximum versatility for device evaluation. The board is
designed for either a differential or single-ended input
signal. Likewise, the output can be either singly or differentially loaded. There is also a separate V
CC
and
AGC voltage pin. For constant maximum gain applications, the V
and AGC pins can be tied together.
CC
Input
For differential operation on the input, the J1 connector
(V
unbalanced) is not required. Differential voltages
IN
are applied directly through connectors J2 and J3 (V
IN
balanced). DC blocking capacitors are also provided to
protect equipment or upstream components. Boards
ordered from RF Micro Devices are assembled in this
configuration.
Single-ended operation on the input can be accomplished in two ways. The first option uses the differential board setup as described above, with the addition
of an external low frequency 180° power combiner.
The combiner splits the single input signal into two signals with inverted phase. The s econd option for singleended operation utilizes a SAW filter which c onverts
from double to single-ended. The current evaluation
board has an option to insert a SAW filter on the input.
For this setup, the J1 connector (V
unbalanced)
IN
would be utilized. The 3330410 board has been evaluated using a 44 MHz Siemens+ Matsushita filter. This is
acommonIFfrequencyusedincablemodemapplications.
Table 1. SAW Filters
EPCOS P/N FC(MHz)
X6857D 36.000
X6966M 36.125
X6964D 43.750
X6855M 44.000
X6866D 44.000
X6965M 44.000
Output
For differential operation on the output, the optional
C4, C5, R1, and R5 would be inserted and the T1
transformer would be removed. The J4 (V
anced) and J5 (V
balanced) connectors would be
OUT
OUT
unbal-
uses as differential outputs.
For single-ended operation on the output, only the J4
connector (V
unbalanced) is used and only one
OUT
3
analyzer is necessary. There is a 1:1 transformer to
convert the unbalanced output to a balanced signal.
The amplifier is designed to drive a 1000Ω load. Driving a 50 Ω load, presented by the spectrum analyzer
will cause the amplifier to saturate. In order to present
LINEAR CATV
a 1000Ω load to the amplifier a resistive matching circuit is on the board. Boards ordered from RF Micro
Devicesare assembledin this configuration.
Test Setup Calibration
Because of the fact that the impedances of the amplifier are not 50Ω, there are some special considerations
when calibrating a test setup.The evaluation test setup
isshowninFigure1.
Input
As stated previously, the balanced input impedance of
the RF3330 is 2000 Ω. The signal generator used has
an unbalanced 50Ω source, and is typically used in
unbalanced 50Ω impedance systems. Due to this load
mismatch, a positive amplitude offset needs to be
applied to the signal generator. The formulas used to
calculate this offset are given below in Equations 1
through 3. It should be noted that the unbalanced
1000 Ω load is used, because all data in the datasheet
is referenced to single-ended operation. Using a spectrum analyzer probe, the actual offset measured was
7.5 dB, and this is what is used for the amplitude offset
in the signal generator.
MismatchLoss (ML)=-10*log(1-|Γ
Γ
=(Z-Z0)/(Z+Z0)Eq.2
L
ML=-10* log(1- [(1000-50) /(1000+50)]
|2)Eq.1
L
2
)=7.4dB
Eq. 3
AMPLIFIERS
Rev A2 010820
3-7

RF3330
Preliminary
3
Output
On the output, the losses due to the resistive matching
pad must also be calibrated out of the setup. Because
of the 1:1 transformer, the spectrum analyzer appears
as a 50Ω resistorin parallelwith this circuit (see Figure
2). Equation 4 illustrates the calculation necessar y to
obtain the amount of loss due to this m atching circuit.
The balun also has an additional 0.5dB to 1.0 dB of
Frequency =
1MHzto
150 MHz
AMPLIFIERS
LINEAR CATV
Figure 1. RF3330 Test Setup
Signal Generator
R4
470 Ω
Frequency =
1MHzto
150 MHz
Mini-Circuits
ZMSCJ-2-1
Divider
RF3330
loss, which is added in to the overall output losses.
This was verified with a spectrum analyzer probe. The
offset used in the test setup is 32.5dB on the spectrum
analyzer.
Resistive Pad Loss=
20 *log(25/(470+25+470))=-31.7dB Eq. 4
Resistive
Match
3330410 Evaluation Board
Transformer
1:1
Frequency =
1MHzto
150 MHz
Spectrum Analyzer
R3
51 Ω
R2
470 Ω
Figure 2. Equivalent Output Circuit
50 Ω
3-8
Rev A 2 010820

RF3330
Preliminary
3
IIP3 versus Gain
V
=5.0V, F=50MHz
65.0
60.0
55.0
50.0
IIP3 (dBmV)
45.0
40.0
AMPLIFIERS
LINEAR CATV
35.0
5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0
65.0
60.0
CC
Gain (dB)
IIP3 versus V
GC
VCC=5.0V, F=50MHz
-40°C
+25°C
+85°C
-40°C
+25°C
+85°C
40.0
-40°C
35.0
30.0
25.0
20.0
Gain (dB)
15.0
10.0
5.0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
+25°C
+85°C
Gain versus V
GC
VCC=5.0V, F=50MHz
VGC(V)
55.0
IIP3 (dBmV)
50.0
45.0
40.0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
VGC(V)
3-9
Rev A 2 010820