The RF3320 is a variable gain amplifier for use in CATV
reverse path (upstream) applications. It is DOCSIS-compliant for use in cable modems. The gain control covers a
58 dB range and is serially programmable via three-wire
digital bus for compatibility with standard baseband
chipsets. Amplifier shutdown and transmit disable modes
are software- and hardware-controlled. The device is
placed into software-shutdown mode via the serial control
bus. The device operates over the frequency band of
5MHz to 65MHz for use in current U.S. and European
systems. The amplifier delivers up to 60dBmV at the output of the balun. Gain is c ontrollable in accurate 1dB
steps. The device is provided in a thermally enhanced,
exposed die flag package.
CABLE REVERSE PATH
PROGRAMMABLE GAIN AMPLIFIER
•HomeNetworks
• Automotive/Mobile Multimedia
• Coaxial and Twisted Pair Line Driver
-A-
0.05
+ 0.05
Note 3
NOTES:
1. Shaded lead ispin1.
2. Lead coplanarity -0.10with
3. Lead standoff isspecifiedfrom
2.286
respect to datum "A".
the lowest point onthepackage
RF Micro Devices, Inc.
7625 ThorndikeRoad
Greensboro,NC 27409, USA
Tel (336)664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A10 010514
3-27
Page 2
3
RF3320
Absolute Maximum Ratings
ParameterRatingUnit
Supply Voltage-0.5 to +6.0V
Input RF Level12dBm
Operating Ambient Temperature-40 to +85°C
Storage Temperature-40 to +150°C
Humidity80%
Maximum Power Dissipation0.5W
Maximum T
J
150°C
DC
Preliminary
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time ofthis printing. However, RFMicro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility forthe useof the described product(s).
LINEAR CATV
Specification
UnitCondition
VCC=4.75V to 5.25V, TXEN=SHDNB=1,
V
=30dBmV (rms) differential, output
IN
impedance=75Ω through a 2: 1 transformer.
Typical performance is at TA=+25°C,
V
=5V.
CC
AMPLIFIERS
Overall
Parameter
Min.Typ.Max.
DC Specifications
SupplyVoltage4.755.05.25V
Supply Current
Maximum Gain130160mAGain Control Word=58
Low Gain65105mAG ain Control Word<35
Transmit Disable2535mATXEN=0
Software-Shutdown35mABit 7 of gain control word FALSE
Sleep0.05mASHDNB=0
Logic High Voltage2V
Logic Low Voltage0.8V
Logic Leakage Current-11µA
AC Specifications
Voltage Gain
Maximum2728dB5MHz to 42MHz; Gain Control Word=58
26dB42MHz to 65MHz; Gain Control Word=58
Minimum-30-29dB5MHz to 42MHz; Gain Control Word=0
-28dB42MHz to 65MHz; Gain Control Word=0
3dB Bandwidth100MHzIntended operating range is 5MHz to
1dB Compression Point66dBmV
Maximum Input Level34dBmV(rms) Modulated. To meet distortion specifications.
Maximum Output Level60dB mV(rms) Modulated. Into 75Ω load at balun output,all
ACPR-59-47dBcV
Output IM3-58-55dBcTones at 40MHz and 40.2MHz,
Output Third Harmonic
Distortion
F=20MHz, V
F=65MHz, V
Output Second Harmonic
Distortion
F=20MHz, V
F=65MHz, V
=59dBmV-60-55dBcMaximum Gain, CW
OUT
=59dBmV-55-50dBcMaximum Gain, CW
OUT
=59dBmV-70-60dBcMa ximum Gain
OUT
=59dBmV-70-60dBcMa ximum Gain
OUT
65MHz.
distortion tones <-50dBc.
=34dBmV (r m s); QPSK modulation;
IN
Symbol rate=160ksps (2 bits per symbol);
20-bit PRBS (pseudo-random bit stream);
0.25 alpha root cosine filter
=+54dBmV/tone, maximum gain, OIP3
V
OUT
is therefore +84dBmV, IIP3 is 58dBmV.
3-28
Rev A10 010514
Page 3
Preliminary
RF3320
Parameter
Min.Typ.Max.
Specification
UnitCondition
AC Specifications, cont’d
Output Step Size0.81.01.1dB
Isolation in Transmit Disable
Mode
Output Noise
Maximum Gain-37-30dBmV/
MinimumGain-55-50dBmV/
Transmit Disabled-75-70dBmV/
TX EN Enable Time0.51.0µSTime for gain to reach 99% of final value.
TX EN Transient Duration2.43.0µSSeeNote1.
Output Switching Transients510mV
Output Impedance255300345ΩChip output impedance is nominally 300Ω.
Input Impedance75ΩDifferential
-80-95dBcMaximum Gai n, 20MHz
160kHz
160kHz
160kHz
35mV
-96dBc for a 59dBmV carrier in a 160kHz
bandwidth.
-64dBc for an 8dBmV carrier in a 160kHz
bandwidth.
TXEN=0
SeeNote1.
Maximum Gain
P-P
Minimum Gain
P-P
Differential to single-ended output conversion to 75Ω is performed in a balun w ith a
2:1 turns ratio,corresponding toa 4:1 impedance ratio.
Thermal
Theta
JC
28°C/W
Note 1: The enable time is determined by the value of the capacitor on pin 8 (RAMP). A higher capacitor value will
increase the enable time, but will reduce the transient voltage.
3
LINEAR CATV
AMPLIFIERS
Rev A10 010514
3-29
Page 4
3
RF3320
Preliminary
PinFunctionDescriptionInterface Schematic
1SHDNB
2TXEN
3NC
4VIN
5VINB
Chip shutdown pin. Forcing a logic low causes all circuits to switch off
andgainsettingstobelost.
Signal path enable pin. Logic high turns on signal path. Logic low turns
off signal path, but leaves serial bus active.
Not connected. This pin shoul d be grounded.
Input pin. This should be externally AC-coupled to signal source.See pin 5.
Complementary input pin. This should be externally coupled to signal
source. For single-ended use, this pin should be AC-coupled to ground.
V
CC
550 Ω550 Ω
LINEAR CATV
500 Ω500 Ω
V
IN
AMPLIFIERS
6VCC
7VCC
8RAMP
9SCLK
10CS
11SDA
12VOUTB
13VOUT
14NC
15NC
16GND
PKG
GND
BASE
This pin is connected to the supply voltage.
Same as pin 6.
An external capacitor between this pin and ground controls turn-on
time.
Serial bus clock input.
Serial bus enable.
Serial bus data input.
Open collector output. Connect to VCC via balun primary.See pin 13.
Open collector output. Connect to VCC via balun primary.
Same as pin 3.
Same as pin 3.
Connect to ground.
Die is mounted ona heat sink slug that shouldbe connected to ground.
Device grounds are internally bonded to the slug.
V
OUTVOUTB
300 Ω
RE
V
INB
Serial Bus Block Diagram
CS
SDA
SCLK
3-30
D0D1D2D3D4D5D6
CLR
CLR
DCKQ
CLR
POR
Q
DCKQ
D
CK
CLR
D
Q
CK
CLR
CLR
DCKQ
D
Q
CK
CLR
CLR
DCKQ
D
Q
CK
CLR
CLR
DCKQ
D
Q
CK
CLR
CLR
DCKQ
D
Q
CK
CLR
CLR
DCKQ
D
Q
CK
Rev A10 010514
Page 5
Preliminary
Table 1. Serial Interface Control Word Format
BitMnemonicDescription
MSB 6D6Sleep Mode (Software Shutdown)
5D5Gain Control, BitMSB
4D4Gain Control, Bit 4
3D3Gain Control, Bit 3
2D2Gain Control, Bit 2
1D1Gain Control, Bit 1
LSB 0D0Gain Control, Bit LSB
RF3320
Serial Bus Timing D iagram
TESTDS TDHTEH
CS
SCLK
SDA
(Data)
D0D1
Table 2. Timing Data
ParameterSymbolMinTypMaxUnits
SCLK PulsewidthT
SCLK PeriodT
Setup Time, SDA versus S CLKT
Setup Time, CS versus S CLKT
Hold Time, SDA versus S CLKT
Hold Time, CS versus S CLKT
SCLK Pulsewidth, HighT
SCLK Pulsewidth, LowT
TDATAH,TDATAL
WH
C
DS
ES
DH
EH
DAT AH
DATAL
D2
50ns
100ns
10ns
10ns
20ns
20ns
50ns
50ns
D3D4D5D6
TWH
TC
3
LINEAR CATV
AMPLIFIERS
Table 3. Programming State
TXSHDNDMSB6
Enter Sleep ModeXHLH=High Voltage Logic
Exit Sleep ModeXHH*L=Low Voltage Logic
Enter ShutdownXLXX=Don’t Care
Exit ShutdownXHH**Gain Control Data Must be Re-Sent
TX EnableHXX
TX DisableLXX
The RF3320 Evaluation board can be used as a guide for the layout in your application. Care should be taken in laying
out the RF3320 in other applications. The RF3320 will have similar results if the following guidelines are taken into consideration:
• Make sure underside of package is soldered to a good ground on the PCB.
• Keep input and output traces as short as possible.
• Ensure a good ground plane by using multiple vias to the ground plane.
• Use a low noise power supply along with decoupling capacitors.
Power Up Settling Time Coming Out Of Shutdown Condition (Entire Pulse)Power Up Settling Time Coming Out Of Sleep Condition
Power Up Settling Time Coming Out Of Shutdown Condition
Rev A10 010514
3-39
Page 14
RF3320
Preliminary
Evaluation Kit
3
General Description
The RF3320 PCBA is a fully assembled evaluation
board of the RF3320 reverse path high output power
programmable gain amplifier, useful for providing a
demonstration of the RF3320’s functionality. The
RF3320 PCBA is a digitally controlled variable gain
amplifiercapable of driving a 75Ω source. The RF3320
is designed to send cable modem data with QPSK or
QAM modulated format at frequencies between 5 MHz
and 65MHz. The gain is controlled by an 7-bit serial
data word which adjusts the output gain from -30dB to
+28dB.
The kit includes a fully functional evaluation board
AMPLIFIERS
LINEAR CATV
along with a serial data cable and software. The cable
connects directly to the parallel port of a standard PC.
The software is used to control the serially programmable gain through a s imple, easy to understand user
interface.
Input and output to the evaluation board is provided
through 50Ω SMA connectors. The input and output of
the evaluation board is matched to 50Ω and connected
through a balun for single-ended operation. This allows
easy connection to test equipment, but the evaluation
board can easily be converted to a 75Ω input and output, or for differential input and output. The output circuit is matched using a 24Ω series resistor which is
used to bring the load impedance up to 75Ω when
using standard 50Ω test equipment. This will introduce
a loss which must be accounted for in all measurements (see measurementsection and evaluation board
schematic for more detail).
device to 75Ω. This introduces a voltage loss of 3.5dB
which must be accounted for in all measurements.
Some spectrum analyzershave a setting to account for
this method of 75Ω testing (e.g., on a Rhode &
Schwartz spectrum analyzer the input can be set to
'”75Ω RAZ” and the loss is accounted for automatically). A more accurate way of making this measurement is to use a 75Ω spectrum analyzer, or use a
matching transformer or minimum loss pad. This
ensures that the s ource impedance seen by the equipment is also 75Ω.Ifa75Ω output is required, simply
replace the 50Ω SMA connector (J7) with a 75Ω Fstyle connector and replace R5 with a 0Ω jumper. The
evaluation board is tested with a Coilcraft balun; however, additional baluns may be used as long as care is
taken in modifying the decoupling capacitors around
the balun. These capacitors can greatly affect the harmonic s uppression. Other baluns may be used but
should be tested for second and third order harmonic
suppression.
Transmit Enable
The transmit enable can be set to “continuous on” by
placing the TXEN jumper in the up position (up position
when viewing the top of the evaluation board with the
25 pin connector closest to the viewer) and placing the
associated GND/V
jumper in the “VCC” position. The
CC
transmit enable can be set to “continuous off” by placing the GND/V
jumper in the “GND” position. If a
CC
computer controlled signal is used (J1), place the
TXEN jumper in the down position.
GNDVCC
GNDVCC
GNDVCC
PCBA Details
Input Circuit
The input to the RF3320 is differential and the impedance is 75Ω; However, for ease of testing, the evaluation board has been changed to single-ended and the
impedance has been matched to 50Ω.Ifa75Ω input is
required, simply replace the 50Ω SMA connector with
a75Ω F-style connector and remove R3 and R4.
Output Circuit
The output of the RF3320 is differential and the impedance is 300Ω. In nor m al applications this is converted
into a single-ended 75Ω output using a 2:1 (voltage
ratio) transformer with a center-tap on the secondary
which supplies power to the output stage. The evaluation board is configured for use with 50Ω test equipment. This has been achieved with a 24Ω resistor in
series with the output to increase the load seen by the
3-40
TX EN
Continuous ON
A
TX EN
Continuous OFF
B
Figure 1. TX Enable Configuration
TX EN
Software Controlled
C
Rev A10 010514
Page 15
Preliminary
RF3320
Shutdown Enable
Shutdown enable can be set to be “continuous on”
(chip enabled) by placing the SHDN jumper in the up
position and placing the associated GND/V
in the “V
” position. Shutdown enable can be set to
CC
CC
jumper
“continuous off” (chip disabled) by placing the associated GND/V
jumper in the “GND” position. If a com-
CC
puter controlled signal is used (J1), place the SHDN
jumper in the down position.
GNDVCC
C
SHDN
Continuous OFF
A
GNDVCC
SHDN
Continuous ON
GNDVCC
SHDN
B
Software Controlled
Figure 2. SHDN Enable Configuration
V
Settings
CC
V
should be set to 5.0VDC.
CC1
Evaluation Board Setup
Equipment Needed
• Signal Generator
• Spectrum Analyzer
• Power Supply (5.0V@300mA)
• RF3320 PCBA
• Serial Cable (included with kit)
• Standard PC
• Three-Wire Bus Software
Optional Equipment
• Variable Low-Pass or Band-PassFilters
• Power Meter
• Second SignalGenerator withModulation forACPR
and IP2, IP3 Testing
• Arbitrary Wave Generator
• Two-Channel Oscilloscope
Unzip the file using WinZip 7.0 or higher (http://
www.winzip.com). Unzip to a temporary directory and
run RF3320.exe.
The 7-bit Gain Control Word (GCW) in the data latch
determines the gain setting in the RF3320. The gain
control data (SDA) load sequence is initiated by a falling edge on CS. The SDA is serially loaded (LSB first)
into the 7-bit shift register at each rising edge of the
clock. W hile CS is low, the data latch holds the previous data word allowing the gain level to remain
unchanged. After seven clock cycles the new data
word is fully loaded and CS is switched high. This
enables the data latch and the loaded register data is
passed to the gain control block with the updated gain
value. Also at this CS transition, the internal clock is
disabled, thus inhibiting new serial input data.
Software and Cable
Figure 3 shows the cable configuration. Connect the
cable into the LPT1 port of the computer running the
software. Connect the other end of the cable to the 25pin connector of the evaluation board. Executing the
software (RF3320.exe) will produce the screen shown
in Figure 4. The user may set the gain of the evaluation
board by sliding the gain control switch to the desired
gain setting. Pressing the Preset Gain Value buttons
automatically sets the gain of the unit to the value
shown on the button. The Automatic Gain Adjustment
when set to “Cycle” will automatically cycle through all
of the gain steps (0-58) in seconds (at the rate set by
the user). The user may place the unit in sleep, shutdown and transmit enable/disable m odes by checking
the corresponding box. The bit pattern being sent to
the PCBA is shown at the bottom of the screen. See
README_3320.txt file for proper pin/signal mapping
for the 25 pin interface.
3
LINEAR CATV
AMPLIFIERS
Software Setup
To install the software, you need a computer with the
following.
• 133MHz Pentium processor
•16MBRAM
• Hard Drive with 5MB free space
• Free 25-pin LPT port
• VGA Monitor
The software may be downloaded from www.rfmd.com
by following these steps.
To test the gain of the RF3320 PCBA, connect a lowpass or band-pass filter to the output of the signal generator. Use a filter just above thefrequencyyouwant to
test. The filter is used to attenuate any harmonics output by the signal generator. Connect the signal generator to the power meter and measure the power.
Compare with modulation enabled and disabled to
make sure the meter was measuring average rather
than peak power. No more than 0.2dB difference in
powershouldbeobserved. An offset on the signalgenerator may be needed to match the level shown on the
power meter. The signal generator should then be connected directly to a spectrum analyzer. Make sure the
output of the signal generator is the same as the input
read by the spectrum analyzer. Adjust the offset of the
spectrum analyzer until the signal out is the same as
the signal in on the spectrum analyzer. Turn off the RF
and modulation. Check positioning of the jumpers on
the board. Refer to the PCBA section of this application note to verify proper positions. Connect the output
of the signal generator to J6: RFIN of the PCB. Connect J7: RFOUT to the spectrum analyzer. Ensure that
18Ground
25 Pin D-Connector (Back View)
6TX Enable Line
5SHUTDOWNLine
4CLK Line
3DataLine
2CSLine
Figure 4. On-Screen Display
you are accounting correctly for the losses in the 75Ω
to 50Ω conversion at the output of the device; there is
an output voltage loss of 3.5 dB for the evaluation
board in its standard configuration (see output stage
circuit description).Connect one end of the serial cable
into the computer and the other end into J1 of the PCB.
Connect +5.0V
Turn on the DC power and turn on RF from the signal
generator. Set the GCW to 58 and make sure
TXEnable is checked. The amplified signal should be
displayed on the spectrum analyzer. The harmonics
can also be viewed with this s etup. As you change the
GCW from 58 to 0 (in s teps of one), there will be a 1dB
change in the output of the PCB.
ACPR Test Setup
To test the ACPR of the RF3320 PCBA set modulation
to:
•QPSK
• 2Bits/Sym
• 160ksps
• α=0.25
• PRBS-20bit Data
into V+ and ground into GND(JP1).
DC
3-42
Rev A10 010514
Page 17
Preliminary
RF3320
Set signal generator to:
•45MHz,
•-13.0dBm output power,
• 0dB offset.
Connect 50MHz coaxial filter to output, then to output
cable.
Zero and calibrate the power meter. Connect signal
generator to power meter and set offset on signal generator until power meter reads -13.0dBm. Make sure
power meter reads the same (±0.2dBm) with modulation enabled and disabled to verify power meter is
measuring average power rather than peak power.
Check positioning of the jumpers on the board. Refer
to the PCBA section of this application note to verify
proper positions. Connect the output of the signal generator to J6: RFIN of the PCB. Connect J7: RFOUT to
the power meter. Connect one end of the serial cable
to the computer and the other end into P1 of the PCB.
Connect +5.0V
the DC power and turn on RF and modulation from the
signal generator. Set the GCW to 58 and make sure
TX Enable is checked. Measure and record channel
power at RFOUT using the power meter (accounting
for 75/50 conversion losses). Connect RFOUT to spectrum analyzer and adjust offset of the spectrum analyzer until the channel power displayed by the
spectrum analyzer is equal to the channel power
recordedinthepreviousstep(channel
bandwidth=200kHz). Now use the spectrum analyzer
to measure relative ACP (this way the uncertainties in
the spectrum analyzer power measurement are immaterial). The ACP is measured in 200kHz channel bandwidths at a 220kHz offset (i.e., from 20kHz to 220kHz
outside the channel). As you increase the input power,
you will notice a degradation of the ACP upper and
lower bands. Datasheet performance is measured at
an input level of 34dBmV.
to VCCandgroundtoGND.Turnon
DC
will be displayed on the oscilloscope. Measure the
amount of time between 90 percent of the TXEN turnon to where the output signal reaches 90 percent of full
turn-on. This is defined as the transmit turn-on time.
To measure the transient pulse, replace the signal generator input with a 50Ω terminator and repeat the steps
above. Measure the size of the transient. This can be
affected by the C
balun and capacitor values around the balun. Larger
values of C
and increase the TX enable time.
PCB Layout Considerations
The RF3320 Evaluation board can be used as a guide
for the layout in your application. Care should be taken
in laying out the RF3320 in other applications. The
RF3320 will have similar results if the following guidelines are taken into consideration:
• Make sure underside of package is soldered to a
good ground on the PCB.
• Move C2, C7, C8, and C9 as close to T1 as possible.
• Keep input and output traces as short as possible.
• Ensure a good ground plane by using multiple vias
to the ground plane.
• Use a low noise power supply along with decoupling capacitors.
RAMP
capacitor (C6), and the output
RAMP
will decrease the transient voltage
3
LINEAR CATV
AMPLIFIERS
Transmit Turn-On and Turn-Off Transients
UseanArbitraryWaveformGeneratorsettoa3V
square wave, 5% duty cycle, 120Hz as the input to the
transmit enable. Set a signal generator to 10MHz, -
13.0 d bm output power, 0dB offset. Connect output of
the signal generator to J6, RFIN of the PCB. Remove
the TXEN jumper and connect the arbitrary wave generator square wave output to the center pin of the
TXEN 3-pin header. Connect the output of the evaluation board to the oscilloscope (channel 1). Connect the
TXEN signal from the arbitrary wave generator to
channel 2 of the oscilloscope and trigger off of the risingedge.AstheTXENlineissent,theoscilloscope
will trigger and capture the pulsed RFOUT signal. This
Rev A10 010514
3-43
Page 18
3
RF3320
Special Handling Information for S hrunk Small
Outline Package (SSOP1-EPP) Products
These packages are considered JEDEC Level 5 for
moisture sensitivity and require special handling to
assure reliable performance.
The exposedcopper slug on the bottom of the package
improves both thermal and electrical performance.
Since the RFIC is mounted directly on the thermal
slug, and the slug is soldered directly on the PCB, the
thermal resistance to the PCB is minimized. Also, the
RF ground for the amplifier is established through this
copper slug as it is soldered to the ground plane on the
PCB. This offers the least inductance ground path
available.
Care must be taken when soldering these packages to
AMPLIFIERS
LINEAR CATV
the PCB. They are currently considered JEDEC Level
5 for moisture sensitivity. Therefore the parts must be
handled in a dry environment prior to soldering, as is
specified in the JEDEC specification. Specifically,
RFMD recommends the following procedure prior to
assembly:
1. Dry-bake the parts at 125°C for 24 hours minimum.
Note: the shipping tubes cannot withstand 125°C
baking temperature.
2. Parts delivered on tape and reel are already drybaked and dry-packed. These may be stored for up
tooneyear,butmustbeassembledwithin48hours
after opening the bag.
3. Assemble the dry-baked parts within two days of
removal from the oven.
4. During this two-dayperiod, the parts must be stored
in humidity less than 60 percent.
IMPORTANT!
If the two-day period is exceeded, then this procedure
must be repeated prior to assembly.
Preliminary
3-44
Rev A10 010514
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