Page 1
查询RF3315供应商
RF3315
0
Pb-Free Product
Typical Applications
• Basestation Applications
• Cellular and PCS Systems
Product Description
The RF3315 is a high-efficiency GaAs Heterojunction
Bipolar Transistor (HBT) amplifier packaged in a low-cost
surface-mount package. This amplifier is ideal for use in
applications requiring high-linearity an d low noise figure
over the 300MHz to 3GHz frequency range. The RF3315
operates from a single 5V power supply.
BROADBAND HIGH LINEARITY AMPLIFIER
• WLL, W-CDMA Systems
• Final PA for Low-Power Applications
1.04
0.80
3.10
2.90
0.48
0.36
2 PL
Shaded lead is pin 1.
2.60
2.40
0.50
0.30
4.60
4.40
Dimensions in mm.
1.75
1.40
0.43
0.38
1.60
1.40
1.80
1.45
0.53
0.41
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
InGaP/HBT
9
SiGe HBT
GaN HEMT SiGe Bi-CMOS
GND
4
1 2 3
GND
RF IN
Si CMOS
RF OUT
Functional Block Diagram
Package Style: SOT89
Features
• 300MHz to 3GHz
• +40dBm Output IP3
• 12.5dB Gain at 2.0GHz
• +23dBm P1dB
• 3.0dB Typical Noise Figure at 2.0GHz
• Single 5V Power Supply
Ordering Information
RF3315 Broadband High Linearity Amplifier
RF3315PCBA-410Fully Assembled Evaluation Board (2GHz)
RF3315PCBA-411Fully Assembled Evaluation Board (900MHz)
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A9 050310
4-557
Page 2
RF3315
Absolute Maximum Ratings
Parameter Rating Unit
RF Input Power +20 dBm
Device Voltage -0.5 to +6.0 V
Device Current 250 mA
Operating Temperature -40 to +85 °C
Storage Temperature -40 to +150 °C
Caution! ESD sensitive device.
RF Micro Devices belie ves t he furnished inf ormation is correct and accur ate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Parameter
Min. Typ. Max.
Specification
Unit Condition
Overall
AC Specifications (2GHz)
Frequency 300 3000 MHz
Gain (Small Signal) 11.0 12.5 dB F=2GHz
Input Return Loss 15 dB F=2GHz
Output Return Loss 15 dB F=2GHz
Output IP3 +36 +40.0 dBm F
Output P1dB +21 +23.0 dBm
Noise Figure 3.0 4.0 dB
AC Specifications
(900MHz)
Frequency 300 3000 MHz
Gain (Small Signal) 16 18 dB
Input Return Loss 20 dB
Output Return Loss 20 dB
Output IP3 +36 +41 dBm F
Output P1dB +23 +25 dBm
Noise Figure 2.5 3.5 dB
Thermal
Theta
JC
Maximum Measured Junction
Temperature at DC Bias Conditions
Mean Time To Failure 370 years T
88 °C/W
154 °C T
VCC=5V, RFIN=-10dBm, Freq=2.0GHz,
with 2GHz application schematic.
= 1.99GHz, F2=2.00GHz, PIN=-5dBm
1
VCC=5V, RFIN=-10dBm, Freq=900MHz,
with 900MHz application schematic.
= 900MHz, F2=901MHz, PIN=-10dBm
1
ICC=150mA, P
=+85°C
CASE
=+85°C
CASE
=770mW. (See Note.)
DISS
DC Specifications
Device Voltage 4.5 5.0 5.5 V ICC=150mA
Operating Current Range 100 150 170 mA V
Note: The RF3315 must be operated at or below 170mA to ensure the highest possible reliability and electrical performance.
CC
=5V
4-558
Rev A9 050310
Page 3
RF3315
Pin Function Description Interface Schematic
1RF IN
RF input pin. This pin is not internally DC-blocked. A DC blocking
capacitor, suitable for the frequency of operation, should be used in
most applications.
VCC
RF IN
2GND
3RF OUT
4GND
Pkg
GND
Base
Ground connection.
RF output and bias pin. For biasing, an RF choke is needed. Because
DC is present on this pin, a DC blocking capacitor, suitable for the frequency of operation, should be used in most applications. See application schematic for configuration and value.
Ground connection.
Ground connection.
VCC
RF OUT
Rev A9 050310
4-559
Page 4
RF3315
Typical Application Schematic for 2GHz
V
CC
1 µF
+
100 pF
+
82 nH
1.5 pF
100 pF
V
CC
+
1 µF
RF IN
+
F
p
1
0
0
4
1 2 3
2.2 pF
Evaluation Board Schematic for 2GHz
VCC
+
1 µF
100 pF
+
C3
100 pF
4
+
C4
1 µF
+
RF OUT
3.6 nH
P1
P1-1 VCC1
VCC
1
2
3
CON3
GND
GND
4-560
J1
RF IN
50 Ω µstrip
1 2 3
1
C
p
0
0
1
C2
F
2.2 pF
L1
82 nH
C3
1.5 pF
50 Ω µstrip
L2
3.6 nH
J2
RF OUT
Rev A9 050310
Page 5
RF3315
Typical Application Schematic for 900MHz
4
V
CC
1 µF
+
RF OUT
RF IN
4.7 pF
4.7 nH
1 2 3
100 nH
100 pF
6 pF
8.7 nH
Evaluation Board Schematic for 900MHz
P1
CON3
J1
RF IN
1
GND
2
GND
3
4.7 pF
4.7 nH
P1-1 VCC
C1
L1
4
1 2 3
L2
100 nH
C3
100 pF
C2
6 pF
L3
8.7 nH
V
CC
+
C4
1 µF
J2
RF OUT
Rev A9 050310
4-561
Page 6
RF3315
Evaluation Board Layout for 1.9GHz
Board Size 1.195” x 1.000”
Board Thickness 0.033”, Board Material FR-4
Note: A small amount of ground inductance is required to achieve datasheet performance. The necessary inductance
may be generated by ensuring that no ground vias are placed directly below the footprint of the part.
Evaluation Board Layout for 900MHz
Board Size 1.195” x 1.000”
Board Thickness 0.033”, Board Material FR-4
Note: A small amount of ground inductance is required to achieve datasheet performance. The necessary inductance
may be generated by ensuring that no ground vias are placed directly below the footprint of the part.
4-562
Rev A9 050310
Page 7
RF3315
Gain versus Frequency Across Temperature,
15.0
14.0
13.0
12.0
11.0
10.0
Gain (dB)
9.0
8.0
7.0
6.0
5.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Application Frequency)
Frequency (M Hz)
P1dB versus Frequency Across Temperature
26.0
25.0
24.0
23.0
22.0
21.0
20.0
P1dB (dBm)
19.0
18.0
17.0
16.0
15.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Appli cation Frequency)
Frequency (MH z)
-40°C
25°C
85°C
-40°C
25°C
85°C
OIP3 versus Frequency Across Temperature
44.0
43.0
42.0
41.0
40.0
39.0
OIP3 (dBm)
38.0
37.0
36.0
35.0
34.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Application Frequency)
Frequency (M Hz)
Reverse Isolation versus Frequency Across Temp
-15.0
-16.0
-17.0
-18.0
-19.0
-20.0
-21.0
Isolation (dB)
-22.0
-23.0
-24.0
-25.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Application Circuit)
Frequency (MH z)
-40°C
25°C
85°C
-40°C
25°C
85°C
Noise Figure versus Frequency Across Temperature
6.0
5.0
4.0
3.0
Noise Figure (dB)
2.0
1.0
0.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Application Circuit)
Frequency (MH z)
Rev A9 050310
-40°C
25°C
85°C
4-563
Page 8
RF3315
Input VSWR versus Frequency Across Temperature,
2.4
2.2
2.0
1.8
VSWR
1.6
1.4
1.2
1.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Application Circuit)
Frequency (M Hz)
Gain versus Frequency Across Temperature,
20.0
19.0
18.0
17.0
16.0
15.0
Gain (dB)
14.0
13.0
12.0
11.0
10.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
VCC=5.0V ( 900M H z A pplicati on C ircuit)
Frequency (MH z)
-40°C
25°C
85°C
-40°C
25°C
85°C
Output VSWR versus Frequency Across Temperature,
2.4
2.2
2.0
1.8
VSWR
1.6
1.4
1.2
1.0
1750.0 1800.0 1850.0 1900.0 1950.0 2000.0 2050.0 2100.0 2150.0 2200.0 2250.0
VCC=5.0V (2GHz Application Circuit)
Frequency (MH z)
OIP3 versus Frequency Across Temperature
48.0
45.0
42.0
39.0
36.0
OIP3 (dBm)
33.0
30.0
27.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
VCC=5.0V ( 900M H z A pplicati on C ircuit)
Frequency (M Hz)
-40°C
25°C
85°C
-40°C
25°C
85°C
P1dB versus Frequency Across Temperature
28.0
27.0
26.0
25.0
24.0
23.0
P1dB (dBm)
22.0
21.0
20.0
19.0
18.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
VCC=5.0 ( 900M H z App licatio n Circuit)
Frequency (MH z)
4-564
-40°C
25°C
85°C
Reverse Isolation versus Frequency Across Temp,
-10.0
-15.0
-20.0
Reverse Isolation (dB)
-25.0
-30.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
VCC=5.0V ( 900M H z A pplicati on C ircuit)
Frequency (M Hz)
Rev A9 050310
-40°C
25°C
85°C
Page 9
RF3315
Noise Figure versus Frequency Across Temperature
7.0
6.0
5.0
4.0
3.0
Noise Figure (dB)
2.0
1.0
0.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
VCC=5.0V ( 900M H z A pplicati on C ircuit)
Frequency (MH z)
Output VSWR versus Frequency Across Temperature,
3.5
3.0
VCC=5.0V ( 900M H z A pplicati on C ircuit)
-40°C
25°C
85°C
Input VSWR versus Frequency Across Temperature
3.5
3.0
2.5
VSWR
2.0
1.5
1.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
VCC=5.0V ( 900 MH z Ap plicati on Circuit )
Frequency (M Hz)
ICC versus VCC Across Temperature
200.0
180.0
160.0
-40°C
25°C
85°C
2.5
VSWR
2.0
1.5
1.0
700.0 750.0 800.0 850.0 900.0 950.0 1000.0 1050.0
Frequency (MH z)
MT TF versus Ju nction Tem p erature,
1000000.0
100000.0
10000.0
1000.0
MTTF (Years)
100.0
10.0
(60% Con fidence Interval)
-40°C
25°C
85°C
140.0
(mA)
CC
I
120.0
100.0
80.0
60.0
3.03.54.04.55.05.56.0
VCC (V)
-40°C
25°C
85°C
1.0
100.0 125.0 150.0 175.0 200.0
Rev A9 050310
Junction Tem perature (°C)
4-565
Page 10
RF3315
S11
S11
8
1.0-1.0
.
0
6
.
0
4
.
0
2
.
0
300 MHz
0
0.2
2
.
0
-
4
.
0
-
3 GHz
0.4
6
.
0
-
1.0
0.6
0.8
8
.
0
-
2.0
Swp Max
3GHz
0
.
2
0
.
3
0
.
4
0
.
5
0
.
0
1
10.0
5.0
3.0
4.0
0
.
0
1
-
0
.
5
-
0
.
4
-
0
.
3
-
0
.
2
-
2
.
0
0
2
.
0
-
Swp Min
6
.
0
4
.
0
3 GHz
300 MHz
0.2
0.4
4
.
0
-
6
.
0
-
0.3GHz
S22
S22
8
1.0-1.0
.
0
1.0
0.6
0.8
8
.
0
-
2.0
Swp Max
3GHz
0
.
2
0
.
3
0
.
4
0
.
5
0
.
0
1
10.0
5.0
3.0
4.0
0
.
0
1
-
0
.
5
-
0
.
4
-
0
.
3
-
0
.
2
-
Swp Min
0.3GHz
4-566
Rev A9 050310
Page 11
RF3315
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD’s qualification process is electroless nickel, immersion gold. Typical thickness is
3µinch to 8µinch gold over 180µinch nickel.
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and
tested for optimized assembly at RFMD; however, it may require some modifications to address company specific
assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
PCB Metal Land Pattern
A = 1.27 x 0.86 (mm) Typ.
Dimensions in mm.
3.43
2.79
2.34
1.48
1.02
0.43
Pin 1
A
A
Figure 1. PCB Metal Land Pattern (Top View)
0.03
0.66 Typ.
1.88 Typ.
5.36
Rev A9 050310
4-567
Page 12
RF3315
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the
PCB metal land pattern with a 2 mil to 3 mil expansion to accommodate solder mask regist ration clearance around all
pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create s older mask
clearance can be provided in the master data or requested from the PCB fabrication supplier.
A = 1.37 x 0.96 (mm) Typ.
Dimensions in mm.
5.46
3.48
2.89
2.44
1.48
1.02
0.48
0.03
0.72 Typ.
1.88 Typ.
Pin 1
A
A
Figure 2. PCB Solder Mask Pattern (Top View)
Thermal Pad and Via Design
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating
routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size
on a 0.5 mm to 1.2mm grid patter n with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested
that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
4-568
Rev A9 050310
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