Datasheet RF3166 Datasheet (RF Micro Devices)

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Typical Applications
• 3V Quad-Band GSM Handsets
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
Product Description
The RF3166 is a high-power, high-efficiency power ampli­fier module with integrated power control that provides over 50dB of control range. The device is a self-contained 6 mmx6mm module with 50Ω input and ou tput ter mina ls. The device is designed for use as the final RF amplifier in GSM850, EGSM900, DCS and PCS handheld digital cel­lular equipment and other applications in the 824 MHz to 849MHz, 880MHz to 915MHz, 1710MHz to 1785MHz and 1850 MH z to 1910MHz bands. The RF3166 inc orp o­rates RFMD’ s latest V
battery voltage and prevents the power control loop from reaching saturation. The V
the need to monitor battery voltage, thereby minimizing switching transients. The RF3166 requires no external routing or external components, simplifying layout and reducing board space.
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT Si Bi-CMOS InGaP/HBT
9
tracking circuit, which monitors
BATT
tracking circuit eliminates
BATT
SiGe HBT
9
Si CMOS
GaN HEMT SiGe Bi-CMOS
QUAD-BAND GSM850/GSM900/DCS/PCS
POWER AMP MODULE
• GSM850/EGSM900/DCS/PCS Products
• GPRS Class 12
• Power Star
Package Style: Module, 6mm x6mm
TM
Module
1
6.00 ± 0.10
Shaded areas represent pin 1.
5.823
5.500
5.400 TYP
5.225 TYP
5.200 TYP
4.625 TYP
4.450 TYP
3.850 TYP
3.675 TYP
3.075 TYP
2.900 TYP
2.300 TYP
2.125 TYP
1.525 TYP
1.350 TYP
0.800 TYP
0.600 TYP
0.500 TYP
0.000
1.40
1.25
6.00
± 0.10
0.450
± 0.075
Dimensions in mm.
0.565 TYP
0.100 TYP
0.000 TYP
2.600 TYP
1.750 TYP
1.225 TYP
1.150 TYP
0.965
2.850
5.100
5.057
2.000 TYP
1.150 TYP
0.565 TYP
1
4.650
5.900 TYP
5.435
5.370
5.035
4.600
4.300
4.200
3.800
3.400
3.065
3.000
2.600
2.100
1.700
1.365
1.300
0.900 TYP
0.750 TYP
0.565 TYP
0.100 TYP
5.500 TYP
5.435 TYP
5.900 TYP
Features
• Ultra-Small 6mmx6mm Package Size
DCS/PCS
BAND SELECT
TX ENABLE
VBATT
VRAMP
Rev A1 051107
RFIN
2 3 4
GND
5 6
GSM
RF IN
Functional Block Diagram
DCS/PCS
91
RFOUT
GSM
87
RFOUT
• Integrated V
REG
• Complete Power Control Solution
• Automatic V
Tracking Circuit
BATT
• No External Components or Routing
• Improved Power Flatness
RF3166 Quad-Band GSM850/GSM900/DCS/PCS
RF3166 SB Power Amp Module 5-Piece Sample Pack RF3166PCBA-410 Fully Assembled Evaluation Board RF3166ASMPCBA-410Fully Assembled Evaluation Board with
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA
Power Amp Module
Antenna Switch Module
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
2-491
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Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.3 to +6.0 V Power Control Voltage (V Input RF Power +10 dBm
Max Duty Cycle 50 % Output Load VSWR 10:1 Operating Case Temperature -20 to +85 °C Storage Temperature -55 to +150 °C
) -0.3 to +2.2 V
RAMP
DC
Caution! ESD sensitive device.
RF Micro Devices belie ves t he furnished inf ormation is correct and accur ate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
Min. Typ. Max.
Specification
Unit Condition
Overall Power Control V
Power Control “ON” 2.1 V Max. P Power Control “OFF” 0.26 V Min. P V V TX Enable “ON” 1.5 V
TX Enable “OFF” 0.5 V GSM Band Enable 0.5 V DCS/PCS Band Enable 1.5 V
RAMP
Input Capacitance 2 20 pF DC to 2MHz
RAMP
Input Current 30 μAV
RAMP
RAMP
, Voltage supplied to the input
OUT
, Voltage supplied to the input
OUT
=2.1V
Overall Power Supply
Power Supply Voltage 3.5 V Specifications
3.0 4.5 V Nominal operating limits
Powe r Supply Current 1 μAP
150 mA V
<-30dBm, TX Enable=Low,
IN
Temp=-20°C to +85°C
=0.26V, TX Enable=High
RAMP
Overall Control Signals
Band Select “Low” 0 0 0.5 V Band Select “High” 1.5 2.0 3.0 V Band Select “High” Current 20 50 μA TX Enable “Low” 0 0 0.5 V TX Enable “High” 1.5 2.0 3.0 V TX Enable “High” Current 1 2 μA
2-492
Rev A1 051107
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Parameter
Overall (GSM850 Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= +25 °C, V
=2.1V, PIN=3dBm,
V
RAMP
Freq=824MHz to 849MHz,
BATT
=3.5V,
25% Duty Cycle, Pulse Width=1154μs Operating Frequency Range 824 to 849 MHz Maximum Output Power 1 34.2 dBm Temp=+25°C, V
Maximum Output Power 2 32.0 dBm Temp=+85°C, V Total Efficiency 45 52 % At P
OUT MAX
, V
BATT BATT
BATT
=3.5V, V =3.0V, V
=3.5V
RAMP RAMP
=2.1V =2.1V
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini-
mum drive level Output Noise Power -85 -83 dBm RBW=100kHz, 869MHz to 894MHz,
< +34.2dBm
P
OUT
Forward Isolation 1 -45 -30 dBm TXEnable=Low, P Forward Isolation 2 -30 -10 dBm TXEnable=High, P
=0.26V
V
RAMP
Cross Band Isolation at 2f
-30 -20 dBm V
0
Second Harmonic -15 -10 dBm V Third Harmonic -30 -15 dBm V All Other
-36 dBm V
Non-Harmonic Spurious
=0.26V to V
RAMP
=0.26V to V
RAMP
=0.26V to V
RAMP
=0.26V to 2.1V
RAMP
=+5dBm
IN
=+5dBm,
IN
RAMP_RP RAMP_RP RAMP_RP
Input Impedance 50 Ω Input VSWR 2.5:1 Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load. No damage or permanent degradation
to part. Output Load Impedance 50 Ω Load impedance presented at RF OUT pad
Power Control V
Power Control Range 50 55 dB V Transient Spectrum -35 dBm V Transient Spectrum Under
Extreme Conditions
Power Degradation from
Nominal Conditions
RAMP
-23 dBm Temp=-20°C to +85°C, V
5dBm to 14dBm -4 +4 d B
14dBm to 32dBm -2 +2 dB
=0.26V to 2.1V
RAMP
RAMP=VRAMP_RP
>3.0V.
BATT
Ramping shape same as for Condition:
Temp= 25°C, V
V
RAMP=VRAMP_RP
=3.0V to 4.5V , Temp=-20°C to +85°C,
V
BATT
=0dBm to 5dBm,
P
IN
BATT
=3.5V,
Relative to output power for condition:
=3.5V, PIN=+3dBm, Temp=25°C,
V
BATT
Freq=836.5MHz.
Output power variation measured at set
.
V
RAMP
Notes: V
RAMP_RP=VRAMP
set for 34.2dBm at nominal conditions.
Rev A1 051107
2-493
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Parameter
Overall (GSM900 Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= +25 °C, V
=2.1V, PIN=3dBm,
V
RAMP
Freq=880MHz to 915MHz,
BATT
=3.5V,
25% Duty Cycle, Pulse Width=1154μs Operating Frequency Range 880 to 915 MHz Maximum Output Power 1 34.2 dBm Temp=+25°C, V
Maximum Output Power 2 32.0 dBm Temp=+85°C, V Total Efficiency 51 56 % At P
OUT MAX
, V
BATT BATT
BATT
=3.5V, V =3.0V, V
=3.5V
RAMP RAMP
=2.1V =2.1V
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini-
mum drive level Output Noise Power -83 -80 dBm RBW=100kHz, 925MHz to 935MHz,
< +34.2dBm
P
OUT
-85 -83 dBm RBW=100kHz, 935MHz to 960MHz, < +34.2dBm
P
OUT
Forward Isolation 1 -40 -30 dBm TXEnable=Low, P Forward Isolation 2 -30 -10 dBm TXEnable=High, P
=0.26V
V
RAMP
Cross Band Isolation 2f
-30 -20 dBm V
0
Second Harmonic -15 -10 dBm V Third Harmonic -30 -15 dBm V All Other
-36 dBm V
Non-Harmonic Spurious
=0.26V to V
RAMP
=0.26V to V
RAMP
=0.26V to V
RAMP
=0.26V to 2.1V
RAMP
=+5dBm
IN
=+5dBm,
IN
RAMP_RP RAMP_RP RAMP_RP
Input Impedance 50 Ω Input VSWR 2.5:1 Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load
Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load. No damage or permanent degradation to part.
Output Load Impedance 50 Ω Load impedance presented at RF OUT pad
Power Control V
Power Control Range 50 55 dB V Transient Spectrum -35 dBm V Transient Spectrum Under
Extreme Conditions
Power Degradation from
Nominal Conditions
RAMP
-23 dBm Temp=-20°C to +85°C, V
5dBm to 14dBm -4 +4 d B
14dBm to 32dBm -2 +2 dB
=0.26V to 2.1V
RAMP
RAMP=VRAMP_RP
>3.0V.
BATT
Ramping shape same as for Condition: Temp= 25°C, V
V
RAMP=VRAMP_RP
=3.0V to 4.5V, T emp=-20°C to +85°C ,
V
BATT
=0dBm to 5dBm,
P
IN
BATT
=3.5V,
Relative to output power for condition:
=3.5V, PIN=+3dBm, Temp=25°C,
V
BATT
Freq=897.5MHz. Output power variation measured at set
.
V
RAMP
Notes: V
RAMP_RP=VRAMP
set for 34.2dBm at nominal conditions.
2-494
Rev A1 051107
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Parameter
Overall (DCS Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= 25°C, V
=2. 1V, PIN=3dBm,
V
RAMP
Freq=1710MHz to 1785MHz,
BATT
=3.5V,
25% Duty Cycle, pulse width=1154μs Operating Frequency Range 1710 to 1785 MHz Maximum Output Power 1 32.0 dBm Temp=+25°C, V
Maximum Output Power 2 30.0 dBm Temp=+85°C, V Total Efficiency 46 52 % At P
OUT MAX, VBATT
BATT BATT
=3.5V, V =3.0V, V
=3.5V
RAMP RAMP
=2.1V =2.1V
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini-
mum drive level Output Noise Power -85 -80 dBm RBW=100kHz, 1805MHz to 1880MHz,
< 32dBm
P
OUT
Forward Isolation 1 -40 -30 dBm TXEnable=Low, P Forward Isolation 2 -25 -10 dBm TXEnable=High, V
=+5dBm
P
IN
Second Harmonic -15 -10 dBm V Third Harmonic -30 -15 dBm V All Other
-36 dBm V
Non-Harmonic Spurious
=0.26V to V
RAMP
=0.26V to V
RAMP
=0.26V to 2.1V
RAMP
=+5dBm
IN
=0.26V,
RAMP
RAMP_RP RAMP_RP
Input Impedance 50 Ω Input VSWR 2.5:1 Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<32dBm into 50Ω
OUT
load Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<32dBm into 50Ω
OUT
load. No damage or permanent degradation
to part. Output Load Impedance 50 Ω Load impedance presented at RF OUT pad
Power Control V
Power Control Range 45 50 dB V Transient Spectrum -35 dBm V Transient Spectrum Under
Extreme Conditions
Power Degradation from
Nominal Conditions
RAMP
-23 dBm Temp=-20°C to +85°C, V
0dBm to 15dBm -4 +4 d B
15dBm to 30dBm -2 +2 dB
=0.26V to 2.1V
RAMP
RAMP=VRAMP_RP
>3.0V.
BATT
Ramping shape same as for Condition:
Temp= 25°C, V
V
RAMP=VRAMP_RP
V
=3.0V to 4.5V , Temp=-20°C to +85°C,
BATT
=0dBm to 5dBm,
P
IN
BATT
=3.5V,
Relative to output power for condition:
=3.5V, PIN=+3dBm, Temp=25°C,
V
BATT
Freq=1747.5MHz.
Output power variation measured at set
.
V
RAMP
Notes: V
RAMP_RP=VRAMP
set for 32dBm at nominal conditions.
Rev A1 051107
2-495
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Parameter
Overall (PCS Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= 25°C, V
=2. 1V, PIN=3dBm,
V
RAMP
Freq=1850MHz to 1910MHz,
BATT
=3.5V,
25% Duty Cycle, pulse width=1154μs Operating Frequency Range 1850 to 1910 MHz Maximum Output Power 1 32.0 dBm Temp=+25°C, V
Maximum Output Power 2 30.0 dBm Temp=+85°C, V Total Efficiency 46 52 % At P
OUT MAX, VBATT
BATT BATT
=3.5V, V =3.0V, V
=3.5V
RAMP RAMP
=2.1V =2.1V
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini-
mum drive level Output Noise Power -85 -80 dBm RBW=100kHz, 1930MHz to 1990MHz,
< 32dBm
P
OUT
Forward Isolation 1 -35 -30 dBm TXEnable=Low, P Forward Isolation 2 -25 -10 dBm TXEnable=High, V
=+5dBm
P
IN
Second Harmonic -15 -10 dBm V Third Harmonic -30 -15 dBm V All Other
-36 dBm V
Non-Harmonic Spurious
=0.26V to V
RAMP
=0.26V to V
RAMP
=0.26V to 2.1V
RAMP
=+5dBm
IN
=0.26V,
RAMP
RAMP_RP RAMP_RP
Input Impedance 50 Ω Input VSWR 2.5:1 Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<32dBm into 50Ω
OUT
load Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<32dBm into 50Ω
OUT
load. No damage or permanent degradation
to part. Output Load Impedance 50 Ω Load impedance presented at RF OUT pad
Power Control V
Power Control Range 45 50 dB V Transient Spectrum -35 dBm V Transient Spectrum Under
Extreme Conditions
Power Degradation from
Nominal Conditions
RAMP
-23 dBm Temp=-20°C to +85°C, V
0dBm to 15dBm -4 +4 d B
15dBm to 30dBm -2 +2 dB
=0.26V to 2.1V
RAMP
RAMP=VRAMP_RP
>3.0V.
BATT
Ramping shape same as for Condition:
Temp= 25°C, V
V
RAMP=VRAMP_RP
V
=3.0V to 4.5V, T emp=-20°C to +85°C ,
BATT
=0dBm to 5dBm,
P
IN
BATT
=3.5V,
Relative to output power for condition:
=3.5V, PIN=+3dBm, Temp=25°C,
V
BATT
Freq=1880MHz.
Output power variation measured at set
.
V
RAMP
Notes: V
RAMP_RP=VRAMP
set for 32dBm at nominal conditions.
2-496
Rev A1 051107
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Pin Function Description Interface Schematic
1 DCS/PCS IN 2 BAND
SELECT
RF input to the DCS band. This is a 50Ω input. Allows external control to select the GSM or DCS band with a logic high
or low . A logic lo w enab les the GSM band whereas a logic hi gh enab les the DCS band.
BAND SEL
TX EN
GSM CTRL
DCS CTRL
3 TX ENABLE
4VBATT 5GND 6 VRAMP
7 GSM IN 8GSM OUT
9 DCS/PCS
OUT
Pkg
GND
Base
This signal enables the PA module for operation with a logic high.
Power supply for the module. This should be connected to the battery.
Ramping signal from DAC. A 300kHz lowpass filter is integrated into the CMOS. No external filtering is required.
RF input to the GSM band. This is a 50Ω input. RF output for the GSM band. This is a 50Ω output. The output load line
matching is contained internal to the package. RF output for the DCS band. This is a 50Ω output. The output load line
matching is contained internal to the package.
TX EN
VRAMP
VBATT
TX ON
300 kHz
Rev A1 051107
2-497
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Pin Out
Top Down View
DCS/PCS
RFIN
BAND SELECT
TX ENABLE
VBATT
GND
VRAMP
GSM
RF IN
DCS/PCS
91
RFOUT
2
3
4
5
6
GSM
7
8
RFOUT
2-498
Rev A1 051107
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Application Schematic
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RF3166
DCS/PCS IN
BAND SELECT
TX ENABLE
VBATT
VRAMP
GSM IN
DCS/PCS IN
BAND SELECT
TX ENABLE
50 Ωμstrip
50 Ωμstrip
50 Ω μstrip
91 2 3 4 5 6
87
Evaluation Board Schematic
P1
GND
1
CON1
91 2 3
50 Ωμstrip
50 Ωμstrip
P2-1
50 Ω μstrip
P2
1
CON1
DCS/PCS OUT
GSM OUT
VCC
DCS/PCS OUT
VBATT
22 μF*
VRAMP
50 Ω μstrip
GSM IN
Notes:
4 5 6
50 Ω μstrip
87
* The value of the VBATT decoupling capacitor depends on the noise level of the phone board.
Capacitor type may be either tantalum or ceramic. Some applications may not require this capacitor.
1. All the PA output measurements are referenced to the PA output pad (pins 8 and 9).
2. The 50 Ω μstrip between the PA output pad and the SMA connector has an approximate insertion loss of 0.1 dB for GSM850/EGSM900 and 0.2 dB for DCS1800/PCS1900 bands.
GSM OUT
Rev A1 051107
2-499
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Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.032”, Board Material FR-4, Multi-Layer
2-500
Rev A1 051107
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Theory of Operation
Overview
The RF3166 is a quad-band GSM850, EGSM900, DCS1800, and PCS1900 power amplifier module that incorporates an indirect closed loop method of power control. This simplifies th e phone design by eliminating the need for the compli­cated control loop design. The indi rect close d loop appea rs as an op en loop to the user and can be d riven direct ly from the DAC output in the baseband circuit.
Theory of Operation
The indirect closed loop is essentially a closed loop method of power control that is invisible to the user. Most power con­trol systems in GSM sense either forward power or collector/drain current. The RF3166 does not use a power detector . A high-speed control loop is incorporated to regulate the collector voltage of the amplifier while the stage are held at a con­stant bias. The V
the multiplied V
signal is multiplied by a factor of 2.3 and the collector voltage for all three stages is regulated to
RAMP
voltage. The basic circuit is shown in the following diagram.
RAMP
V
BATT
V
RAMP
3 dB BW
300 kHz
-
+
TX ENABLE
-
+
H(s)
RF IN RF OUT
Saturation
Detector
By regulating the power, the stages are held in saturation across all power levels. As the required output power is decreased from full power down to 0 dBm, the collector voltage is also decreased. This regulation of output power is demonstrated in Equation 1 where the relationship between collector voltage and output power is shown. Although load impedance affects output power, supply fluctuations are the dominate mode of power variations. With the RF3166 regu­lating collector voltage, the dominant mode of power fluctuations is eliminated.
10
2
3–
(Eq. 1)
P
dBm
10
2 V
CCVSAT
-------------------------------------------
log=
8 R
⋅⋅
LOAD
()
There are several key factors to consider in the implementation of a transmitter solution for a mobile phone. Some of them are:
• Current draw and system efficiency
• Power variation due to Supply Voltage
• Power variation due to frequency
• Power variation due to temperature
• Input impedance variation
• Noise power
• Loop stability
• Loop bandwidth variations across power levels
• Burst timing and transient spectrum trade offs
• Harmonics
Rev A1 051107
2-501
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Output power does not vary due to supply voltage under normal operating conditions if V V
. By regulating the collector voltage to the PA the voltage sensitivity is essentially eliminated. This covers most
BATT
cases where the PA will be operated. However, as the battery discharges and approaches its lower power range the maximum output power from the PA will also drop slightly. In this case it is important to also decrease V
the power control from inducing switching transients. These transients occur as a result of the control loop slowing down and not regulating power in accordance with V
The switching transients due to low battery conditions are regulated by the V cuit consists of a feedback loop that detects FET saturation. As the FET approaches saturation, the limiter adjusts the
voltage in order to ensure minimum switching transients. The V
V
RAMP
controller and requires no additional input from the user. Due to reactive output matches, there are output power variations across frequency. There are a number of components
that can make the effects greater or less. Power variation straight out of the RF3166 is shown in the tables below. The components follo wing the po w er amplifier ofte n ha v e insertion loss variation with respect to fr equency. Usually, there
is some length of microstrip that follows the power amplifier. There is also a frequency response found in directional cou­plers due to variation in the coupling factor over frequency, as well as the sensitivity of the detect or diode. Since the RF3166 does not use a directional coupler with a diode detec to r, these variations do not occur.
Input impedance variation is found in most GSM power amplifiers. This is due to a device phenomena where C C
(CGS and CSG for a FET) vary over the bias voltage. The same principle used to make varactors is present in the
CB
power amplifiers. The junction capacitance is a function of the bias across the junction. This produces input impedance variations as the Vapc voltage is swept. Although this could present a problem with frequency pulling the transmit VCO off frequency, most synthesizer designers use very wide loop bandwi dths to quickly compensate for freque ncy variations due to the load variations presented to the VCO.
RAMP
.
tracking circuit. The V
BATT
tracking circuit is integrated into the CMOS
BATT
is sufficiently lower than
RAMP
RAMP
tracking cir-
BATT
to prevent
and
BE
The RF3166 presents a very cons tant load to the VCO. This is because all stages of the RF3166 are run at constant bias. As a result, there is constant reacta nce at the base emitter and base collector junction of the input stage to the power amplifier.
Noise power in PA's where output power is controlled b y c hanging t he bias v oltag e is often a prob lem when bac king off of output power. The reason is that the gain is changed in all stages and according to the noise formula (Equation 2),
F21
F
TOT
the noise figure depends on noise factor and gain in all stage s. Because the bias point of the RF3166 is kept constant the gain in the first stage is always high and the overall noise power is not increased when decreasing output power.
Power control loop stability often presents many challenges to transmitter design. Designing a proper power control loop involves trade-offs affecting stability, transient spectrum and burst timing.
In conventional architectures the PA gain (dB/ V) varies across different power levels, and as a result the loop bandwidth also varies. With some power amplifiers it is possible for the PA gain (c ontrol slope) to chang e from 100dB/V to as high as 1000dB/V. The challenge in this scenario is keeping the loop bandwidth wide enough to meet the burst mask at low slope regions which often causes instability at high slope regions.
The RF3166 loop bandwidth is determine d by internal bandwidth and the RF output load and does not change with respect to power levels. This makes it easier to maintain loop stability with a high bandwidth loop since the bias voltage and collector voltage do not vary.
F1
--------------- -
++=
G1
F31
------------------­G1 G2
(Eq. 2)
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An often overlooked problem in PA control loops is that a delay not only decreases loop stability it also affects the burst timing when, for instance the input power from the VCO decreases (or increase s) with resp ect to tempe rature or supply voltage. The burst timing then appears to shift to the right especially at low power levels. The RF3166 is insensitive to a change in input power and the burst timing is constant and requires no software compensation.
Switching transients occur when the up and down ramp of the burst is not smooth enough or suddenly changes shape. If the control slope of a PA has an inflection point within the output power range or if the slope is simply too steep it is diffi­cult to prevent sw itching transients. Controlling the output power by changing the collector voltage is as earlier described based on the physical relationship between voltage swing and output power. Further mo re all stages are kept constantly biased so inflection points are nonexistent.
Harmonics are natural produ cts of high efficiency power amplifier design. An ideal class “E” saturated power amplifier will produce a perfect square wave. Looking at the Fourier transform of a square wave reveals high harmonic content. Although this is common to all power amplifiers, there are other factors that contribute to conducted harmonic content as well. With most power control methods a peak power diode detector is used to rectify and sense forward power. Through the rectification process there is additional squaring of the waveform resulting in higher harmonics. The RF3166 address this by eliminating the need for the detector diode. Therefore the harmonics coming out of the PA sho uld represent the maximum power of the harmonics throughout the transmit chain. This is based up on pro per ha rmonic termination of the transmit port. The receive port termination on the T/R switch as well as the harmonic impedance from the switch itself will have an impact on harmonics. Should a problem arise, these terminations should be explored.
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PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD’s qualification process is electroless nickel, immersion gold. Typical thickness is 3μinch to 8μinch gold over 180μinch nickel.
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
PCB Metal Land Pattern
A = 0.40 Sq. Typ. B = 0.80 x 0.40 Typ. C = 0.40 x 0.80
A = 0.55 x 0.95 B = 0.55 Sq. Typ. C = 0.95 x 0.55 Typ. D = 1.80 x 4.62
5.20
4.10
3.30
2.50
1.80
1.40
0.80
0.00
0.37
0.93
Pin 1
C
A A
B
A A A
0.00
0.50
Metal Land Pattern
5.60
5.20
4.47
B
4.90
5.40
Dimensions in mm.
5.60
5.40
4.90
0.60
0.20
5.20 TYP
4.10
3.30
2.50
1.60
0.80
0.00
E = 0.60 Sq. Typ.
Pin 1
A
B B
B B B
C
0.00
D
Solder Mask Pattern
1.95
E E E E E E E E
3.40
E E E E E E E
4.25
C
5.40
B
4.62
B
3.85
B
3.07
2.76
B
2.30
B
1.52
B
0.75
B
5.40
Figure 1. PCB Metal Land and Solder Mask Patterns (Top View)
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2 mil to 3 mil expansion to accommodate solder mask regist ration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create s older mask clearance can be provided in the master data or requested from the PCB fabrication supplier.
Thermal Pad and Via Design
Thermal vias are required in the PCB layout to effectively conduct heat away from the package. The via pattern has been designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a 0.5 mm to 1.2mm grid patter n with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
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