Page 1
查询RF3164供应商
RF3164
0
Typical Applications
• 3V CDMA US-PCS Handset
• 3V CDMA2000/1XRTT US-PCS Handset
Product Description
The RF3164 is a high-power, high-efficiency linear amplifier module specifically designed for 3V handheld systems. The device is manufactured on an advanced third
generation GaAs HBT process, and was designed for use
as the final RF amplifier in 3V IS-95/CDMA 2000 1X
handheld digital cellular equipment, spread-spectrum
systems, and other applications in the 1850MHz to
1910MHz band. The RF3164 has a digital control line for
low power applications to lower quiescent current. The
RF3164 is assembled in at 16-pin, 3mmx3mm, QFN
package.
3V 1900MHz LINEAR POWER
AMPLIFIER MODULE
• 3V CDMA2000/1X-EV-DO US-PCS
Handset
• Spread-Spectrum System
0.10 C
0.10 C
0.10 C 0.10 C
+0.10
1.45
-0.15
0.50 TYP.
+0.10
1.45
-0.15
0.30
TYP.
0.18
0.10 C ABM
3.00
Shaded areas represen t pin 1.
-A-
-B-
3.00
Dimensions in mm.
0.50
0.30
TYP.
0.10 C
1.00
0.80
0.08 C
-C-
SCALE:
NONE
0.05
0.00
SEATING
PLANE
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
InGaP/HBT
RF IN
GND
VMODE
VREG
9
SiGe HBT
GaN HEMT SiGe Bi-CMOS
VCC1
16 15 14 13
1
2
3
Bias
4
NC
IM
NC
IM
NC
Si CMOS
NC
8765
NC
12
11
10
9
VCC2
VCC2
VCC2
RF OUT
Functional Block Diagram
Package Style: QFN, 16-Pin, 3x3
Features
• Input Internally Matched@50Ω
• Output Internally Matched
• 28dBm Linear Output Power
• 40% Peak Linear Efficiency
• 28dB Linear Gain
• -50dBc ACPR @ 1.25MHz
Ordering Information
RF3164 3V 1900MHz Linear Power Amplifier Module
RF3164 PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A2 050112
2-1
Page 2
RF3164
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage (RF off) +8.0 V
Supply Voltage (P
Control Voltage (V
Input RF Power +10 dBm
Mode Voltage (V
Operating Temperature -30 to +110 °C
Storage Temperature -40 to +150 °C
Moisture Sensitivity Level
IPC/JEDEC J-STD-20
≤31dBm) +5.2 V
OUT
)+3.9V
REG
)+3.9V
MODE
MSL 2 @260 °C
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products witho ut notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Parameter
High Gain Mode (V
MODE
Min. Typ. Max.
Low)
Operating Frequency Range 1850 1910 MHz
Linear Gain 26 28 dB
Second Harmonics -35 dBc
Third Harmonics -40 dBc
Maximum Linear Output 28 dBm
Linear Efficiency 37 40 %
Maximum I
ACPR @ 1.25MHz -50.0 -46.0 dBc
ACPR @ 1.98MHz -55.5 -53.0 dBc
ACPR @ 2.25MHz -59.0 -56.0 dBc
Input VSWR 2:1
Output VSWR Stability 6:1 No oscillation>-70dBc
Noise Power -138 dBm/Hz At 80MHz offset.
Low Gain Mode (V
460 502 mA
CC
MODE
High)
Operating Frequency Range 1850 1910 MHz
Linear Gain 26 28 dB
Second Harmonics -35 dBc
Third Harmonics -40 dBc
Maximum Linear Output 28 dBm
Linear Efficiency 37 40 %
ACPR @1.25MHz -50 -46 dBc
ACPR @ 1.98MHz -55 -53 dBc
ACPR @2.25MHz -58 -56 dBc
Maximum I
Linear Gain 26 dB P
Input VSWR 2:1
Output VSWR Stability 6:1 No oscillation>-70dBc
CC
Specification
10:1 No damage
130 156 mA P
10:1 No damage
Unit Condition
T=25oC Ambient, VCC=3.4V, V
=0V, and P
V
MODE
parameters (unless otherw ise specified).
T=25oC Ambient, VCC=3.4V, V
=2.8V, and P
V
MODE
parameters (unless otherw ise specified).
=16dBm
OUT
=16dBm
OUT
OUT
=28dBm for all
OUT
REG
REG
=28dBm for all
=2.8V,
=2.8V,
2-2
Rev A2 050112
Page 3
RF3164
Parameter
Min. Typ. Max.
Specification
Unit Condition
Power Supply
Supply Voltage 3.2 3.4 4.2 V
High Gain Idle Current 65 95 mA V
Low Gain Idle Current 55 85 mA V
V
Current 1 2 mA
REG
Current 250 1000 uA
V
MODE
RF Turn On/Off Time 1.2 6 uS
DC Turn On/Off Time 2 40 uS
Total Current (Power Down) 0.2 2.0 uA
Low Voltage (Power Down) 0 0.5 V
V
REG
V
High Voltage (Recom-
REG
mended)
V
High Voltage (Operational) 2.7 3.0 V
REG
V
V oltage 0 0.5 V High Gain Mode
MODE
Voltage 2.0 3.0 V Low Gain Mode
V
MODE
2.75 2.8 2.95 V
MODE
MODE
=low and V
=high and V
REG
REG
=2.8V
=2.8V
Rev A2 050112
2-3
Page 4
RF3164
Pin Function Description Interface Schematic
1RF IN
2GND
3VMODE
4VREG
5NC
6NC
7NC
8NC
9RF OUT
10 VCC2
11 VCC2
12 VCC2
13 NC
14 IM
15 IM
16 VCC1
Pkg
GND
Base
RF input internally matched to 50Ω. This input is internally AC-coupled.
Ground connection.
For nominal operation (High Power mode), V
set HIGH, devices are biased lower to improve efficiency.
Regulated voltage supply for amplifier bias circuit. In power down
mode, both V
No connection. Do not connect this pin to any external circuit.
No connection. Do not connect this pin to any external circuit.
No connection. Do not connect this pin to any external circuit.
No connection. Do not connect this pin to any external circuit.
RF output. Internally AC-coupled.
Output stage collector supply. Please see the schematic for required
external components.
Same as pin 10.
Same as pin 10.
No connection. Do not connect this pin to any external circuit.
Interstage matching. Connect to pin 15.
Interstage matching. Connect to pin 14.
First stage collector supply. A 4.7µF decoupling capacitor is required.
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground
plane.
REG
and V
need to be LOW (<0.5V ).
MODE
is set LOW. When
MODE
2-4
Rev A2 050112
Page 5
Application Schematic
Output Power Requirements of 28dBm
V
L2
CC
RF3164
10 nF
16 15 14 13
RF IN
VMODE
1 nF
VREG
1 nF
L1 = 1.5nH is recommended, but any value between 1.2nH to 2.2nH may be used.
L2 = 6.8nH is recommended, but any value between 4.7nH to 8.2nH may be used.
L2 may not be needed if Pin 16 is not routed directly to Pins 10, 11, and 12.
1
2
3
Bias
4
12
11
10
9
RF OUT
8765
Application Schematic
Output Power Requirements of 28.5dBm
L2
10 µF
L1
V
Place these components
next to RF3164 with
minimal trace length
1 nF
between components.
CC
Rev A2 050112
10 nF
16 15 14 13
RF IN
VMODE
1 nF
VREG
1 nF
L1 = 3.3nH is recommended, but any value between 2.2nH to 3.9nH may be used.
L2 = 6.8nH is recommended, but any value between 4.7nH to 8.2nH may be used.
L2 may not be needed if Pin 16 is not routed directly to Pins 10, 11, and 12.
1
2
3
Bias
4
12
11
10
9
RF OUT
8765
10 µF
L1
Place these components
next to RF3164 with
minimal trace length
1 nF
between components.
2-5
Page 6
RF3164
Evaluation Board Schematic
VCC1
J1
RF IN
VMODE
VREG
50 Ω µstrip
C20
4.7 µF
C40
4.7 µF
C30
4.7 µF
1
2
3
4
C2
1 nF
P1
P1-1 VMODE
P1-2 VREG
CON5
R1
0 Ω
16 15 14 13
Bias
1
2
GND
3
GND
4
GND
5
L2
DNI
12
11
10
9
8765
P2
P2-1 VCC2
P2-3
1
2
3
4
5
CON5
GND
VCC1
GND
GND
L1
1.2 nH
C1
1 nF
50 Ω µstrip
VCC2
C10
22 µF
J2
RF OUT
2-6
Rev A2 050112
Page 7
RF3164
Electrostatic Discharge Sensitivity
Human Body Model (HBM)
Figure 3 shows the HBM ESD sensitivity level for each pin to ground. The ESD test is in compliance with JESD22-A114.
2000 V IM
2000 V IM
2000 V VCC1
16 15 14 13
>2000 V NC
2000 V VCC2
122000 V RF IN
2000 V VCC2
11
750 V VCC2
10
9
900 V RF OUT
GND
1500 V VMODE
2000 VREG
1
2
3
4
8765
750 V NC
>2000 V NC
750 V NC
>2000 V NC
Figure 3. ESD Level - Human Body Model
Machine Model (MM)
Figure 4 shows the MM ESD sensitivity level for each pin to ground. The ESD test is in compliance with JESD22-A115.
>100 V IM
200 V VCC1
16 15 14 13
1
200 V IM
>300 V NC
12300 V RF IN
250 V VCC2
100 V VMODE
250 V VREG
Figure 4. ESD Level - Machine Model
Rev A2 050112
GND
2
3
4
8765
200 V NC
>300 V NC
200 V NC
>300 V NC
250 V VCC2
11
150 V VCC2
10
9
50 V RF OUT
2-7
Page 8
RF3164
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is
3µinch to 8µinch gold over 180µinch nickel.
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and
tested for optimized assembly at RFMD; however, it may require some modifications to address company specific
assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
PCB Metal Land Pattern
A = 0.64 x 0.28 (mm) Typ.
B = 0.28 x 0.64 (mm) Typ.
C = 0.78 x 0.64 (mm)
D = 0.64 x 1.28 (mm)
E = 1.50 (mm) Sq.
Dimensions in mm.
1.50 Typ.
0.75 Typ.
Pin 16
BB C
Pin 1
0.50 Typ.
0.55 Typ.
0.55 Typ.
A
A
A
A
E
0.75 Typ.
D
0.75
1.00 Typ.
Typ.
A
BBBB
Pin 8
Figure 1. PCB Metal Land Pattern (Top View)
2-8
Rev A2 050112
Page 9
RF3164
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the
PCB metal land pattern with a 2 mil to 3 mil expansion to accommodate solder mask registration clearance a round all
pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create s older mask
clearance can be provided in the master data or requested from the PCB fabrication supplier.
A = 0.74 x 0.38 (mm) Typ.
B = 0.38 x 0.74 (mm) Typ.
C = 1.60 (mm) Sq.
Dimensions in mm.
1.50 Typ.
0.50 Typ.
Pin 16
BBBB
Pin 1
0.50 Typ.
0.55 Typ.
0.55 Typ.
A
A
A
C
A
0.75 Typ.
Pin 12
A
A
A
0.75
Typ.
1.50 Typ.
A
BBBB
Pin 8
Figure 2. PCB Solder Mask Pattern (Top View)
Thermal Pad and Via Design
The PCB land pattern has been designe d with a thermal pad that matches the die paddle size on the bottom of the
device.
Thermal vias are required in the PCB layout to effectively conduct heat away from the pac kage. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating
routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size
on a 0.5 mm to 1.2mm grid patter n with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested
that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
Rev A2 050112
2-9
Page 10
RF3164
2-10
Rev A2 050112
Loading...