Page 1
查询RF3146供应商
Preliminary
0
Typical Applications
• 3V Quad-Band GSM Handsets
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
Product Description
The RF3146 is a high-power, high-efficiency power amplifier module with integrated power control. The device is a
self-contained 7mmx7mmx0.9mm lead frame module
(LFM) with 50Ω input and output terminals. The power
control function is also incorporated, eliminating the need
for directional couplers, detector diodes, power control
ASICs and other power control circuitry; this allows the
module to be driven directly from the DAC output. The
device is designed for use as the final RF amplifier in
GSM850, EGSM900, DCS and PCS handheld digital cellular equipment and other applications in the 824 MHz to
849MHz, 880MHz to 915MHz, 1710MHz to 1785MHz
and 1850 MHz to 1910MHz bands. On-board power control provides over 50d B of control range with an analog
voltage input; and, power down with a logic “low” for
standby operation.
RF3146
QUAD-BAND GSM850/GSM900/DCS/PCS
POWER AMP MODULE
• GSM850/EGSM900/DCS/PCS Products
• GPRS Class 12 Compatible
• Power Star
TM
-A-
2 PLCS
0.10 C B
2 PLCS
0.10 C A
Shaded lead is pin 1.
Module
7.00 TYP
6.75 TYP
Dimensions in mm.
0.60
TYP
0.24
0.60
TYP
0.24
0.30
0.50
TYP
0.30
0.10 C A
2 PLCS
2 PLCS
3.37 TYP
3.50 TYP
0.10 C B
-B-
0.30
0.18
5.25
4.95
0.10 C ABM
0.50
0.08 C
0.70
0.65
2.20
1.90
0.90
0.85
0.05
0.00
SEATING
-C-
PLANE
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
InGaP/HBT
DCS/PCS IN DCS/PCS OUT
BAND SELECT
TX ENABLE
VBATT
VBATT
VRAMP
GSM IN GSM OUT
9
37
40
41
Fully Integrated
42
Power Control Circuit
43
45
48
SiGe HBT
9
Si CMOS
GaN HEMT SiGe Bi-CMOS
31
6
Functional Block Diagram
Package Style: LFM, 48-Pin, 7mm x7 mm x0.9mm
Features
• Integrated V
REG
• Complete Power Control Solution
• +35dBm GSM Output Power at 3.5V
• +33dBm DCS/PCS Output Power at 3.5V
• 60% GSM and 55% DCS/PCS
EFF
• 7mmx7mmx0.9mm Package Size
Ordering Information
RF3146 Quad-Band GSM850/GSM900/DCS/PCS Power
RF3146 SB Power Amp Module 5-Piece Sample Pack
RF3146 PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Amp Module
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A7 040812 W3
2-491
Page 2
RF3146
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.3 to +6.0 V
Power Control Voltage (V
Input RF Power +10 dBm
Max Duty Cycle 50 %
Output Load VSWR 10:1
Operating Case Temperature -20 to +85 °C
Storage Temperature -55 to +150 °C
) -0.3 to +1.8 V
RAMP
DC
Preliminary
Caution! ESD sensitive device.
RF Micro Devices belie ves t he furnished inf ormation is correct and accur ate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Parameter
Min. Typ. Max.
Specification
Unit Condition
Overall Power Control
V
Power Control “ON” 1.5 V Max. P
Power Control “OFF” 0.2 0.25 V Min. P
V
V
Turn On/Off Time 2 µsV
TX Enable “ON” 1.9 V
TX Enable “OFF” 0.5 V
GSM Band Enable 0.5 V
DCS/PCS Band Enable 1.9 V
RAMP
Input Capacitance 15 20 pF DC to 2MHz
RAMP
Input Current 10 µAV
RAMP
RAMP
RAMP
, Voltage supplied to the input
OUT
, Voltage supplied to the input
OUT
=V
RAMP MAX
=0.2V to V
Overall Power Supply
Power Supply Voltage 3.5 V Specifications
V Nominal operating limits
Powe r Supply Current 1 µAP
mA V
<-30dBm, TX Enable=Low,
IN
Temp=-20°C to +85°C
=0.2V, TX Enable=High
RAMP
Overall Control Signals
Band Select “Low” 0 0 0.5 V
Band Select “High” 1.9 2.0 3.0 V
Band Select “High” Current 20 50 µA
TX Enable “Low” 0 0 0.5 V
TX Enable “High” 1.9 2.0 3.0 V
TX Enable “High” Current 1 2 µA
RAMP MAX
2-492
Rev A7 040812 W3
Page 3
Preliminary
RF3146
Parameter
Overall (GSM850 Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= +25 °C, V
=V
V
RAMP
RAMP MAX
Freq=824MHz to 849MHz,
=3.5V,
BATT
, PIN=3dBm,
25% Duty Cycle, Pulse Width=1154µs
Operating Frequency Range 824 to 849 MHz
, V
BATT
BATT
BATT
=3.5V,
=3.0V,
=3.5V
Maximum Output Power +34.2 dBm Temp = 25°C, V
=V
V
RAMP
RAMP MAX
+32.0 dBm Temp=+85°C, V
=V
V
RAMP
Total Efficiency 47 55 % At P
RAMP MAX
OUT MAX
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini -
mum drive level
Output Noise Power -88 -81 dBm RBW=100kHz, 869MHz to 894MHz,
> +5dBm
P
OUT
Forward Isolation 1 -50 -35 dBm TXEnable=Low, P
Forward Isolation 2 -35 -15 dBm TXEnable=High, P
Cross Band Isolation at 2f
-18 dBm V
0
Second Harmonic -15 -7 dBm V
Third Harmonic -25 -15 dBm V
All Other
-36 dBm V
Non-Harmonic Spurious
RAMP
RAMP
RAMP
RAMP
=0.2V to V
=0.2V to V
=0.2V to V
=0.2V to V
=+5dBm
IN
=+5dBm, V
IN
RAMP_RP
RAMP_RP
RAMP_RP
RAMP MAX
=0.2V
RAMP
Input Impedance 50 Ω
Input VSWR 2.5:1 V
RAMP
=0.2V to V
RAMP MAX
Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load
Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance 50 Ω Load impedance presented at RF OUT pad
Power Control V
Power Control Range 55 dB V
RAMP
RAMP
=0.2V to V
RAMP MAX
Notes:
V
RAMP MAX
V
RAMP_RP=VRAMP
=0.4*V
+0.06<1.5V
BATT
set for 34.2dBm at nominal conditions.
Rev A7 040812 W3
2-493
Page 4
RF3146
Preliminary
Parameter
Overall (GSM900 Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= +25 °C, V
=V
V
RAMP
RAMP MAX
Freq=880MHz to 915MHz,
=3.5V,
BATT
, PIN=3dBm,
25% Duty Cycle, Pulse Width=1154µs
Operating Frequency Range 880 to 915 MHz
, V
BATT
BATT
BATT
=3.5V,
=3.0V,
=3.5V
Maximum Output Power +34.2 dBm Temp = 25°C, V
V
RAMP=VRAMP MAX
+32.0 dBm Temp=+85°C, V
=V
V
RAMP
Total Efficiency 54 58 % At P
RAMP MAX
OUT MAX
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini-
mum drive level
Output Noise Power -86 -80 dBm RBW=100kHz, 925MHz to 935MHz,
> +5dBm
P
OUT
-88 -84 dBm RBW=100kHz, 935MHz to 960MHz,
> +5dBm
P
OUT
Forward Isolation 1 -45 -35 dBm TXEnable=Low, P
Forward Isolation 2 -30 -15 dBm TXEnable=High, V
Cross Band Isolation 2f
-17 dBm V
0
Second Harmonic -15 -10 dBm V
Third Harmonic -25 -15 dBm V
All Other
-36 dBm V
Non-Harmonic Spurious
RAMP
RAMP
RAMP
RAMP
=0.2V to V
=0.2V to V
=0.2V to V
=0.2V to V
=+5dBm
IN
=0.2V, PIN=+5dBm
RAMP
RAMP_RP
RAMP_RP
RAMP_RP
RAMP MAX
Input Impedance 50 Ω
Input VSWR 2.5:1 V
RAMP
=0.2V to V
RAMP MAX
Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load
Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<34.2dBm into 50Ω
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance 50 Ω Load impedan ce presented at RF OUT pad
Power Control V
Power Control Range 50 dB V
RAMP
RAMP
=0.2V to V
RAMP MAX
Notes:
V
RAMP MAX
V
RAMP_RP=VRAMP
=0.4*V
+0.06<1.5V
BATT
set for 34.2dBm at nominal conditions.
2-494
Rev A7 040812 W3
Page 5
Preliminary
RF3146
Parameter
Overall (DCS Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= 25°C, V
V
RAMP=VRAMP MAX
Freq=1710MHz to 1785MHz,
=3.5V,
BATT
, PIN=3dBm,
25% Duty Cycle, pulse width=1154µs
Operating Frequency Range 1710 to 1785 MHz
Maximum Output Power +32.0 dBm Temp=25°C, V
V
RAMP =VRAMP MAX
30 dBm Temp=+85°C, V
V
RAMP=VRAMP MAX
Total Efficiency 45 52 % At P
OUT MAX, VBATT
BATT
BATT
=3.5V,
=3.0V,
=3.5V
Input Power Range 0 +3 +5 dBm Maximum output power guaranteed at mini -
mum drive level
Output Noise Power -85 -80 dBm RBW=100kHz, 1805MHz to 1880MHz,
> 0dBm, V
P
OUT
Forward Isolation 1 -50 -35 dBm TXEnable=Low, P
Forward Isolation 2 -25 -15 dBm TXEnable=High, V
Second Harmonic -15 -7 dBm V
Third Harmonic -20 -15 dBm V
All Other
-36 dBm V
Non-Harmonic Spurious
RAMP
RAMP
RAMP
=0.2V to V
=0.2V to V
=0.2V to V
=3.5V
BATT
=+5dBm
IN
RAMP
RAMP_RP
RAMP_RP
RAMP MAX
=0.2V, PIN=+5dBm
Input Impedance 50 Ω
Input VSWR 2.5:1 V
RAMP
=0.2V to V
RAMP MAX
Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<32.0dBm into 50Ω
OUT
load
Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<32.0dBm into 50Ω
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance 50 Ω Load impedance presented at RF OUT pin
Power Control V
Power Control Range 50 dB V
RAMP
RAMP
=0.2V to V
RAMP MAX
, PIN=+5dBm
Notes:
V
RAMP MAX
V
RAMP_RP=VRAMP
=0.4*V
+0.06<1.5V
BATT
set for 32.0dBm at nominal conditions.
Rev A7 040812 W3
2-495
Page 6
RF3146
Preliminary
Parameter
Overall (PCS Mode)
Min. Typ. Max.
Specification
Unit Condition
Temp= 25°C, V
=V
V
RAMP
RAMP MAX
Freq=1850MHz to 1910MHz,
=3.5V,
BATT
, PIN=3dBm,
25% Duty Cycle, pulse width=1154µs
Operating Frequency Range 1850 to 1910 MHz
Maximum Output Power +32.0 dBm Temp=25°C, V
=V
V
RAMP
RAMP MAX
30 dBm Temp=+85°C, V
=V
V
RAMP
Total Efficiency 48 55 % At P
RAMP MAX
OUT MAX, VBATT
=3.5V,
BATT
, 1850MHz to 1910MHz
=3.0V,
BATT
=3.5V
Input Power Range 0 +3 +5 dBm Full output power guaranteed at minimum
drive level
Output Noise Power -85 -80 dBm RBW=100kHz, 1930MHz to 1990MHz,
> 0dBm, V
P
OUT
Forward Isolation 1 -40 -33 dBm TX_ENABLE=Low, P
Forward Isolation 2 -20 -15 dBm TXEnable=High, V
Second Harmonic -15 -7 dBm V
Third Harmonic -20 -15 dBm V
All Other
-36 dBm V
Non-Harmonic Spurious
RAMP
RAMP
RAMP
=0.2V to V
=0.2V to V
=0.2V to V
=3.5V
BATT
=+5dBm
IN
=0.2V, PIN=+5dBm
RAMP
RAMP_RP
RAMP_RP
RAMP MAX
Input Impedance 50 Ω
Input VSWR 2.5:1 V
RAMP
=0.2V to V
RAMP MAX
Output Load VSWR Stability 8:1 Spurious<-36dBm, RBW=3MHz
Set V
RAMP
where P
<32.0dBm into 50Ω
OUT
load
Output Load VSWR Ruggedness 10:1 Set V
RAMP
where P
<32.0dBm into 50Ω
OUT
load. No damage or permanent degradation
to part.
Output Load Impedance 50 Ω Load impedan ce presented at RF OUT pin
Power Control V
Power Control Range 50 dB V
RAMP
RAMP
=0.2V to V
RAMP MAX
, PIN=+5dBm
Notes:
V
RAMP MAX
V
RAMP_RP=VRAMP
=0.4*V
+0.06<1.5V
BATT
set for 32.0dBm at nominal conditions.
2-496
Rev A7 040812 W3
Page 7
Preliminary
RF3146
Pin Function Description Interface Schematic
1NC
2VCC2 GSM
Internal circuit node. Do not externally connect.
Controlled voltage input to the GSM driver stage. This voltage is part of
the power control function for the module. This node must be connected to VCC OUT. This pin should be externally decoupled.
VCC2
3NC
4GND
5GND
6 GSM850/
GSM900
OUT
7GND
8NC
9NC
10 NC
11 NC
12 NC
13 NC
14 NC
15 NC
16 NC
17 NC
18 VCC3 GSM
Internal circuit node. Do not externally connect.
Internally connected to the package base.
Internally connected to the package base.
RF output for the GSM bands. This is a 50Ω output. The output match-
ing circuit and DC-block are internal to the package.
Internally connected to the package base.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
No internal or external connection.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Controlled voltage input to the GSM output stage. This voltage is part of
the power control function for the module. This node must be connected to VCC OUT. This pin should be externally decoupled.
VCC3
Output
Match
RF OUT
VCC3
19 VCC OUT
20 VCC OUT
21 VCC3
DCS/PCS
22 NC
23 NC
24 NC
25 NC
26 NC
27 NC
28 NC
29 NC
30 GND
Rev A7 040812 W3
Controlled voltage output to feed VCC2 and VCC3. This voltage is part
of the power control function for the module. It cannot be connected to
any pins other than VCC2 and VCC3.
Controlled voltage output to feed VCC2 and VCC3. This voltage is part
of the power control function for the module. It cannot be connected to
any pins other than VCC2 and VCC3.
Controlled voltage input to the DCS/PCS output stage. This voltag e is
part of the power control function for the module. This node must be
connected to VCC OUT. This pin should be externally decoupled.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
No internal or external connection.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internal circuit node. Do not externally connect.
Internally connected to the package base.
See pin 18.
2-497
Page 8
RF3146
Preliminary
Pin Function Description Interface Schematic
31 DCS/PCS
OUT
32 GND
33 NC
34 GND
35 VCC2
DCS/PCS
36 NC
37 DCS/PCS IN
RF output for the DCS/PCS bands. This is a 50Ω output. The output
matching circuit and DC-block are internal to the package.
Internally connected to the package base.
Internal circuit node. Do not externally connect.
Internally connected to the package base.
Controlled voltage input to the DCS/PCS driver stage. This voltage is
part of the power control function for the module. This node must be
connected to VCC OUT. This pin should be externally decoupled.
No internal connection. Connect to ground plane close to the package
pin.
RF input to the DCS/PCS band. This is a 50Ω output.
See pin 6.
See pin 2.
VCC1
RF IN
38 NC
39 VCC1
DCS/PCS
40 BAND SEL
41 TX ENABLE
42 VBATT
43 VBATT
44 NC
45 VRAMP
No internal connection. Connect to ground plane close to the package
pin.
Controlled voltage on the GSM and DCS/PCS preamplifier stages. This
voltage is applied in ternal to the package. This pin should be externally
decoupled.
Allows external control to select the GSM or DCS/PCS bands with a
logic high or low. A logic low enables the GSM bands, whereas a logic
high enables the DCS/PCS bands.
This signal enables the PA module for operation with a logic high. Both
bands are disabled with a logic low.
Power supply for the module. This pin should be externally decoupled
and connected to the battery.
Power supply for the module. This pin should be externally decoupled
and connected to the battery.
Internal circuit node. Do not externally connect.
Ramping signal from DAC. A simple RC filter may be required depend-
ing on the selected baseband.
BAND SEL
TX EN
TX EN
VCC1
GSM CTRL
DCS CTRL
VBATT
TX ON
46 VCC1 GSM
47 GND1 GSM
48 GSM850/
GSM900 IN
Pkg
GND
Base
2-498
VRAMP
Internally connected to VCC1 (pin 39). No external connection
required.
Ground connection for the GSM preamplifier stage. Connect to ground
plane close to the package pin.
RF input to the GSM band. This is a 50Ω input. See pin 37.
Connect to ground plane with multiple via holes. See recommended
footprint.
See pin 39.
+
Rev A7 040812 W3
Page 9
Preliminary
VCC2 GSM
NC
NC
RF3146
Pin Out
DCS/PCS IN
GND1 GSM
GSM850/
GSM900 IN
1
2
3
vcc1 GSM
VRAMP
NC
VBATT
VBATT
BAND SEL
TX ENABLE
VCC1
DCS/PCS
NC
373839404142434445464748
NC
36
VCC2
35
DCS/PCS
GND
34
GND
GND
GSM850/
GSM900 OUT
GND
NC
NC
NC
NC
NC
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
NC
NC
NC
NC
NC
VCC3 GSM
VCC OUT
VCC OUT
NC
VCC3
DCS/PCS
NC
33
32
31
30
29
28
27
26
25
NC
NC
GND
DCS/PCS OUT
GND
NC
NC
NC
NC
NC
Rev A7 040812 W3
2-499
Page 10
RF3146
Preliminary
Application Schematic
TX EN BAND SEL
VRAMP
GSM850/
GSM900 IN
1 nF
VBATT
15 kΩ
1
From
V
CC1
2
3
4.7 µF
V
CC1
1 nF
V
: Internally supplied.
CC1
See Pin Function note.
373839404142434445464748
36
V
CC
35
34
1 nF
DCS/PCS IN
GSM850/
GSM900 OUT
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
Fully Integrated
Power Control Circuit
100 pF
10 nF
33
32
31
30
29
28
27
26
25
DCS/PCS OUT
2-500
Rev A7 040812 W3
Page 11
Preliminary
RF3146
Evaluation Board Schematic
TX EN
GSM850/
GSM900 IN
GSM850/
GSM900 OUT
C9
1 nF
50 Ωµstrip
50 Ωµstrip
R3
100 kΩ
1
2
3
4
5
6
7
8
9
10
11
From
V
CC1
R4
100 kΩ
VRAMP
R1
15 kΩ
C2
4.7 µF
VBATT
VCC1
C6
1 nF
R2
100 kΩ
V
: Internally supplied.
CC1
See Pin Function note.
373839404142434445464748
36
V
CC
35
34
33
32
31
30
29
28
27
26
50 Ωµstrip
C4
DNP
50 Ωµstrip
BAND SEL
DCS/PCS IN
C8
1 nF
DCS/PCS OUT
12
13 14 15 16 17 18 19 20 21 22 23 24
C13
100 pF
C10
10 nF
25
Rev A7 040812 W3
2-501
Page 12
RF3146
Preliminary
Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.032”, Board Material FR-4, Multi-Layer
2-502
Rev A7 040812 W3
Page 13
Preliminary
RF3146
Theory of Operation
Overview
The RF3146 is a quad-band GSM850, EGSM900, DCS1800, and PCS1900 power amplifier module that incorporates an
indirect closed loop method of power control. This simplifies th e phone design by eliminating the need for the complicated control loop design. The indi rect close d loop appea rs as an op en loop to the user and can be d riven direct ly from
the DAC output in the baseband circuit.
Theory of Operation
The indirect closed loop is essentially a closed loop method of power control that is invisible to the user. Most power control systems in GSM sense either forward power or collector/drain current. The RF3146 does not use a power detector . A
high-speed control loop is incorporated to regulate the collector voltage of the amplifier while the stage are held at a constant bias. The V
regulated to the multiplied V
signal is multiplied by a f acto r of 2.65 an d the coll ector voltage for the second and th ird stages ar e
RAMP
voltage. The basic circuit is shown in the following diagram.
RAMP
VBATT
TX ENABLE
VRAMP
H(s)
RF IN
TX ENABLE
By regulating the power, the stages are held in saturation across all power levels. As the required output power is
decreased from full power down to 0 dBm, the collector voltage is also decreased. This regulation of output power is
demonstrated in Equation 1 where the relationship between collector voltage and output power is shown. Although load
impedance affects output power, supply fluctuations are the dominate mode of power variations. With the RF3146 regulating collector voltage, the dominant mode of power fluctuations is eliminated.
10
2
3–
2 V
P
dBm
There are several key factors to consider in the implementation of a transmitter solution for a mobile phone. Some of
them are:
• Current draw and system efficiency
• Power variation due to Supply Voltage
• Power variation due to frequency
• Power variation due to temperature
• Input impedance variation
• Noise power
• Loop stability
• Loop bandwidth variations across power levels
• Burst timing and transient spectrum trade offs
• Harmonics
10
-------------------------------------------
log⋅=
8 R
–⋅()
CCVSAT
⋅⋅
LOAD
RF OUT
(Eq. 1)
Rev A7 040812 W3
2-503
Page 14
RF3146
Preliminary
Output power does not vary due to supply voltage under normal operating conditions if V
V
. By regulating the collector voltage to the PA the voltage sensitivity is essentially eliminated. This covers most
BATT
cases where the PA will be operated. However, as the battery discharges and approaches its lower power range the
maximum output power from the PA will also drop slightly. In this case it is important to also decrease V
the power control from inducing switching transients. These transients occur as a result of the control loop slowing down
and not regulating power in accordance with V
The switching transients due to low battery conditions are regulated by incorporating the following relationship limiting
the maximum V
tery compensation required for extreme conditions is covered by the relationship in Equation 4. This should be added to
the terminal software.
V
RAMPMAX
Due to reactive output matches, there are output power variations across frequency. There are a number of components
that can make the effects greater or less. Power variation straight out of the RF3146 is shown in the tables below.
The components follo wing the po w er amplifier ofte n ha v e insertion loss variation with respect to fr equency. Usually, there
is some length of microstrip that follows the power amplifier. There is also a frequency response found in directional couplers due to variation in the coupling factor over frequency, as well as the sensitivity of the detect or diode. Since the
RF3146 does not use a directional coupler with a diode detec to r, these variations do not occur.
Input impedance variation is found in most GSM power amplifiers. This is due to a device phenomena where C
C
(CGS and CSG for a FET) vary over the bias voltage. The same principle used to make varactors is present in the
CB
power amplifiers. The junction capacitance is a function of the bias across the junction. This produces input impedance
variations as the Vapc voltage is swept. Although this could present a problem with frequency pulling the transmit VCO
off frequency, most synthesizer designers use very wide loop bandwi dths to quickly compensate for freque ncy variations
due to the load variations presented to the VCO.
voltage (Equation 2). Although no compensation is required for typical battery conditions, the bat-
RAMP
0.4 V
BATT
0.06 1.5V≤+⋅=
RAMP
.
is sufficiently lower than
RAMP
RAMP
to prevent
(Eq. 2)
and
BE
The RF3146 presents a very cons tant load to the VCO. This is because all stages of the RF3146 are run at constant
bias. As a result, there is constant reacta nce at the base emitter and base collector junction of the input stage to the
power amplifier.
Noise power in PA's where output power is controlled by changing the bias volt age is ofte n a prob lem when bac king off o f
output power. The reason is that the gain is changed in all stages and according to the noise formula (Equation 5),
F21–
--------------- -
++=
F
TOT
the noise figure depends on noise factor and gain in all stage s. Because the bias point of the RF3146 is kept constant
the gain in the first stage is always high and the overall noise power is not increased when decreasing output power.
Power control loop stability often presents many challenges to transmitter design. Designing a proper power control loop
involves trade-offs affecting stability, transient spectrum and burst timing.
In conventional architectures the PA gain (dB/ V) varies across different power levels, and as a result the loop bandwidth
also varies. With some power amplifiers it is possible for the PA gain (c ontrol slope) to chang e from 100dB/V to as high
as 1000dB/V. The challenge in this scenario is keeping the loop bandwidth wide enough to meet the burst mask at low
slope regions which often causes instability at high slope regions.
The RF3146 loop bandwidth is determine d by internal bandwidth and the RF output load and does not change with
respect to power levels. This makes it easier to maintain loop stability with a high bandwidth loop since the bias voltage
and collector voltage do not vary.
F1
G1
F31–
------------------G1 G 2⋅
(Eq. 3)
2-504
Rev A7 040812 W3
Page 15
Preliminary
RF3146
An often overlooked problem in PA control loops is that a delay not only decreases loop stability it also affects the burst
timing when, for instance the input power from the VCO decreases (or increase s) with resp ect to tempe rature or supply
voltage. The burst timing then appears to shift to the right especially at low power levels. The RF3146 is insensitive to a
change in input power and the burst timing is constant and requires no software compensation.
Switching transients occur when the up and down ramp of the burst is not smooth enough or suddenly changes shape. If
the control slope of a PA has an inflection point within the output power range or if the slope is simply too steep it is difficult to prevent sw itching transients. Controlling the output power by changing the collector voltage is as earlier described
based on the physical relationship between voltage swing and output power. Further mo re all stages are kept constantly
biased so inflection points are nonexistent.
Harmonics are natural produ cts of high efficiency power amplifier design. An ideal class “E” saturated power amplifier
will produce a perfect square wave. Looking at the Fourier transform of a square wave reveals high harmonic content.
Although this is common to all power amplifiers, there are other factors that contribute to conducted harmonic content as
well. With most power control methods a peak power diode detector is used to rectify and sense forward power. Through
the rectification process there is additional squaring of the waveform resulting in higher harmonics. The RF3146 address
this by eliminating the need for the detector diode. Therefore the harmonics coming out of the PA sho uld represent the
maximum power of the harmonics throughout the transmit chain. This is based up on pro per ha rmonic termination of the
transmit port. The receive port termination on the T/R switch as well as the harmonic impedance from the switch itself
will have an impact on harmonics. Should a problem arise, these terminations should be explored.
The RF3146 incorporates many circuits that had previously been required external to the power amplifier. The shaded
area of the diagram below illustrates those components and the following table itemizes a comparison between the
RF3146 Bill of Materials and a conventional solution.
Component Conventional
Power Control ASIC $0.80 N/A
Directional Coupler $0.20 N/A
Buffer $0.05 N/A
Attenuator $0.05 N/A
Various Passives $0.05 N/A
Mounting Yield
(other than PA)
Total $1.27 $0.00
From DAC
Solution
$0.12 N/A
RF3146
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Rev A7 040812 W3
*Shaded area eliminated with Indirect Closed Loop using RF3146
2-505
Page 16
RF3146
Preliminary
PCB Design Requirements
PCB Surface Finish
The PCB surface finish used for RFMD’s qualification process is electroless nickel, immersion gold. Typical thickness is
3µinch to 8µinch gold over 180µinch nickel.
PCB Land Pattern Recommendation
PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and
tested for optimized assembly at RFMD; however, it may require some modifications to address company specific
assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances.
PCB Metal Land Pattern
A = 0.64 x 0.28 (mm) Typ.
B = 0.28 x 0.64 (mm) Typ.
C = 5.65 (mm) Sq.
0.50 Typ.
Pin 48
Pin 1
0.50 Typ.
0.55 Typ.
0.55 Typ.
B B B B B B B B B B B B
A
A
A
A
A
A
A
A
A
A
A
A
B B B B B B B B B B B B
Figure 1. PCB Metal Land Pattern (Top View)
2.75
5.50 Typ.
C
Dimensions in mm.
Pin 36
A
A
A
2.75
A
A
A
A
A
A
A
A
A
Pin 24
5.50 Typ.
2-506
Rev A7 040812 W3
Page 17
Preliminary
RF3146
PCB Solder Mask Pattern
Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the
PCB metal land pattern with a 2 mil to 3 mil expansion to accommodate solder mask registration clearance a round all
pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create s older mask
clearance can be provided in the master data or requested from the PCB fabrication supplier.
A = 0.74 x 0.38 (mm) Typ.
B = 0.38 x 0.74 (mm) Typ.
C = 5.25 x 2.20 (mm)
0.50 Typ.
0.50 Typ.
0.55 Typ.
0.55 Typ.
Pin 1
Pin 48
5.50 Typ.
A
A
A
A
A
A
A
A
A
A
A
A
2.75
C
Dimensions in mm.
BBBBBBBBBBBB
Pin 36
A
A
A
A
A
A
A
A
A
A
A
A
BBBBBBBBBBBB
Pin 24
1.95
5.50 Typ.
Figure 2. PCB Solder Mask Pattern (Top View)
Thermal Pad and Via Design
Thermal vias are required in the PCB layout to effectively conduct heat away from the pac kage. The via pattern has been
designed to address thermal, power dissipation and electrical requirements of the device as well as accommodating
routing strategies.
The via pattern used for the RFMD qualification is based on thru-hole vias with 0.203mm to 0.330mm finished hole size
on a 0.5 mm to 1.2mm grid patter n with 0.025mm plating on via walls. If micro vias are used in a design, it is suggested
that the quantity of vias be increased by a 4:1 ratio to achieve similar results.
Rev A7 040812 W3
2-507
Page 18
RF3146
Preliminary
2-508
Rev A7 040812 W3
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