Page 1
Preliminary
RF3110
2
Typical Applications
• 3V Dual-Band GSM Handsets
• Commercial and Consumer Systems
• Portable Battery-Powered Equipment
Product Description
The RF3110 is a high-power,high-efficiencypoweramplifier module with integrated power control. The device is
self-contained with 50Ω input and output terminals. The
power control function is also incorporated, eliminating
the need for directional couplers, detector diodes, power
control ASICs and other power control circuitry; this
allows the module to be driven directly from the DAC output. The device is designed for use as the final RF amplifier in GSM/DCS and PCS handheld digital cellular
equipment and other applications in the 880MHz to
915 MHz, 1710MHz to 1785MHz and 1850MHz to
1910 MHz bands. On-board power control provides over
35 dB of control range with an analog voltage input; and,
power down with a logic “low” for standby operation.
TRIPLE- BAND GSM/DCS/PCS
POWER AMP MODULE
• GSM, E-GSM and DCS/PCS Products
• GPRS Class 10 Compatible
0.400 TYP
1.200 TYP
1.800 TYP
2.600 TYP
3.200 TYP
4.000 TYP
4.600 TYP
5.400 TYP
6.000 TYP
6.800 TYP
1.70
Pin1
10.00± 0.10
10.00 ± 0.10
1.45
0.450
±0.075
9.600 TYP
8.800 TYP
8.200 TYP
7.400 TYP
6.800 TYP
6.000 TYP
5.400 TYP
4.600 TYP
4.000 TYP
3.200 TYP
2.600 TYP
1.800 TYP
1.200 TYP
0.400 TYP
0.000
0.000
7.400 TYP
1.797
2
POWER AMPLIFIERS
8.200 TYP
8.275 TYP
8.800 TYP
9.600 TYP
Pin1
8.747
5.925
4.075
1.245
0.306
8.205
8.280
9.098 TYP
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
DCS IN
BAND SELECT
TX ENABLE
VBATT
VREG
VRAMP
GSM IN
1
2
3
4
5
6
7
ü
SiGe HBT
Si CMOS
VCC2
12
DCS OUT
11
VCC OUT
10
9
GSM OUT
8
VCC2
Functional Block Diagram
Package Style: Module
Features
• Complete Power Control Solution
• Single 2.9V to 5.5V Supply Voltage
• +35dBm GSM Output Power at 3.5V
• +33dBm DCS/PCS Output Power at 3.5V
• 55% GSM and 55% DCS/PCS
η
EFF
• 10mmx10mm Package Size
Ordering Information
RF3110 Triple-Band GSM/DCS/PCS Power Amp Module
RF3110 PCBA Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro,NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Rev A0 010921
2-261
Page 2
2
RF3110
Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.5 to +6.0 V
Power Control Voltage (V
Input RF Power +11.5 dBm
Duty Cycle at Max Power 37.5 %
Output Load VSWR 8:1
Operating Case Temperature -40 to +85 °C
Storage Temperature -55 to +150 °C
) -0.5 to +1.8 V
RAMP
DC
Preliminary
Caution! ESD sensitive device.
RF Micro Devices believesthe furnishedinformation is correctand accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Parameter
POWER AMPLIFIERS
Overall (GSM Mode)
Operating Frequency Range 880 to 915 MHz
Maximum Output Power +34.5 35.0 dBm Temp = 25°C, V
Total Efficiency 55 % At P
Input Power Range +4 +6 +8 dBm Full output power guaranteed at minimum
Output No ise Power -86 dBm RBW=100kHz, 925MHz to 935MHz,
Forward Isolation -35 -30 dBm TX_ENABLE=0V, PIN=+8dBm
Second Harmonic -15 -5 dBm
Third Harmonic -30 -15 dBm
All other Non-Harmonic Spurious -36 dBm
Input Impedance 50 Ω
Input VSWR 2.5:1 P
Output Load VSWR 8:1 Spurious<-36dBm, V
Output Load Impedance 50 Ω Load impedan ce presented at RF OUT pad
Power Control V
Power Control “ON” 1.6 V Max. P
Power Control “OFF” 0.2 0.25 V Min. P
Power Control Range 35 dB V
Input Capacitanc e 15 pF DC to 2MHz
V
RAMP
Input Current 10 µAV
V
RAMP
Turn On/Off Time 4 µSV
Note: V
RAMP
RAMP
Max=3/8*VBATT+0.18<1.6V
Min. Typ. Max.
+32.0 dBm Temp=+85°C, V
Specification
-88 dBm RBW=100kHz, 935MHz to 960MHz,
Unit Condition
Temp= +25 °C, VCC=3.5V, V
V
RAMP=VRAMP
Freq=880MHz to 915MHz, 12.5% Duty
Cycle, Pulse Width=577µs
V
RAMP=VRAMP
V
RAMP=VRAMP
OUT,MAX,VCC
drive level
> +5dBm
P
OUT
> +5dBm
P
OUT
OUT,MAX
RBW=3MHz
OUT
OUT
=0.2V to 1.6V
RAMP
=1.6V
RAMP
=0to1.6V
RAMP
Max, PIN=6dBm,
=3.5V,
CC
Max
=2.9V,
CC
Max
=3.5V
-5dB<P
OUT<POUT,MAX
, Voltage supplied to the input
, Voltage supplied to the input
RAMP
Max,
RAMP
=0.2V to 1.6V,
2-262
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Page 3
Preliminary
RF3110
Parameter
Min. Typ. Max.
Specification
Unit Condition
Overall Power Supply
Power Supply Voltage 3.5 V Specifications
2.9 5.5 V Nominal operating limits, P
Power Supply Current 2 A DC Current at P
110µAPIN<-30dBm, V
Temp=-40°C to + 85°C
V
Voltage 2.7 2.8 2.9 V
REG
V
Current 7 mA TX Enable=High
REG
10 µATXEnable=Low
Temp=25°C, VCC=3.5V, V
Overall (DSC/PCS Mode)
Operating Frequency Range 1710 to 1910 MHz
Maximum Output Power +32 +33 dBm Temp=25°C, V
31.5 dBm 1850-1910MHz
30 dBm Tem p=+85°C, V
29.5 dBm 1850MHz to 1910MHz
Total Efficiency 45 52 % At P
45 1850 -1910MHz
Input Power Range +4 +6 +8 dBm Full output power guaranteed at minimum
Output Noise Power -77 dBm RBW=100kHz, 1805MHz to 1880MHz and
Forward Isolation -37 -30 dBm TX_ENABLE=0V,P
Second Harmonic -25 -15 dBm P
Third Harmonic -30 -15 dBm
All other Non-Harmonic Spurious -36 dBm
Input Impedance 50 Ω
Input VSWR - 2.5 P+5dB<P
Output Load VSWR 8:1 Spurious<-36dBm, V
Output Load Impedance 50 Ω Load impedance presented at RF OUT pin
Power Control V
Power Control “ON” 1.6 V Max. P
Power Control “OFF” 0.2 0.25 V Min. P
Power Control Range 33 dB V
V
Input Capacitance 15 pF DC to 2MHz
RAMP
Input Current 10 µAV
V
RAMP
Turn On/Off TIme 4 µsV
Note: V
RAMP
RAMP
10 µAV
max=3/8*VBATT+0.18<1.6V
Max, PIN=6dBm, Freq=1710MHz to
1785MHz, 12.5% Duty Cycle, pulse
width=577µs
Max, 1710MHz to 1785MHz
Max, 1710MHz to 1785MHz
OUT,MAX,VCC
drive level
1930MHz to 1990MHz, P
V
=3.5V
CC
=+32.5dBm
OUT,
RBW=3MHz
OUT
OUT
=0.15V to 1.6V, PIN=+8dBm
RAMP
=1.6V
RAMP
=0V
RAMP
=0to1.6V
RAMP
OUT,MAX
=0V,
RAMP
=3.5V, V
CC
=2.9V, V
CC
=3.5V,1 710-1785MHz
=+8dBm
IN
OUT<POUT,MAX
APCDCS
, Voltage supplied to the input
, Voltage supplied t o the input
<+33dBm
OUT
RAMP=VRAMP
RAMP=VRAMP
RAMP=VRAMP
> 34.5dBm,
OUT
=0.2V to 1.5V,
2
POWER AMPLIFIERS
Rev A0 010921
2-263
Page 4
RF3110
Preliminary
2
Parameter
Overall Power Supply
Power Supply Voltage 3.5 V Specifications
Power Supply Current 1.3 A DC Current at P
V
Voltage 2.7 2.8 2. 9 V
REG
V
Current 7 mA TX Enable=High
REG
POWER AMPLIFIERS
Min. Typ. Max.
Specification
2.9 5.5 V Nominal operating limits, P
110µAPIN<-30dBm, V
10 µA TX Enable=Low
Unit Condition
OUT,MAX
RAMP
Temp=-40°C to +85°C
=0V,
OUT
<+33dBm
2-264
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Page 5
Preliminary
RF3110
Pin Function Description Interface Schematic
1 DCS IN
2BAND
SELECT
3 TX ENABLE
4VBATT
5VREG
6 VRAMP
7GSMIN
8VCC2
9GSMOUT
10 VCC OUT
11 DCS OUT
12 VCC2
Pkg
GND
RF input to the DC S band. This is a 50Ω input.
Allows external control to select the GSM or DCSbandwith a logichigh
or low.A logiclow enablesthe GSM band whereas a logic high enables
the DCS band.
This signal enables the PAm odule for operation with a logic high.Once
TX Enable is asserted the RF output level will increase to 0 dBm.
Power supply for the module. This should be connected to the battery.
Regulated voltage input for power control function. (2.8V nom)
Ramping signal from DAC. A simple RC filter may need to be con-
nected between the DAC output and the VRAMP input depending on
the baseband selected. The ramping profiles shown later in the data
sheet are recommended profiles for meeting the GSM specification for
burst timing and transient spectrum.
RF input to the GSM band. This is a 50Ω input.
Controlled voltage input to driver stage for GSM bands. This voltage is
part of the power control function for the module. This node must be
connected to V
RF output for the GSM band. This is a 50Ω output. The output load line
matching is contained internal to the package.
Controlled voltage output to feed V
power control function for the module. It can not be connected to any-
thing other than V
(i.e. decoupling capacitor).
RF output for the DCS band. This is a 50Ω output. The output load line
matching is contained internal to the package.
Controlled voltage input to DCS driver stage. This voltage is part of the
power control function for the module. This node must be connected to
out
V
CC
out.
CC
. This voltage is part of the
CC2
, nor can any component be placed on this node
CC2
Base
2
POWER AMPLIFIERS
Rev A0 010921
2-265
Page 6
RF3110
Preliminary
Pin Out
PIN #1
VCC2
2
DCS IN
BAND SELECT
TX EN
POWER AMPLIFIERS
VBATT
VREG
VRAMP
GSM IN
VCC2
10.0000
PCS OUT
VCC
GSM OUT
10.0000
2-266
Rev A0 010921
Page 7
Preliminary
RF3110
Application Schemati c
DCS/PCS IN
BAND SELECT
TX ENABLE
VBATT
VREG
VRAMP
GSM IN
** Used to filter noise and spurious from base band.
50 Ωµstrip
180 Ω
50 Ωµstrip
180 Ω
15 kΩ**
1
2
3
4
5
6
7
12
8
Evaluation Board Schemati c
(Download Bill of Materials from www.rfmd.com.)
P1
1
CON1
GND
P2-1
P2
1
CON1
VCC
50 Ωµstrip
11
DCS/PCS OUT
2
10
50 Ωµstrip
9
GSM OUT
POWER AMPLIFIERS
DCS/PCS IN
BAND SELECT
TX ENABLE
VBATT
VREG
VRAMP
GSM IN
** Used to filter noise and spurious from base band.
50 Ωµstrip
180 Ω
3.3 µF*
1nF*
50 Ωµstrip
*Not required in most applications
15 kΩ**
180 Ω
12
1
2
3
4
5
6
7
8
50 Ωµstrip
11
10
50 Ωµstrip
9
DCS/PCS OUT
GSM OUT
Rev A0 010921
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Page 8
Preliminary
RF3110
Theory of Operation
Overview
The RF3110 is a triple-band GSM/DCS/PCS power
amplifier module that incorporates an indirect closed
loop method of power control. This simplifies the
phone design by eliminating the need for the complicated control loop design. The indirect closed loop is
fully self contained and required does not require loop
optimization. It can bedriven directly from the DAC output in the baseband circuit.
Theory of Operation
The indirect closed loop is essentially a closed loop
method of power control that is invisible to the user.
Most power control systems in GSM sense either forward power or collector/drain current. The RF3110
does not use a power detector. A high-speed control
loop is incorporated to regulate the collector voltages
of the amplifier while the stages are held at a constant
bias. The V
voltages are regulated to the multiplied V
The basiccircuit is shown in the following diagram.
TX ENABLE
TX ENABLE
By regulating the power, the stages are held in saturation across all power levels. As the required output
power is decreased from full power down to 0dBm, the
collector voltage is also decreased. This regulation of
output power is demonstrated in Equation 1 where the
relationship between collector voltage and output
power is shown. Although load impedance affects output power, supply fluctuations are the dominate mode
of power variations. With the RF3110 regulating collector voltage, the dominant mode of power fluctuations is
eliminated.
P
dBm
10
signal is multiplied and the collector
RAMP
VBATT
VRAMP
H(s)
RF IN
2 V
CCVSAT
-------------------------------------------
log⋅=
8 R
⋅⋅
LOAD
–⋅()
10
RF OUT
2
3–
RAMP
voltage.
(Eq. 1)
There are several key factors to consider in the implementation of a transmitter solution for a mobile phone.
Some of them are:
• Effective efficiency (η
• Current draw and system efficiency
• Power variation due to Supply Voltage
• Power variation due to frequency
• Power variation due to temperature
• Input impedance variation
• Noise power
• Loop stability
• Loop bandwidth variations across power levels
• Burst timing and transient spectrum trade offs
• Harmonics
Talk time and power management are key concerns in
transmitter design since the power amplifier has the
highest current draw in a mobile ter minal. Considering
only the power amplifier’s efficiency does not provide a
true picture for the total system efficiency. It is important to consider effective efficiency which is represented by η
PA and antenna and is a more accurate measurement
to determine how much current will be drawn in the
application). η
ship (Equation 2):
η
EFF
Where Pn is the sum of all positive and negative RF
power, P
DC power. In dB the formula becomes (Equation 3):
=
η
EFF
. (η
EFF
EFF
is defined by the following relation-
EFF
m
PNPIN–
å
n 1=
--------------------------------
P
DC
the input power and PDCis the delivered
IN
PPAP
+
LOSS
-----------------------------10
10
------------------------------------------------ -
V
BATIBAT
)
eff
considers the loss between the
(Eq. 4)
(Eq. 3)
–
100⋅=
10
10⋅⋅
P
-------10
IN
2
POWER AMPLIFIERS
Rev A0 010921
2-268
Page 9
RF3110
Preliminary
2
Where PPAis the output power from the PA, P
insertion loss, P
the delivered DC power.
The RF3110 improves the effective efficiency by minimizing the P
coupler may introduce 0.4dB to 0.5dB loss to the transit path. To demonstrate the improvement in effective
efficiency consider the followingexample:
Conventional PA Solution:
the input power to the PA and P
IN
term in the equation. A directional
LOSS
PPA= +33 dBm
P
=+6dBm
IN
P
POWER AMPLIFIERS
LOSS
V
BAT
I
BAT
RF3110 Solution:
=-0.4dB
=3.5V
=1.1A
η
EFF
= 47.2%
PPA= +33 dBm
=+6dBm
P
IN
=0dB
P
LOSS
=3.5V
V
BAT
=1.1A
I
BAT
TheRF3110solutionimproveseffectiveefficiency5%.
Output power does not vary due to supply voltage
under normal operating conditions if V
ciently lower than V
voltage to the PA the voltage sensitivity is essentially
eliminated. This covers most cases where the PA will
be operated. However, as the battery discharges and
approaches its lower power range the maximum output
power from the PA will also drop slightly. In this case it
is important to also decrease V
power control from inducing switching transients.
These transients occur as a result of the control loop
slowing down and not regulating power in accordance
with V
RAMP
.
. By regulating the collector
BATT
η
EFF
RAMP
= 51.72%
RAMP
to prevent the
LOSS
is suffi-
the
DC
3
-- -
V
RAMP
Note: Output power is limited by battery voltage. The
relationship in Equation 4 does not limit output power.
Equation 4 limits the V
the battery voltage.
Due to reactive output matches, there are outputpower
variations across frequency. There are a number of
components that can make the effects greater or less.
The components following the power amplifier often
have inser tion loss variation with respect to frequency.
Usually, there is some length of microstrip that follows
the power amplifier. There is also a frequency
response found in directional couplers due to variation
in the coupling factor over frequency, as well as the
sensitivity of the detector diode. Since the RF3110
does not use a directional coupler with a diode detector,these variations do not occur.
Input impedance variation is found in most GSM power
amplifiers. This is due to a device phenomena where
C
and CCB(CGSand CSGfor a FET) vary over the
BE
bias voltage. The same principle used to make varactors is present in the power amplifiers. The junction
capacitance is a function of the bias across the junction. This produces input impedance variations as the
Vapc voltage is swept. Although this could present a
problem with frequency pulling the transmit VCO off
frequency, most synthesizer designers use very wide
loop bandwidths to quickly compensate for frequency
variations due to the load variations presented to the
VCO.
The RF3110 presentsa very constantload to the VCO.
This is because all stages of the RF3110 are run at
constant bias. As a result, there is constant reactance
at the base emitter and base collector junction of the
input stage to the power amplifier.
V
BATT
8
0.18+⋅≤
voltage to correspond with
RAMP
(Eq. 4)
The switching transients due to low battery conditions
are regulated by incorporating the following relationship limiting the maximum V
Although no compensation is required for typical battery conditions, the battery compensation required for
extreme conditions is covered by the relationship in
Equation 4. This should be added to the terminal software.
2-269
voltage (Equation 2).
RAMP
Rev A0 010921
Page 10
Preliminary
RF3110
Noise power in PA's where output power is controlled
by changing the bias voltage is often a problem when
backing off of output power.The reason is that the gain
is changed in all stages and according to the noise formula (Equation 5),
F21–
F
TOT
the noise figure depends on noise factor and gain in all
stages. Because the bias point of the RF3110 is kept
constant the gain in the first stage is always high and
the overall noise power is not increased when decreasing output power.
Power control loop stability often presents many challenges to transmitterdesign. Designing a proper power
control loop involves trade-offs affecting stability, transient spectrum and burst timing.
In conventional architectures the PA gain (dB/ V) varies
across different power levels, and as a result the loop
bandwidth also varies. With some power amplifiers it is
possible for the PA gain (control slope) to change from
100 dB/V to as high as 1000dB/V. The challenge in this
scenario is keepingthe loop bandwidth wide enough to
meet the burst mask at low slope regions which often
causes instability at high slope regions.
The RF3110 loop bandwidth is determined by internal
bandwidth and the RF output load and does not
change with respect to powerlevels. This makes iteasier to maintain loop stability with a high bandwidth loop
sincethe biasvoltageand collectorvoltagedo notvary.
An often overlookedproblem in PA control loops is that
a delay not only decreases loop stability it also affects
the burst timing when, for instance the input power
from the VCO decreases (or increases) with respect to
temperature or supply voltage. The burst timing then
appears to shift to the right especiallyat low power levels. The RF3110 is insensitive to a change in input
power and the burst timing is constant and requires no
software compensation.
F1
--------------- -
++=
G1
F31–
------------------G1 G2
⋅
(Eq. 5)
Harmonics are natural products of high efficiency
power amplifier design. An ideal class “E” saturated
power amplifier will produce a perfect square wave.
Looking at the Fourier transform of a square wave
reveals high harmonic content. Although this is common to all power amplifiers,there are other factors that
contribute to conductedharmonic content as well. With
most power control methods a peak power diode
detector is used to rectify and sense forward power.
Through the rectification process there is additional
squaring of the waveform resulting in higher harmonics. The RF3110 address this by eliminating the need
for the detector diode. Therefore the harmonics coming out of the PA should represent the maximum power
of the harmonics throughout the transmit chain. This is
based upon proper harmonic termination of the transmit port. The receive port termination on the T/R switch
as well as the harmonic impedance from the switch
itself will have an impact on harmonics. Should a problem arise, these terminations should be explored.
The RF3110 incorporates many circuits that had previously been required external to the power amplifier.
The shaded area of the diagram below illustrates those
components and the following table itemizes a comparison between the RF3110 Bill of Materials and a conventional solution:
Component Conventional
Power Control ASIC $0.80 N/A
Directional Coupler $0.20 N/A
Buffer $0.05 N/A
Attenuator $0.05 N/A
Various Passives $0.05 N/A
Mounting Yield
(other than PA)
Total $1.27 $0.00
Note: Output power is limited by battery voltage. The
relationship in Equation 4 does not limit output power.
Equation 4 limits V
voltage.
Solution
$0.12 N/A
to correspond with the batter y
RAMP
RF3110
2
POWER AMPLIFIERS
Switching transients occur when the up and down
ramp of the burst is not smooth enough or suddenly
changes shape. If the control slope of a PA has an
inflection point within the output power range or if the
slope is simply to steep it is difficult to prevent switching transients. Controlling the output power by changing the collector voltage is as earlier described based
on the physicalrelationship between voltage swing and
output power. Furtherm ore all stages are kept constantly biased so inflection points are nonexistent.
Rev A0 010921
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Page 11
RF3110
Preliminary
2
1
2
3
4
5
6
7
From DAC
14
13
12
11
10
9
8
POWER AMPLIFIERS
*Shaded area eliminated with Indirect Closed Loop using RF3110
2-271
Rev A0 010921
Page 12
2
RF3110
Preliminary
Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.032”, Board Material FR-4, Multi-layer
POWER AMPLIFIERS
2-272
Rev A0 010921
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