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Preliminary
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
3VREG
2RF IN
1VCC1
6 RF OUT
7 GND
5 VCC24
VMODE
RF3105
3V 900MHZ LINEAR AMPLIFIER MODULE
• 3V CDMA/AMPS Cellular Handsets • Spread-Spectrum Systems
The RF3105 is a high-power, high-efficiency linear amplifier IC targeting 3V handheld systems. The device is
manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been
designed for use as the final RF am plifier in dual-mode
3V CDMA/AMPS handheld digital cellular equipment,
spread-spectrum systems, and other applications in the
824MHz to 849MHz band. The RF3105 has a digital bias
control voltage for low current in standby mode. The
device is self-contained with 50 Ω input and output tha t is
matched to obtain optimum power, efficiency, and linearity characteristics. The module is an ultra-small
6mmx6mm land grid array with backside ground.
• Input/Output Internally Matched @ 50Ω
• Single 3V Supply
• 29dBm Linear Ou tput Power
• 28dB Linear Gain
• 35% Linear Efficiency
RF3105 3V 900MHz Linear Amplifier Module
RF3105 PCBA Fully Assembled Evaluation Board
2
Rev A1 001030
6.0 sq
0.1003.000
4.390
0.600
0.800 sq
typ
NOTE: Nominal thickness, 1.55 mm.
1.700
0.100
2.500
Dimensions in mm.
Package Style: LGM (6mmx6mm)
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Absolute Maximum Ratings
Parameter Rating Unit
Supply Voltage (RF off) +8.0 V
DC
Supply Voltage (P
OUT
≤31dBm) +4.5 V
DC
Control Voltage (V
REG
)+4.2V
DC
Input RF Power +10 dBm
Mode Voltage (V
MODE
)+3.5V
DC
Operating Ambient Temperature -30 to +85 °C
Storage Temperature -30 to +150 °C
Parameter
Specification
Unit Condition
Min. Typ. Max.
Overall
T=25°C Ambient, VCC=3.4V, V
REG
=2.75V,
V
MODE
=0, Freq=824MHz to 849MHz unless
otherwise specified
Frequency Range 824 849 MHz
Linear Gain 27 29 32.5 dB
Second Harmon ic -30 dBc
Third Harmonic -40 dBc
Maximum Linear Output Power
(CDMA Modulation)
28 29 dBm
Total Linear E fficiency 32 35 %
Adjacent Channel Power Rejec-
tion
-44 dBc ACPR @ 885kHz
-58 -56 dBc ACPR @1980kHz
Input VSWR <2:1
Output VSWR 10:1 No damage.
6:1 No oscillations.
Noise Figure 8 dB
Noise Power -89 dBm/30kHz At 45MHz offset.
FM Mode
Frequency Range 824 849 MHz
Second Harmon ic -30 dBc
Third Harmonic -40 dBc
Max CW Output Power 31.5 32 dBm
Total Efficiency (AMPS) 45 % V
CC
=3.4V, P
OUT
=31.5dBm
Large Signal Gain 27 dB
Input VSWR <2:1
Output VSWR 10:1 No damage.
6:1 No oscillations.
Power Supply
Power Supply Voltage 3.2 3.4 4.5 V
Quiescent Current 100 mA
V
REG
Current 8 mA Pin 3, V
REG
=2.75V
Turn On/Off time 40 µs
Total Current (Power down) 10 µAV
REG
=Low
V
REG
“Low” Voltage 0 0.2 V
V
REG
“High” Voltage 2.65 2.75 2.85 V
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printi ng. However, RF Micro Devices reserves the ri ght to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Preliminary
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Pin Function Description Interface Schematic
1VCC1
First stage collector supply. A low frequency decoupling capacitor (e.g.,
4.7µF) is required.
2RF IN
RF input internally matched to 50Ω. This input is internally AC coupled.
3VREG
Regulated voltage supply for amplifier bias.
4VMODE
For nominal operation, V
MODE
is set to LOW. When set HIGH: V
MODE
will increase the bias current by approximately 50%; and, large signal
gain is increased by approximately 1.5dB.
5VCC2
Output stage collector supply. A low frequency decoupling capacitor
(e.g., 4.7µF) is required.
6RF OUT
RF output internally matched to 50 Ω. This output is internally AC coupled.
7GND
Ground connection. Connect to package base ground. For best performance, keep traces physically short and connect immediately to
ground plane.
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a shor t thermal path to the ground
plane.
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Evaluation Board Schema t ic
(Download Bill of Materials from www.rfmd.com.)
3
2
1
6
7
54
50 Ω µstrip
J2
RF OUT
50 Ω µstrip
J1
RF IN
C2
4.7
µ
F
C1
4.7
µ
F
VCC1
VMODE VCC2
VREG
C3
4.7
µ
F
3105400-
Er = 4.7
H = 14 mils
t = 1 mil
V
CC
= 3.4 V
V
REG
= 2.75 V
V
MODE
= 0
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Evaluation Board Layout
Board Size 2.0” x 2.0”
Board Thickness 0.028”, Board Material FR-4, Multi-Layer
Assembly Top
Inner 1 Back
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