1
2
3
4
5
6
7
8
Offset Trim
V+
–In
+In
V–
Output
Offset Trim
NC
8-Pin DIP, SO-8
8
1
2
7
6
5
3
4
Offset
Trim
Offset
Trim
Output
V+
NC
–In
+In
V–
Case is connected to V–
TO-99
High Voltage FET-Input
OPERATIONAL AMPLIFIER
OPA445
®
FEATURES
● WIDE-POWER SUPPLY RANGE:
±10V to ±45V
● HIGH SLEW RATE: 15V/µs
● LOW INPUT BIAS CURRENT: 10pA
● STANDARD-PINOUT TO-99, DIP, AND
SURFACE-MOUNT PACKAGES
DESCRIPTION
The OPA445 is a monolithic operational amplifier
capable of operation from power supplies up to ±45V
and output currents of 15mA. It is useful in a wide
variety of applications requiring high output voltage
or large common-mode voltage swings.
The OPA445’s high slew rate provides wide powerbandwidth response, which is often required for highvoltage applications. FET input circuitry allows the
use of high-impedance feedback networks, thus mini-
mizing their output loading effects. Laser trimming of
the input circuitry yields low input offset voltage and
drift.
The OPA445 is available in standard pin-out TO-99,
DIP-8, and SO-8 surface-mount packages. It is fully
specified from –25°C to +85°C and operates from
–55°C to +125°C. A SPICE macromodel is available
for design analysis.
APPLICATIONS
● TEST EQUIPMENT
● HIGH-VOLTAGE REGULATORS
● POWER AMPLIFIERS
● DATA ACQUISITION
● SIGNAL CONDITIONING
● AUDIO
● PIEZO DRIVERS
©
1987 Burr-Brown Corporation PDS-754H Printed in U.S.A. March, 2000
OPA445
OPA445
For most current data sheet and other product
information, visit www.burr-brown.com
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
2
®
OPA445
SPECIFICATIONS
At TA = +25°C, VS = ±40V, and RL = 5kΩ, unless otherwise specified.
Boldface limits apply over the specified temperature range, T
A
= –25°C to +85°C. VS = ±40V.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
OPA445BM OPA445AP, AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage V
OS
VCM = 0, IO = 0 ±1 ±3 ±1.5 ±5mV
vs Temperature V
OS
/dT TA = –25°C to +85°C ±10 ✻ µV/°C
vs Power Supply PSRR V
S
= ±10V to ±45V 4 100 ✻✻µV/V
INPUT BIAS CURRENT
(1)
Input Bias Current I
B
VCM = 0V ±10 ±50 ✻ ±100 pA
Over Specified Temperature Range
±10 ±20 nA
Input Offset Current I
OS
VCM = 0V ±4 ±20 ✻ ±40 pA
Over Specified Temperature Range
±5 ±10 nA
NOISE
Input Voltage Noise Density, f = 1kHz
e
n
15 ✻ nV/√Hz
Current Noise Density, f = 1kHz i
n
6 ✻ fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range V
CM
VS = ±40V (V–)+5 (V+)–5 ✻✻V
Common-Mode Rejection CMRR V
CM
= –35V to +35V 80 95 ✻✻ dB
Over Specified Temperature Range
80 ✻ dB
INPUT IMPEDANCE
Differential 10
13
|| 1 ✻ Ω || pF
Common-Mode 10
14
|| 3 ✻ Ω || pF
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain A
OL
VO = –35V to +35V 100 110 ✻✻ dB
Over Specified Temperature Range
97 ✻ dB
FREQUENCY RESPONSE
Gain Bandwidth Product GBW 2 ✻ MHz
Slew Rate SR V
O
= 70Vp-p 5 15 ✻✻ V/µs
Full Power Bandwidth V
O
= 70Vp-p 23 70 ✻✻ kHz
Rise Time V
O
= ±200mV 100 ✻ ns
Overshoot G = +1, Z
L
= 5kΩ || 50pF 35 ✻ %
Total Harmonic Distortion + Noise
THD+N
f = 1kHz, VO = 3.5Vr ms, G = 1 0.0002 ✻ %
f = 1kHz, V
O
= 10Vr ms, G = 1 0.00008 ✻ %
OUTPUT
Voltage Output V
O
(V–)+5 (V+)–5 ✻✻V
Over Specified Temperature Range
(V–)+5 (V+)–5 ✻✻V
Current Output I
O
VO = ±28V ±15 ✻ mA
Output Resistance, Open Loop R
O
dc 220 ✻ Ω
Short Circuit Current I
SC
±26 ✻ mA
Capacitive Load Drive C
LOAD
See Typical Curve
(2)
✻
POWER SUPPLY
Specified Operating Range V
S
±40 ✻ V
Operating Voltage Range ±10 ±45 ✻✻V
Quiescent Current I
Q
IO = 0 ±4.2 ±4.7 ✻✻mA
TEMPERATURE RANGE
Specification Range –25 +85 ✻✻°C
Operating Range –55 +125 ✻✻°C
Storage Range –65 +125 –55 +125 °C
Thermal Resistance
θ
JA
TO-99 200 °C/W
8-Pin DIP 100 °C/W
SO-8 Surface-Mount 150 °C/W
✻ Specifications same as OPA445BM.
NOTE: (1) High-speed test at T
J
= +25°C. (2) See “Small-Signal Overshoot vs Load Capacitance” in the Typical Performance Curves section.
3
®
OPA445
ABSOLUTE MAXIMUM RATINGS
(1)
Power Supply..................................................................................... ±50V
Differential Input Voltage ................................................................... ±80V
Input Voltage Range ...................................................................|±V
S
| –3V
Storage Temperature Range: M ..................................... –65°C to +150°C
P, U................................. –55°C to +125°C
Operating Temperature Range ....................................... –55°C to +125°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short-Circuit to Ground (T
J
< +125°C) ......................... Continuous
Junction Temperature: M ................................................................. 175°C
P,U.............................................................. 150°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER RANGE MARKING NUMBER
(1)
MEDIA
OPA445AP 8-Pin DIP 006 –25°C to +85°C OPA445AP OPA445AP Rails
OPA445AU SO-8 Surface-Mount 182 –25°C to +85°C OPA445AU OPA445AU Rails
OPA445AU " " " " OPA445AU/2K5 Tape and Reel
OPA445BM 8-Pin TO-99 001 –25°C to +85°C OPA445BM OPA445BM Rails
NOTE: (1) Products followed by a slash (/) are only available in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500
pieces of “OPA445AU/2K5” will get a single 2500 piece Tape and Reel.
4
®
OPA445
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±40V, unless otherwise noted.
–75 0–50 –25 25 75 100 125
Temperature (°C)
0.01pA
100nA
10nA
1nA
100pA
10pA
1pA
0.1pA
Input Bias Current
INPUT BIAS CURRENT
vs TEMPERATURE
50
10 1k100 10k 1M 10M
Frequency (Hz)
0
140
120
100
80
60
40
20
Voltage Gain (dB)
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
100k
Gain
θ
–185
–45
–90
–135
Phase (Degrees)
GBW
–75 0–50 –25 25 75 100 125
Ambient Temperature (°C)
1.4
2.6
2.4
2.2
2.0
1.8
1.6
Gain Bandwidth (MHz)
GAIN BANDWIDTH AND SLEW RATE
vs TEMPERATURE
SR
10
16
15
14
13
12
11
50
Slew Rate (V/µs)
GBW
10 20 30 40 50
Supply Voltage (±V
S
)
1.6
2.2
2.0
1.8
Gain Bandwidth (MHz)
GAIN BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
Slew Rate (V/µs)
SR
13
19
17
15
10 20 30 40 50
Supply Voltage (±V
S
)
125
120
115
110
105
100
95
Voltage Gain (dB)
OPEN-LOOP GAIN AND SUPPLY CURRENT
vs SUPPLY VOLTAGE
Supply Current (mA)
A
VOL
3.0
4.5
4.0
3.5
I
Q
–50 –40 –30 –20 –10
–I
B
+I
B
0 1020304050
Common-Mode Voltage (V)
40
35
30
25
20
15
10
5
0
Bias Current (pA)
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
5
®
OPA445
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
10 100 1k 10k 1M 10M 100M
Frequency (Hz)
0
Power Supply Rejection (dB)
POWER SUPPLY REJECTION
vs FREQUENCY
100k
120
100
80
60
40
20
–PSRR
+PSRR
–75 0–50 –25 25 75 100 125
Ambient Temperature (°C)
90
120
110
100
Voltage Gain (dB)
OPEN-LOOP GAIN vs TEMPERATURE
50
10 100 1k 100k
Frequency (Hz)
1
100
10
Voltage Noise (nV/ Hz)
10k
INPUT VOLTAGE NOISE SPECTRAL DENSITY
10 100 1k 10k 1M 10M
Frequency (Hz)
Common-Mode Rejection (dB)
COMMON-MODE REJECTION
vs FREQUENCY
100k
100
90
80
70
60
50
40
–75 0–50 –25 25 75 100 125
Ambient Temperature (°C)
130
120
110
100
90
80
70
PSRR, CMRR (dB)
POWER SUPPLY REJECTION AND
COMMON-MODE REJECTION vs TEMPERATURE
50
PSRR
CMRR
20 100 1k 20k
Frequency (Hz)
0.1
0.01
0.001
0.0001
0.00001
THD+Noise (%)
10k
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
VO = 3.5Vrms
VO = 10Vrms
VO = 3.5Vrms
VO = 10Vrms
G = 10
G = 1
6
®
OPA445
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
–75 0–50 –25 25 75 100 125
Ambient Temperature (°C)
SUPPLY CURRENT vs TEMPERATURE
50
2
5
4
3
Supply Current (mA)
–50 –25 0 25 75 100 125
Temperature (°C)
0
35
30
25
20
15
10
5
Output Current (mA)
OUTPUT CURRENT vs TEMPERATURE
50
Output Current
VO = ±35V
Short-Circuit Current
–50 –25 0 25 75 100 125
Temperature (°C)
0
Dissipation (W)
MAXIMUM POWER DISSIPATION vs TEMPERATURE
50
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Plastic DIP
No Heat Sink
TJ (max)
TO-99: 150°C
DIP, SO: 125°C
TO-99
SO-8
OUTPUT VOLTAGE SWING vs TEMPERATURE
(V+)
(V+) –1
(V+) –2
(V+) –3
(V+) –4
(V–) +4
(V–) +3
(V–) +2
(V–) +1
(V–)
–75 –50 –25 0 25 50 12575 100
Temperature (°C)
Output Voltage Swing (V)
Positive Swing
Negative Swing
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY
100k
Frequency (Hz)
1k 10k 1M
90
80
70
60
50
40
30
20
10
Output Voltage (Vp-p)
0
Maximum output
without slew-rate
induced distortion.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+)
(V+) –2
(V+) –4
(V+) –6
(V+) –8
(V+) –10
(V–) +10
(V–) +8
(V–) +6
(V–) +4
(V–) +2
(V–)
0 ±5 ±10 ±15 ±20 ±30±25
Output Current (mA)
Output Voltage Swing (V)
Sinking
Current
Sourcing
Current
7
®
OPA445
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage (mV)
20
18
16
14
12
10
8
6
4
2
0
Typical production
distribution of
packaged units.
–5
–4.5–4–3.5–3–2.5–2–1.5–1–0.5
0
0.511.522.533.544.5
5
10pF 100pF 1nF 10nF
Load Capacitance
Overshoot (%)
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
60
50
40
30
20
10
0
G = –1
G = +1
G = –2
G = 10
10V/div
LARGE-SIGNAL STEP RESPONSE
G = 1, C
L
= 100pF
2.5µs/div
50mV/div
SMALL-SIGNAL STEP RESPONSE
G = 1, C
L
= 100pF
500ns/div
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage Drift (µV/°C)
25
20
15
10
5
0
Typical production
distribution of
packaged units.
02468
101214161820222426283032343638
40
8
®
OPA445
12 510
|V
S
| – |VO| (V)
20 50 100
SAFE OPERATING AREA
Output Current (mA)
TA = 25°C
TA = 120°C
TA = 85°C
TA + (|VS| – |VO|) IO JA ≤ TJ (max)
JA
= 100°C/W
T
J
(max) = 125°C
θ
θ
100
10
1
0.1
APPLICATION INFORMATION
Figure 1 shows the OPA445 connected as a basic noninverting amplifier. The OPA445 can be used in virtually
any op amp configuration.
Power supply terminals should be bypassed with 0.1µF
capacitors, or greater, near the power supply pins. Be sure
that the capacitors are appropriately rated for the power
supply voltage used.
OPA445
3
2
6
1
4
5
7
V–
10mV Typical
Trim Range
(1)
V+
NOTE: (1) 10kΩ to 1MΩ
Trim Potentiometer
(100kΩ recommended).
Use offset adjust pins
only to null offset voltage
of op amp—see text.
FIGURE 2. Offset Voltage Trim.
FIGURE 1. Offset Voltage Trim.
G = 1+
R
2
R
1
Z
L
R
2
R
1
OPA445
V–
V+
V
IN
0.1µF
0.1µF
V
O
POWER SUPPLIES
The OPA445 may be operated from power supplies up to
±45V or a total of 90V with excellent performance. Most
behavior remains unchanged throughout the full operating
voltage range. Parameters which vary significantly with
operating voltage are shown in the typical performance
curves.
Some applications do not require equal positive and negative
output voltage swing. Power supply voltages do not need to
be equal. The OPA445 can operate with as little as 20V
between the supplies and with up to 90V between the
supplies. For example, the positive supply could be set to
80V with the negative supply at –10V, or vice-versa.
OFFSET VOLTAGE TRIM
The OPA445 provides offset voltage trim connections on pins
1 and 5. Offset voltage can be adjusted by connecting a
potentiometer as shown in Figure 2. This adjustment should
be used only to null the offset of the op amp, not to adjust
system offset or offset produced by the signal source. Nulling
system offset could degrade the offset voltage drift behavior
of the op amp. While it is not possible to predict the exact
change in drift, the effect is usually small.
SAFE OPERATING AREA
Stress on the output transistors is determined both by the
output current and by the output voltage across the conducting output transistors, VS – VO. The power dissipated by the
output transistor is equal to the product of the output current
and the voltage across the conducting transistor, VS – VO.
The Safe Operating Area (SOA curve, Figures 3, 4, and 5)
shows the permissible range of voltage and current. The
curves shown represent devices soldered to a circuit board
with no heat sink. Increasing printed circuit trace area or the
use of a heat sink (TO-99 package) can significantly reduce
thermal resistance (θ), resulting in increased output current
for a given output voltage (see “Heat Sink” text).
The safe output current decreases as VS – VO increases.
Output short-circuits are a very demanding case for SOA. A
short-circuit to ground forces the full power supply voltage
(V+ or V–) across the conducting transistor and produces a
typical output current of 25mA. With ±40V power supplies,
this creates an internal dissipation of 1W. This exceeds the
maximum rating and is not recommended. If operation in
this region is unavoidable, a heat sink is required. For further
insight on SOA, consult Application Bulletin AB-039.
FIGURE 3. 8-Pin DIP Safe Operating Area.
9
®
OPA445
12 510
|V
S
| – |VO| (V)
20 50 100
SAFE OPERATING AREA
100
10
1
Output Current (mA)
0.1
TA = 25°C
TA = 85°C
TA = 125°C
TA + (|VS| – |VO|) IO JA ≤ TJ (max)
JA
= 200°C/W (No Heat Sink*)
T
J
(max) = 150°C
*
Simple clip-on heatsinks can
reduce by as much as 50°C/W.
θ
θ
θ
12 510
|V
S
| – |VO| (V)
20 50 100
SAFE OPERATING AREA
100
10
1
Output Current (mA)
0.1
TA = 25°C
TA = 85°C
TA = 120°C
TA + (|VS| – |VO|) IO JA ≤ TJ (max)
JA
= 150°C/W
T
J
(max) = 125°C
θ
θ
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load
conditions. For dc signals, power dissipation is equal to the
product of the output current times the voltage across the
conducting output transistor, PD = IL (VS – VO). Power
dissipation can be minimized by using the lowest possible
power supply voltage necessary to assure the required output
voltage swing.
For resistive loads, the maximum power dissipation occurs
at a dc output voltage of one-half the power supply voltage.
Dissipation with ac signals is lower. Application Bulletin
AB-039 explains how to calculate or measure dissipation
with unusual loads or signals.
The OPA445 can supply output currents of 15mA and
larger. This would present no problem for a standard op amp
operating from ±15V supplies. With high supply voltages,
however, internal power dissipation of the op amp can be
quite large. Operation from a single power supply (or unbalanced power supplies) can produce even larger power dissipation since a large voltage is impressed across the conducting output transistor. Applications with large power dissipation may require a heat sink.
HEAT SINKING
Power dissipated in the OPA445 will cause the junction
temperature to rise. For reliable operation junction temperature should be limited to 125°C, maximum (150°C for
TO-99 package). Some applications will require a heat sink
to assure that the maximum operating junction temperature
is not exceeded. In addition, the junction temperature should
be kept as low as possible for increased reliability. Junction
temperature can be determined according to the following
equation:
TJ = TA + P
D θJA
Package thermal resistance,
θ
JA
, is affected by mounting
techniques and environments. Poor air circulation and use of
sockets can significantly increase thermal resistance. Best
thermal performance is achieved by soldering the op amp into
a circuit board with wide printed circuit traces to allow greater
conduction through the op amp leads. Simple clip-on heat
sinks (such as Thermalloy 2257) can reduce the thermal
resistance of the TO-99 metal package by as much as 50°C/W.
For additional information on determining heat sink requirements, consult Applications Bulletin AB-038.
CAPACITIVE LOADS
The dynamic characteristics of the OPA445 have been
optimized for commonly encountered gains, loads, and operating conditions. The combination of low closed-loop gain
and capacitive load will decrease the phase margin and may
lead to gain peaking or oscillations. Figure 6 shows a circuit
which preserves phase margin with capacitive load. The
circuit does not suffer a voltage drop due to load current,
however, input impedance is reduced at high frequencies.
Consult Application Bulletin AB-028 for details of analysis
techniques and application circuits.
FIGURE 4. SO-8 Safe Operating Area.
FIGURE 5. TO-99 Safe Operating Area.
V
O
C
L
5000pF
R
2
R
1
G = 1 +
R
2
2kΩ
R
1
2kΩ
V
IN
NOTE: Design equations and component values are approximate.
User adjustment is required for optimum performance.
R
C
20Ω
C
C
0.22µF
R
C
=
R
2
2CL X 1010 – (1 + R2/R1)
OPA445
C
C
=
C
L
X 10
3
R
C
FIGURE 6. Driving Large Capacitive Loads.
10
®
OPA445
R
1
R
2
OPA445
OPA445
“SLAVE”
“MASTER”
V
IN
R
S
(1)
10Ω
R
S
(1)
10Ω
R
L
NOTE: (1) RS resistors minimize the circulating
current that will always flow between the two devices
due to V
OS
errors.
INCREASING OUTPUT CURRENT
In those applications where the 15mA of output current is
not sufficient to drive the required load, output current can
be increased by connecting two or more OPA445s in parallel
as shown in Figure 7. Amplifier A1 is the “master” amplifier
and may be configured in virtually an op amp circuit.
Amplifier A2, the “slave”, is configured as a unity gain
buffer. Alternatively, external output transistors can be used
to boost output current. The circuit in Figure 8 is capable of
supplying output currents up to 1A.
INPUT PROTECTION
The inputs of conventional FET-input op amps should be
protected against destructive currents that can flow when
input FET gate-to-substrate isolation diodes are forwardbiased. This can occur if the input voltage exceeds the power
supplies or there is an input voltage with VS = 0V. Protection
is easily accomplished with a resistor in series with the
input. Care should be taken because the resistance in series
with the input capacitance may affect stability. Many input
signals are inherently current-limited, therefore, a limiting
resistor may not be required.
FIGURE 7. Parallel Amplifiers Increase Output Current
Capability.
R
1
R
2
OPA445
TIP30C
TIP29C
V
IN
+45V
–45V
V
O
R
3
(1)
100Ω
NOTE: (1) Provides current limit for OPA445 and allows the amplifier to
drive the load when the output is between 0.7V and –0.7V.
R
4
0.2Ω
R
4
0.2Ω
LOAD
C
F
FIGURE 8. External Output Transistors Boost Output Current up to 1 Amp.
11
®
OPA445
OPA445
0-2mA
+60V
25kΩ
–12V
VO = 0 to +50V
at 10mA
0.1µF
0.1µF
Protects DAC
During Slewing
DAC80-CBI-I
TYPICAL APPLICATIONS
FIGURE 9. Voltage-to-Current Converter.
FIGURE 10. Programmable Voltage Source.
OPA445
R
1
Compliance Voltage Range = ±35V
NOTE: R
1
= R3 and R2 = R4 + R
5
+40V
100kΩ
R
2
10kΩ
R
3
100kΩ
R
4
9.9kΩ
–40V
R
5
100Ω
I
L
Load
I
L
= [(V2 – V1)/R5] (R2/R1)
= (V
2
– V1)/1kΩ
V
2
V
1
+45V
160V
Piezo
(1)
Crystal
–45V
“MASTER”
R
2
9kΩ
R
1
1kΩ
V
IN
±4V
OPA445
+45V
–45V
“SLAVE”
R
4
10kΩ
R
3
10kΩ
OPA445
NOTE: (1) For transducers with large capacitance the stabilization
technique described in Figure 6 may be necessary. Be certain that the
“Master” amplifier is stable before stabilizing the “Slave” amplifier.
FIGURE 11. Bridge Circuit Doubles Voltage for Piezo Crystals.
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