Page 1
NTR4101P, NTRV4101P
s
Trench Power MOSFET
−20 V, Single P−Channel, SOT−23
Features
• Leading −20 V Trench for Low R
• −1.8 V Rated for Low Voltage Gate Drive
• SOT−23 Surface Mount for Small Footprint
• NTRV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• Load/Power Management for Portables
• Load/Power Management for Computing
• Charging Circuits and Battery Protection
DS(on)
V
(BR)DSS
−20 V
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R
TYP ID MAX
DS(ON)
70 mW @ −4.5 V
90 mW @ −2.5 V
112 mW @ −1.8 V
P−Channel MOSFET
S
−3.2 A
MAXIMUM RATINGS (T
Parameter
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Pulsed Drain Current
ESD Capability (Note 3) C = 100 pF,
Operating Junction and Storage Temperature TJ,
Source Current (Body Diode) I
Single Pulse Drain−to−Source Avalanche
Energy (V
= 25 W)
R
G
Lead Temperature for Soldering
Purposes (1/8” from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
= −8 V, IL = −1.8 Apk, L = 10 mH,
GS
= 25°C unless otherwise noted)
J
Symbol Value Unit
DSS
D
D
L
±8.0 V
−2.4
0.73
−1.8
0.42 W
−55 to
−2.4 A
GS
Steady
State
t ≤ 10 s TA = 25°C −3.2
Steady
State
t ≤ 10 s 1.25
Steady
State
TA = 25°C
TA = 85°C −1.7
TA = 25°C P
TA = 25°C
TA = 85°C −1.3
TA = 25°C P
tp = 10 ms
RS = 1500 W
I
D
I
D
I
DM
ESD 225 V
T
STG
S
EAS 16 mJ
T
−20 V
A
W
A
−18 A
°C
150
260 °C
G
D
MARKING DIAGRAM &
PIN ASSIGNMENT
1
Gate
3
Drain
TR4 MG
G
2
Source
3
1
2
SOT−23
CASE 318
STYLE 21
TR4 = Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device Package Shipping
NTR4101PT1G
NTRV4101PT1G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD801 1/D.
SOT−23
(Pb−Free)
3000 / Tape &
Reel
†
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 11
1 Publication Order Number:
NTR4101P/D
Page 2
NTR4101P, NTRV4101P
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Unit
Junction−to−Ambient − Steady State (Note 1)
Junction−to−Ambient − t < 10 s (Note 1)
Junction−to−Ambient − Steady State (Note 2)
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. ESD Rating Information: HBM Class 0
R
q
JA
R
q
JA
R
q
JA
170
100
300
°C/W
ELECTRICAL CHARACTERISTICS (T
Characteristic
= 25°C unless otherwise noted)
A
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 4)
(V
= 0 V, ID = −250 mA)
GS
Zero Gate Voltage Drain Current (Note 4)
= 0 V, VDS = −16 V)
(V
GS
Gate−to−Source Leakage Current
= ±8.0 V, VDS = 0 V)
(V
GS
V
(BR)DSS
I
DSS
I
GSS
−20 V
−1.0
±100 nA
mA
ON CHARACTERISTICS
Gate Threshold Voltage (Note 4)
(V
= VDS, ID = −250 mA)
GS
Drain−to−Source On−Resistance
= −4.5 V, ID = −1.6 A)
(V
GS
(V
= −2.5 V, ID = −1.3 A)
GS
(V
= −1.8 V, ID = −0.9 A)
GS
Forward Transconductance (VDS = −5.0 V, ID = −2.3 A) g
V
GS(th)
R
DS(on)
FS
−0.4 −0.72 −1.2 V
mW
70
90
112
85
120
210
7.5 S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance C
(VGS = 0 V, f = 1 MHz, VDS = −10 V)
Reverse Transfer Capacitance C
Total Gate Charge (VGS = −4.5 V, VDS = −10 V, ID = −1.6 A) Q
Gate−to−Source Gate Charge (VDS = −10 V, ID = −1.6 A) Q
Gate−to−Drain “Miller” Charge (VDS = −10 V, ID = −1.6 A) Q
Gate Resistance R
C
iss
oss
rss
G(tot)
GS
GD
G
675 pF
100
75
7.5 8.5 nC
1.2 nC
2.2 nC
6.5
W
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time t
Turn−Off Delay Time t
(VGS = −4.5 V, VDS = −10 V,
I
= −1.6 A, RG = 6.0 W)
D
t
Fall Time t
d(on)
r
d(off)
f
7.5
12.6
30.2
21.0
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage (VGS = 0 V, IS = −2.4 A) V
Reverse Recovery Time
Charge Time t
dI
(VGS = 0 V,
/dt = 100 A/ms, IS = −1.6 A)
SD
Discharge Time t
Reverse Recovery Charge Q
SD
t
rr
a
b
rr
−0.82 −1.2 V
12.8 15 ns
9.9 ns
3.0 ns
1008 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
5. Switching characteristics are independent of operating junction temperature.
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2
Page 3
NTR4101P, NTRV4101P
6
10
d
R
DRAIN−TO−SOURCE
0
TYPICAL PERFORMANCE CURVES (T
VGS = −10 V − −2.4 V
8
6
4
DRAIN CURRENT (AMPS)
2
D,
−I
.
0
0
1
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
0.1
0.09
VGS = −5.0 V
T = 125°C
0.08
0.07
0.06
0.05
T = 25°C
T = −55°C
0.04
0.03
0.02
DRAIN−TO−SOURCE RESISTANCE (W)
0.01
0
DS(on),
13
R
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and
Temperature
−2.2 V
−2.0 V
−1.8 V
−1.6 V
5
632
5
J
TJ = 25°C
10
9
8
7
6
5
4
3
DRAIN CURRENT (AMPS)
2
D,
−I
1
0
78
0.15
0.14
0.13
0.12
0.11
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
DRAIN−TO−SOURCE RESISTANCE (W)
0.01
0
79
DS(on),
R
= 25°C unless otherwise noted)
TJ = −55°C
25°C
125°C
VDS ≥ 20 V
0
1
24
3
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
TJ = 25°C
VGS = −2.5 V
VGS = −4.5 V
13
246
−I
D,
5
79
DRAIN CURRENT (AMPS)
81
Figure 4. On−Resistance vs. Drain Current an
Temperature
5
6
1.4
ID = −1.6 A
1.2
1.0
0.8
DS(on),
0.6
RESISTANCE (NORMALIZED)
0.4
−50 0−25 25
Figure 5. On−Resistance Variation with
50 12510075
TJ, JUNCTION TEMPERATURE (°C)
Temperature
100000
10000
1000
100
, LEAKAGE (nA)
DSS
−I
10
1.0
150
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3
VGS = 0 V
TJ = 150°C
TJ = 125°C
2
08
−V
46
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS,
10 12 14 1
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Page 4
NTR4101P, NTRV4101P
C, CAPACITANCE (pF)
)
0
1000
800
600
400
200
0
0
−V
1000
VDD = −10 V
= −1.6 A
I
D
V
GS
100
t, TIME (ns)
10
1
TYPICAL PERFORMANCE CURVES (T
VGS = 0 V
C
iss
C
oss
C
rss
12 14 16 18 20
10
4
2
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 7. Capacitance Variation
= −4.5 V
t
d(off)
t
f
t
r
t
d(on)
, GATE RESISTANCE (OHMS)
R
G
8
6
101
TJ = 25°C
100
= 25°C unless otherwise noted)
J
4.0
3.5
QT
3.0
2.5
2.0
V
DS
Q
gs
Q
gd
1.5
1.0
0.5
GATE−TO−SOURCE VOLTAGE (VOLTS
0
GS,
064
−V
, TOTAL GATE CHARGE (nC)
Q
g
ID = −1.6 A
T
J
Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Gate Charge
5
VGS = 0 V
4.5
= 25°C
T
J
4
3.5
3
2.5
2
1.5
, SOURCE CURRENT (A)
S
1
−I
0.5
0
0
0.2 0.4
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
−V
SD
0.6 0.8
V
GS
= 25°C
−V
DS,
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
82
1.
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
VGS ≤ 10 V
Single Pulse
TC = 25°C
10
1
0.1
, DRAIN CURRENT (A)
D
I
R
DS(on)
Thermal Limit
0.01
Package Limit
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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Limit
Figure 10. Diode Forward Voltage vs. Current
10 ms
100 ms
1 ms
10 ms
dc
1001010.10.01
4
Page 5
NTR4101P, NTRV4101P
P
al
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M,
D
H
SEE VIEW C
E
c
0.25
3
E
12
b
e
q
A
L
A1
L1
VIEW C
1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIMAMIN NOM MAX MIN
A1 0.01 0.06 0.10 0.001
b 0.37 0.44 0.50 0.015
c 0.09 0.13 0.18 0.003
D 2.80 2.90 3.04 0.110
E 1.20 1.30 1.40 0.047
e 1.78 1.90 2.04 0.070
L 0.10 0.20 0.30 0.004
L1
H
q
STYLE 12:
PIN 1. CATHODE
MILLIMETERS
0.89 1.00 1.11 0.035
0.35 0.54 0.69 0.014 0.021 0.029
2.10 2.40 2.64 0.083 0.094 0.104
E
0 −−− 10 0 −−− 10
2. CATHODE
3. ANODE
INCHES
NOM MAX
0.040 0.044
0.002 0.004
0.018 0.020
0.005 0.007
0.114 0.120
0.051 0.055
0.075 0.081
0.008 0.012
°°°°
SOLDERING FOOTPRINT*
0.95
0.95
0.037
0.9
0.035
0.8
0.031
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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0.037
SCALE 10:1
2.0
0.079
ǒ
inches
mm
Ǔ
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NTR4101P/D
5
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