The NTE71115 is a monolithic integrated circuit in a 18–Lead DIP type package designed for use in
color television receivers.
Features:
DPositive Video Input: Capacitively Coupled (Source Impedance < 200Ω)
DAdaptive Sync Separator: Slicing Level at 50% of Sync Amplitude
DInternal Vertical Pulse Separator
DOutput Stage for Vertical Sync Pulse or Composite Sync Depending on the Load; Both are
Switched OFF at Muting
Dö
DCoincidence Detector ö
Phase Control Between Horizontal Sync and Oscillator
1
for Automatic Time Constant Switching; Overruled by the VCR Switch
3
DTime Constant Switch Between Two External Time Constants for Loop Gain; Both Controlled
by the Coincidence Detector ö
Dö
Gating Pulse Controlled by Coincidence Detector ö
1
DMute Circuit Depending on TV Transmitter Identification
Dö
Phase Control Between Line Flyback and Oscillator; the Slicing Levels for ö2 Control and
2
Horizontal Blanking can be set Separately
DBurst Keying and Horizontal Blanking Pulse Generation, in Combination with Clamping of the
Vertical Blanking Pulse (Three–Level Sandcastle)
DHorizontal Drive Output with Constant Duty Cycle Inhibited by the Protection Circuit or the
Supply Voltage Sensor
DDetector for Too Low Supply Voltage
DProtection Circuit for Switching Off the Horizontal Drive Output Continuously if the Input Voltage
is Below 4V or Higher than 8V
DLine Flyback Control Causing the Horizontal Blanking Level at the Sandcastle Output Continuously
in Case of a Missing Flyback Pulse
DSpot Suppressor Controlled by the Line Flyback Control
w
/Double Slope Integrator
3
3
Applications:
DTelevision Receivers
DVideo Receivers
Page 2
Absolute Maximum Ratings:
Supply Voltage (Pin19), V
15–5
= V
CC
Voltages at:
(Pin1, Pin4, and Pin7), V
(Pin8, Pin13, and Pin18), V
(Pin11 (Range)), V
11–5
1–5
, V
8–5
4–5
, V
, V
13–5
Currents at:
Pin1, I
Pin2 (Peak Value), ±I
Pin4, I
Pin6 (Peak Value), ±I
Pin7, I
Pin8 (Range), I
Pin9 (Range), I
Pin18, ±I
Total Power Dissipation, P
1
2M
4
6M
7
8
9
18
TOT
Operating Ambient Temperature Range, T
Storage Temperature Range, T
Composite Video Input and Sync Separator, Pin11 (Internal Black Level Determination)
Input Signal (Positive Video; Standard
Signal; Peak–to–Peak Value)
Sync Pulse Amplitude (Independent of
Video Content)
Generator ResistanceR
Input Current During
Video
Sync Pulse–I
Black Level–IComposite Sync Generation, Pin10 (Horizontal Slicing Level at 50% of the Sync Pulse Amplitude)
Capacitor Current During
Video
Sync Pulse–IVertical Sync Pulse Generation, Pin9 (Slicing Level at 30% (60% Between Black Level and Horizontal Slicing Level))
Output VoltageV
Pulse Durationt
Delay With Respect to the V ertical Sync
Pulse (LeadinG Edge)
Pulse–Mode Control
Output Current for Vertical Sync
Pulse (Dual Integrated)
(VCC = 12V, TA = +25°C unless otherwise specified)
V
11–5(P–P)
V
11–5(P–P)
I
11
I
10
10
9–5
p
t
D
G
11
11
0.21.03.0V
50––mV
––200Ω
–5–µA
–40–µA
–25–µA
–16–µA
–170–µA
10––V
–190–µs
–45–µs
No Current Applied
at Pin9
Output Current for Horizontal and
Vertical Sync Pulse (Non–Inte-
grated Separated Signal)
Horizontal Oscillator, Pin14 and Pin16
Free–Running Frequencyf
Reference Voltage for f
OSC
V
OSC
14–5
Current Applied Via a
15kΩ from V
–15.625–kHz
–6–V
to Pin9
CC
Page 3
DC and AC Electrical Characteristics (Cont’d): (VCC = 12V, TA = +25°C unless otherwise specified)
ParameterSymbolTest ConditionsMinTypMaxUnit
Horizontal Oscillator, Pin14 and Pin16 (Cont’d)
Frequency Control Sensitivity∆f
Adjustment Range of Circuit∆f
Spread of Frequency∆f
OSC
/∆I
OSC
OSC
14
–31–Hz/µA
–±10–%
––5%
Frequency Dependency (Excluding
Tolerance of External Components)
w
/Supply Voltage
w
/Supply Voltage Drop of 5V∆f
w
/TemperatureTC––±10
∆f
OSC/fOSC
∆V
15–5/V15–5
OSC
VCC = 12V–±0.05–%
––10%
Capacitor Current During:
Charging
DischargingI
–I
16
16
–1024–µA
–313–µA
Sawtooth Voltage Timing (Pin14)
Rise Time
Fall Timet
t
R
F
–49–µs
–15–µs
Horizontal Output Pulse, Pin4
Output Voltage, LowV
Pulse Duration, Hight
Supply Voltage for Switching Off the
V
4–5
P
CC
I4 = 30mA––0.5V
–29 ±1.5–µs
–4–V
Output Pulse (Pin15)
Hysteresis for Switching On the Output
∆V
P
–250–mV
Pulse
Phase Compensation, ϕ1, Pin17
–4
°C
–1
Control Voltage RangeV
Leakage CurrentI
Control Current:
for External Time Constant Switch
at V
or V
at V
18–5
13–5
18–5
= V
15–5
> 9.5V
= V
15–5
and V
and V
< 2V
13–5
= 2 to 9.5V1.82.02.2mA
13–5
17–5
17
±I
17
V
= 3.55 to 8.3V––1µA
17–5
3.55–8.3V
1.82.02.2mA
–8–mA
Horizontal Oscillator Control
Control Sensitivity
Catching and Holding Range∆f
S
ϕ
OSC
6––kHz/µs
–±680–Hz
Spread of Catching and Holding Range–±10–%
Internal Keying Pulset
P
V
= 2.9 to 9.5V–7.5–µs
13–5
Time Constant Switch
Slow Time Constant
V
13–5
9.5–2.0V
Fast Time Constant2.0–9.5V
Impedance Converter Offset Voltage
±V
17–18
––3mV
(Slow Time Constant)
Output Resistance
Slow Time Constant
Fast Time Constant
R
18–5
––10Ω
High
Impedance
––Ω
Page 4
DC and AC Electrical Characteristics (Cont’d): (VCC = 12V, TA = +25°C unless otherwise specified)
ParameterSymbolTest ConditionsMinTypMaxUnit
Phase Compensation, ϕ1, Pin17 (Cont’d)
Leakage CurrentI
Coincidence Detector, ϕ3, Pin13
Output Voltage
w
/o Coincidence w/Composite Video
V
13–5
Signal
w
/o Coincidence w/o Composite Video
Signal (Noise)
w
/Coincidence w/Composite Video
Signal
Output Current
w
/o Coincidence w/Composite Video
I
Signal
w
/Coincidence w/Composite Video
–I
Signal
Switching CurrentI
I
13(av)
Phase Comparison, ϕ2, Pin2 and Pin3 (Note 1)
Phase Relation Between Middle of the
∆ttFP = 12µs, Note 2–2.6 ±0.7–µs
Horizontal Sync Pulse and the Middle
of the Line Flyback Pulse
If Additional Adjustment is Required, it
∆I/∆t–30–µA/µs
can be Arranged by Applying a
Current at Pin3, such that for Applied
Current
Input for Line Flyback Pulse, Pin2
18
13
13
13
––1µA
––1V
––2V
–6–V
–50–µA
–300–µA
V
= VCC–0.5V––100µA
13–5
V
= 0.5V (Average)––100µA
13–5
Switching Level for ϕ2 ComparisonV
Switching Level for Horizontal Blanking
2–5
V
2–5
–3–V
–0.3–V
and Flyback Control
Input Voltage LimitingV
2–5
––0.7
–V
+4.5
Switching Current
at Horizontal Flyback
I
2
0.011.0–mA
at Horizontal Scan––2.0µA
Maximum Negative Input Current–I
2
––500µA
Phase Detector Output, Pin3
Control Current for ϕ
2
Control Range∆t
Static Control Error∆t/∆t
Leakage CurrentI
±I
3
ϕ
2
d
3
–1–mA
–19–µs
––0.2%
––5µA
Note 1. Phase comparison between horizontal oscillator and the line flyback pulse. Generation of
) horizontal output pulse with constant duration.
2
Note 2. t
a phase–modulated (ϕ
is the line flyback pulse duration.
FP
Page 5
DC and AC Electrical Characteristics (Cont’d): (VCC = 12V, TA = +25°C unless otherwise specified)
ParameterSymbolTest ConditionsMinTypMaxUnit
Burst Gating Pulse, Pin6 (Note 3)
Output VoltageV
Pulse Durationt
Phase Relation Between Middle of Sync
t
6–5
p
ϕ
6
V
= 7V2.152.653.15µs
6–5
1011–V
3.74.04.3µs
Pulse at the Input and the Leading
Edge of the Burst Gating Pulse
Output Trailing Edge CurrentI
6
–2–mA
Horizontal Blanking Pulse, Pin6 (Note 3)
Output VoltageV
Output Trailing Edge CurrentI
Saturation Voltage at Horizontal ScanV
6–5
6
6–5sat
4.24.54.9V
–2–mA
––0.5V
Clamping Circuit for Vertical Blanking Pulse, Pin6 (Note 3)
Output VoltageV
Minimum Output CurrentI
Maximum Output CurrentI
6–5
6min
6max
I6 = 2.8mA2.152.53.0V
V
> 2.15V–2.3–mA
6–5
V
< 3V–3.3–mA
6–5
TV Transmitter Identification, Pin12
Output Voltage
No TV Transmitter
V
12–5
––1V
TV Transmitter Identified7––V
Mute Output, Pin7
Output Voltage, No TV TransmitterV
Output Resistance, No TV TransmitterR
Output Leakage Current,
7–5
7–5
I
7
I7 = 3mA––0.5V
I7 = 3mA––100Ω
V
> 3V––5µA
12–5
TV Transmitter Identified
Protection Circuit, Pin8 (Beam Current/EHT Voltage Protection)
No–Load Voltage (Operative Condition)V
Threshold
Positive–Going Voltage
8–5
V
8–5
I8 = 0–6–V
–8 ±0.8–V
Negative–Going Voltage–4 ±0.4–V
Current Limiting±I
Input ResistanceR
Response Delay of Threshold Switcht
8
8–5
d
V
= 1 to 8.5V–60–µA
8–5
V
> 8.5V–3–kΩ
8–5
–10–µs
Control Output of Line Flyback Pulse Condition, Pin1
Saturation V oltage at Standard OperationV
Output Leaka g e Current in Case of Break