NJG1707PG1
800MHz TDMA FRONT-END GaAs MMIC
n
GENERAL DESCRIPTION
NJG1707PG1 is a front-end IC for a digital cellular phone of
800MHz band. A 2x6 antenna switches and a low noise
amplifier are included.
The parallel control signals of three bits logic connect T/R
circuits to internal two antennas or external two antennas. The
termination ports with external matching circuits make low
interference between diversity antennas.
The ultra small & thin FFP32-G1 package is adopted.
nFEATURES
•Ultra small & thin package FFP32-G1 (Mount Size: 4.5x4.5x0.85mm)
•Antenna Switch
lLow voltage operation -2.5V (Tx only) and +3.5V
lLow current consumption 10uA typ. (Tx Mode, P
=30dBm), 2uA typ. (Rx Mode, Pin=10dBm)
in
lLow insertion loss 0.5dB typ. @(Tx-ANT1, Tx-EXT1) f
lLow Adjacent Channel -63dBc typ. @ VDD=+3.5V, VSS=-2.5V, fin=960MHz, Pin=30dBm
Leakage Power
•Low Noise Amplifier
lLow voltage operation +2.7V typ.
lLow current consumption +2.7mA typ.
lSmall signal gain 17.5dB typ. @f=820MHz
lLow noise figure 1.4dB typ. @ f=820MHz
lHigh input IP3 IIP3=-4.5dBm typ. OIP3=+13dBm typ. @f=820MHz+820.1MHz
n
PACKAGE OUTLINE
NJG1707PG1
=960MHz, Pin=30dBm
in
n
PIN CONFIGURATION
TER1
25
GND(LNA)
GND(LNA)
LNAIN
LNAOUT
EXTCAP
GND
GND
26
27
28
29
30
31
32
FFP32 Type
(Top View)
GND
ANT2
2324
22
SW5
SW1
1
2 3 4 5 6 7
RX
GND
21
ANT-SW CONTROL VOLTAGE
ANT-SW
DECORDER
GND
SW4-1
SW3 SW7
SW4-2
ANT1
GND
SW 6
SW8
SW 9
SW 2
TER2
17181920
16
GND
TX
15
14
GND
13
EXT1
12
GND
11
EXT2
10
GND
9
VDD
8
GND
GND
GND
CTL1
CTL2
VSS
CTL3
GND
NJG1707PG1
nABSOLUTE MAXIMUM RATINGS
Ta=25°C, VDD=3.5V, VSS=-2.5V
(Ta=25°C)
PARAMETER SYMBOL CONDTIONS RATINGS UNITS
Supply Voltage 1 V
Supply Voltage 2 V
Supply Voltage 3 V
Control Voltage V
DD1
DD2
SS
CTL
VDD Terminal 6.0 V
LNAOUT Terminal 5.0 V
VSS Terminal -4.0~+0.3 V
CTL1, CTL2, CTL3 Terminals 6.0 V
TX, ANT1, EXT1 Terminals 37 dBm
in
RX, ANT2, EXT2 Terminals 28 dBmInput Power P
LNAIN Terminal 10 dBm
Power Dissipation P
Operating
Temperature
Storage
Temperature
n
ELECTRICAL CHARACTERISTICS 1 [ANTENNA SWITCH DC CHARACTERISTICS]
D
T
opr
T
stg
600 mW
-40~+85 °C
-55~+125 °C
General Conditions:
TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω)
TER1, TER2 : grounded by 10pF capacitor
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Positive Supply Voltage V
Negative Supply Voltage V
Current Consumption 1 I
Current Consumption 2 I
Current Consumption 3 I
Current Consumption 4 I
Control Voltage (H) V
Control Voltage (L) V
Control Current I
Control terminal Input
Impedance
* The voltage of this terminal should be supplied before or same time with other DC supplying
terminals. (CTL1~3, VSS).
DD
SS
DD1
SS1
DD2
SS2
CTL(H)
CTL(L)
CTL
R
in
VDD Terminal 2.7 3.5 5.0 V
VSS Terminal -3.5 -2.5 -2.0 V
VDD Terminal
Rx Mode, No RF Signal
VSS Terminal
Rx Mode, No RF Signal
VDD Terminal, fin=0.1~2GHz
Tx Mode, Pin=30dBm
VSS Terminal, fin=0.1~2GHz
Tx Mode, Pin=30dBm
- 2.0 5.0
-0.1 - 0 uA
- 10 30 uA
-30 -10 - uA
CTL1, CTL2, CTL3 Terminals 2.0 3.0 V
CTL1, CTL2, CTL3 Terminals 0 0 0.6 V
CTL1, CTL2, CTL3=V
or CTL1, CTL2, CTL3=0V
DD
-1.3 - 1.3 uA
CTL1, CTL2, CTL3 Terminals 4 - -
DD
µA
V
MΩ
NJG1707PG1
n
Ta=25°C,VDD=3.5V,VSS=-2.5V, fin=885~940MHz
ELECTRICAL CHARACTRISTICS 2 [Tx Mode]
General Conditions:
Tested on PCB circuit as shown below.
Insertion loss of each connectors, striplines, and capacitors are excluded.
TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω)
TER1, TER2: grounded by 10pF capacitor.
PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS
Tx-ANT1 Insertion Loss LOSS1 Pin=30dBm - 0.50 0.65 dB
Tx-EXT1 Insertion Loss LOSS2 Pin=30dBm - 0.50 0.65 dB
Tx-Rx Isolation ISL1
Tx-ANT1 Isolation ISL2
Tx-ANT2 Isolation ISL3
Tx-EXT1 Isolation ISL4
Tx-EXT2 Isolation ISL5
Input Power at
0.5dB Compression 1
Adjacent Channel
Leakage Power 1
Adjacent Channel
Leakage Power 2
P
-0.5dB
ACP1
ACP2
2nd Harmonics 1 2f0(1)
3rd Harmonics 1 3f0(1)
Pin=30dBm
Tx-ANT1, Tx-EXT1 passing
Pin=30dBm
Tx-EXT1 passing
Pin=30dBm
Tx-ANT1, Tx-EXT1 passing
Pin=30dBm
Tx-ANT1 passing
Pin=30dBm
Tx-ANT1,Tx-EXT1 passing
(1) Tx-ANT1,Tx-EXT1 passing 33 35 - dBm
24 27 - dB
22 25 - dB
33 38 - dB
21 24 - dB
32 37 - dB
PDC Standard, ±50kHz offset
Pin=30dBm
- -63 -60 dBc
Input Signal ACP=-64dBc @ 30dBm
PDC Standard, ±100kHz offset
Pin=30dBm
- -74 -70 dBc
Input Signal ACP=-76dBc @ 30dBm
Pin=30dBm
Input Signal 2nd Harmonics=-70dBc
Pin=30dBm
Input Signal 3rd Harmonics=-100dBc
- -65 -63 dBc
- -64 -62 dBc
VSWR 1 VSWR1 Tx-ANT1, Tx-EXT1 passing - 1.2 1.5
Switching Time 1 TD1 CTL1~3 - 120 500 nsec
NJG1707PG1
n
Ta=25°C, VDD=3.5V, VSS=0V, fin=810~885MHz
Ta=25°C, VDD=3.5V, VSS=0V, fin=820MHz
ELECTRICAL CHARACTRISTICS 3 [Rx Mode]
General Conditions:
Tested on PCB circuit as shown below.
Insertion loss of each connectors, striplines, and capacitors are excluded.
TX, RX, ANT1, ANT2, EXT1, EXT2: terminated (50Ω)
TER1, TER2: grounded by 10pF capacitor.
PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS
Rx-ANT1 Insertion Loss LOSS3 Pin=10dBm - 0.65 0.80 dB
Rx-ANT2 Insertion Loss LOSS4 Pin=10dBm - 0.60 0.75 dB
Rx-EXT1 Insertion Loss LOSS5 Pin=10dBm - 0.70 0.85 dB
Rx-EXT2 Insertion Loss LOSS6 Pin=10dBm - 0.65 0.80 dB
Rx-ANT1 Isolation ISL6
Rx-ANT2 Isolation ISL7
Rx-EXT1 Isolation ISL8
Rx-EXT2 Isolation ISL9
Input Power at 1dB
Compression 1
P
-1dB
VSWR 2 VSWR2
Pin=10dBm
Rx-ANT2, Rx-EXT1, Rx-EXT2 passing
Pin=10dBm
Rx-ANT1, Rx-EXT1, Rx-EXT2 passing
Pin=10dBm
Rx-ANT1, Rx-ANT2, Rx-EXT2 passing
Pin=10dBm
Rx-ANT1, Rx-ANT2, Rx-EXT1 passing
Rx-ANT1, Rx-ANT2, Rx-EXT1, Rx-
(1)
EXT2 passing
RX-ANT1, RX-ANT2, RX-EXT1, RX-
EXT2 passing
22 26 - dB
24 30 - dB
22 26 - dB
22 26 - dB
21 26 - dBm
- 1.2 1.6
Switching Time 2 TD2 CTL1~3 - 120 500 nsec
n
ELECTRICAL CHARACTRISTICS 4 [LNA]
General Conditions:
Tested on PCB circuit as shown below.
PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS
Operation Frequency f
RF
810 - 885 MHz
Drain Voltage VDD3 2.5 2.7 4.5 V
Current Consumption IDD3 No RF input - 2.7 3.6 mA
Small Signal Gain Gain 16.0 17.5 18.5 dB
Gain Flatness G
flat
fRF=810~885MHz - 0.5 1.0 dB
Noise Figure NF - 1.4 1.6 dB
Pout at 1dB Gain
Compression Point
Input 3rd order
Intercept Point
LNAIN Port VSWR VSWR
LNAOUT Port VSWR VSWR
P
(2) -3.0 +1.0 - dBm
-1dB
IIP3 -8.0 -4.5 - dBm
i
o
- 1.5 2.5
- 1.5 2.5
NJG1707PG1
n
DD
DD
DD
DD
TERMINAL INFORMATION
PIN NO. SYMBOL DESCRIPTIONS
4 CTL1
5 CTL2
6 CTL3
7 V
9 V
11 EXT2
13 EXT1
15 TX
17 TER2
19 ANT1
21 RX
23 ANT2
25 TER1
26,27 GND(LNA)
28 LNAIN LNA input terminal. An external matching circuit is required.
30 LNAOUT
31 EXTCAP
1,2,3,8,10,
12,14,16,1
8,20,22,24,
29,32
SS
DD
GND
Control signal input terminal of high impedance C-MOS logic. Logic level: High; more
than +2V, Low; 0~+0.6V. Please connect to GND or VDD with 100kΩ if potential is
open or uncertain.
Negative supply terminal. Negative voltage of -3.5~-2.0V must be supplied on Tx
mode. This terminal is isolated on Rx mode, so open or –2.5~0V condition can be
used. Please connect bypass capacitor with GND to keep RF performance.
Positive supply terminal. The voltage of this terminal should be supplied before or
same time with other DC supplying terminals (CTL1~3, VSS). The bias voltage should
be +2.7~+5.0V. Please connect bypass capacitor with GND to keep RF performance.
RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block V
voltage.
RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block V
voltage.
Tx power input terminal. A DC cut capacitor is required to block VDD voltage, and also
an external matching circuit is required to improve VSWR(See Application circuit).
A termination terminal for ANT1 in case ANT2 is in use. The influence of ANT1
against ANT2 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage.
RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block V
voltage.
Rx output terminal. A DC cut capacitor is required to block VDD voltage, and also an
external matching circuit is required to improve VSWR(See Application circuit).
RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block V
voltage.
A termination terminal for ANT2 in case ANT1 is in use. The influence of ANT2
against ANT1 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage.
Ground terminal of LNA. Please place ground plane close to this pin for good RF
performance.
LNA output terminal. An external matching circuit with LNA biasing element L3, L4 as
in application circuit is required.
Bypass capacitor terminal of LNA. Please place C9 as in application circuit close to
this terminal.
Ground terminal. Please connect to ground plane as close as possible for good RF
performance.
n
TRUTH TABLE
”H”=VCTL (H), ”L”=VCTL (L), ”X”=H or L
CONTROL INPUT CONTROL OUTPUT
Tx/Rx Diversity IN/OUTROUTE
SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9
CTL1 CTL2 CTL3
Tx-ANT1 H X H OFF OFF OFF ON ON OFF OFF OFF ON
Tx-EXT1 H X L OFF OFF ON OFF ON ON ON OFF OFF
Rx-ANT1 L L H OFF OFF ON OFF ON OFF ON ON ON
Rx-ANT2 L H H ON OFF OFF OFF OFF ON ON ON ON
Rx-EXT1 L L L OFF OFF OFF ON ON ON OFF ON OFF
Rx-EXT2 L H L OFF ON OFF OFF ON ON ON ON ON
NJG1707PG1
n
TYPICAL CHARACTERISTICS (ANTENNA SWITCH)
Measured on the PCB evaluation circuit, losses of circuits are eliminated.
ANT SW Loss,V.S.W.R vs. Frequency
0
-0.5
-1
Insertion Loss (dB)
-1.5
-2
500 600 700 800 900 1000
(Thru:TX-ANT1,VDD=3.5V,VSS=-2.5V)
Loss
V.S.W.R
Frequency (MHz)
ANT SW Loss,V.S.W.R vs. Frequency
0
-0.5
(Thru:RX-ANT1,VDD=3.5V,VSS=0V)
Loss
1.8
1.6
1.4
1.2
1
1.8
1.6
0
-0.5
-1
V.S.W.R
Insertion Loss (dB)
-1.5
-2
0
-0.5
ANT SW Loss,V.S.W.R vs. Frequency
(Thru:TX-EXT1,VDD=3.5V,VSS=-2.5V)
Loss
V.S.W.R
500 600 700 800 900 1000
Frequency (MHz)
ANT SW Loss,V.S.W.R vs. Frequency
(Thru:RX-ANT2,VDD=3.5V,VSS=0V)
Loss
1.8
1.6
1.4
V.S.W.R
1.2
1
1.8
1.6
-1
Insertion Loss (dB)
-1.5
-2
500 600 700 800 900 1000
V.S.W.R
Frequency (MHz)
ANT SW Loss,V.S.W.R vs. Frequency
0
-0.5
-1
Insertion Loss (dB)
-1.5
(Thru:RX-EXT1,VDD=3.5V,VSS=0V)
Loss
V.S.W.R
1.4
1.2
1
1.8
1.6
1.4
1.2
-1
V.S.W.R
Insertion Loss (dB)
-1.5
-2
0
-0.5
-1
V.S.W.R
Insertion Loss (dB)
-1.5
V.S.W.R
500 600 700 800 900 1000
Frequency (MHz)
ANT SW Loss,V.S.W.R vs. Frequency
(Thru:RX-EXT2,VDD=3.5V,VSS=0V)
Loss
V.S.W.R
1.4
V.S.W.R
1.2
1
1.8
1.6
1.4
V.S.W.R
1.2
-2
500 600 700 800 900 1000
Frequency (MHz)
1
-2
500 600 700 800 900 1000
Frequency (MHz)
1
NJG1707PG1
n
TYPICAL CHARACTERISTICS (ANTENNA SWITCH)
Measured on the PCB evaluation circuit, losses of circuits are eliminated.
ANT SW Isolation vs. Frequency
-10
-20
-30
-40
Isolation (dB)
-50
-60
-70
500 600 700 800 900 1000
(Thru:TX-ANT1 , VDD=3.5V , VSS=-2.5V)
TX-EXT1 Isolation
TX-RX Isolation
TX-EXT2 Isolation
TX-ANT2 Isolation
Frequency (MHz)
ANT SW Isolation vs. Frequency
-20
-25
(Thru:RX-ANT1 , VDD=3.5V , VSS=0V)
RX-EXT1 Isolation
ANT SW Isolation vs. Frequency
-20
-25
-30
-35
-40
-45
Isolation (dB)
-50
-55
-60
500 600 700 800 900 1000
(Thru:TX-EXT1 , VDD=3.5V , VSS=-2.5V)
TX-ANT1 Isolation
TX-RX Isolation
TX-EXT2 Isolation
TX-ANT2 Isolation
Frequency (MHz)
ANT SW Isolation vs. Frequency
-20
-25
(Thru:RX-ANT2 , VDD=3.5V , VSS=0V)
RX-EXT2 Isolation
-30
Isolation (dB)
-35
-40
500 600 700 800 900 1000
RX-EXT2 Isolation
RX-ANT2 Isolation
Frequency (MHz)
ANT SW Isolation vs. Frequency
-20
-25
-30
Isolation (dB)
-35
(Thru:RX-EXT1 , VDD=3.5V , VSS=0V)
RX-ANT1 Isolation
RX-EXT2 Isolation
RX-ANT2 Isolation
-30
Isolation (dB)
-35
-40
500 600 700 800 900 1000
RX-EXT1 Isolation
RX-ANT1 Isolation
Frequency (MHz)
ANT SW Isolation vs. Frequency
-20
-25
-30
Isolation (dB)
-35
(Thru:RX-EXT2 , VDD=3.5V , VSS=0V)
RX-ANT1 Isolation
RX-ANT2 Isolation
RX-EXT1 Isolation
-40
500 600 700 800 900 1000
Frequency (MHz)
-40
500 600 700 800 900 1000
Frequency (MHz)
NJG1707PG1
n
TYPICAL CHARACTERISTICS (ANTENNA SWITCH)
Measured on the PCB evaluation circuit, losses of circuits are eliminated.
ANT-SW Pout,Loss vs. Pin
(TX-ANT1,fin=960MHz,VDD=3.5V,VSS=-2.5V)
40
35
30
25
20
15
Output Power (dBm)
10
5
0
0 5 10 15 20 25 30 35 40
Input Power (dBm)
ANT-SW Pout,Loss vs. Pin
(RX-ANT1,fin=885MHz,VDD=3.5V,VSS=0V)
35
30
1.2
1.1
1
0.9
0.8
0.7
Insertion Loss (dB)
0.6
0.5
0.4
1.8
1.6
I
vs. Input Power
DD2
60
50
40
(uA)
30
DD2
I
20
10
0
6
5
( Tx-ANT1,VDD=3.5V,VSS=-2.5V,f=960MHz)
0 5 10 15 20 25 30 35 40
Input Power (dBm)
I
vs. Input Power
DD1
( Rx-ANT1,VDD=3.5V,VSS=0V,f=885MHz)
25
20
15
Output Power (dBm)
10
5
0
0 5 10 15 20 25 30 35
Input Power (dBm)
2nd Harmonics vs. Frequency
-60
-65
-70
2nd Harmonics (dBc)
(Tx-ANT1,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
1.4
1.2
1
Insertion Loss (dB)
0.8
0.6
0.4
4
(uA)
3
DD1
I
2
1
0
0 5 10 15 20 25 30 35
Input Power (dBm)
3rd Harmonics vs. Frequency
-60
-65
-70
3rd Harmonics (dBc)
(Tx-ANT1,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
-75
880 900 920 940 960 980
Frequency (MHz)
-75
880 900 920 940 960 980
Frequency (MHz)
NJG1707PG1
n
TYPICAL CHARACTERISTICS (ANTENNA SWITCH)
Measured on the PCB evaluation circuit, losses of circuits are eliminated.
Loss vs. Temperature
1.0
0.8
0.6
0.4
Insertion Loss(dB)
0.2
0.0
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
-50 0 50 100
Ambient Temperature(oC)
Rx Isolation vs. Temperature
32
30
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
Loss vs. Temperature
1.0
0.8
0.6
0.4
Insertion Loss(dB)
0.2
0.0
(Rx-ANT1,f=885MHz,Pin=10dBm,VSS=0V)
VDD=3.5V
VDD=2.9V
-50 0 50 100
Ambient Temperature(oC)
EXT1 Isolation vs. Temperature
30
28
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
28
26
Isolation(dB)
24
22
-50 0 50 100
40
38
36
(dBm)
-0.5dB
34
P
32
Ambient Temperature(oC)
P
vs. Temperature
-0.5dB
(Tx-ANT1,f=960MHz,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
26
24
Isolation(dB)
22
20
-50 0 50 100
Ambient Temperature(oC)
I
vs. Temperature
( Tx-ANT1,fin=960MHz,Pin=30dBm,VDD=3.5V,Vss=-2.5V )
20
15
(uA)
10
DD2
I
5
DD2
VDD=3.5V
VDD=2.9V
30
-50 0 50 100
Ambient Temperature(oC)
0
-50 0 50 100
Ambient Temperature(oC)
NJG1707PG1
n
TYPICAL CHARACTERISTICS (ANTENNA SWITCH)
Measured on the PCB evaluation circuit.
ACP(50kHz) vs. Temperature
-55
-60
-65
ACP offset:50kHz (dBc)
-70
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
-50 0 50 100
Ambient Temperature (oC)
2nd Harmonics vs. Temperature
-60
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
ACP(100kHz) vs. Temperature
-65
-70
-75
ACP offset:100kHz (dBc)
-80
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
-50 0 50 100
Ambient Temperature (oC)
3rd Harmonics vs. Temperature
-60
(Tx-ANT1,f=960MHz,Pin=30dBm,VSS=-2.5V)
VDD=3.5V
VDD=2.9V
-65
-70
2nd Harmonics (dBc)
-75
-50 0 50 100
Ambient Temperature (oC)
VDD=3.5V
VDD=2.9V
-65
-70
3rd Harmonics (dBc)
-75
-50 0 50 100
Ambient Temperature (oC)
NJG1707PG1
n
TYPICAL CHARACTERISTICS (LNA)
Measured on the PCB evaluation circuit.
LNA NF,Gain vs. Frequency
(V
=2.7V,I
19
DD3
18
GAIN
17
Gain (dB)
16
15
14
750 800 850 900 950
Frequency (MHz)
LNA I
DD3
5
(f=820MHz)
4.5
4
3.5
(mA)
DD3
I
3
2.5
=2.7mA)
DD3
NF
,P-1dB vs. V
P-1dB
I
DD3
DD3
2
1.8
1.6
19
18
17
NF(dB)
Gain (dB)
1.4
1.2
1
6
4
16
15
14
2.5 3 3.5 4 4.5 5
10
0
-10
2
0
-2
P-1dB Output Power (dBm)
-4
-20
-30
-40
-50
Output Power,IM3 (dBm)
-60
LNA Gain,NF vs. V
(f=820MHz)
Gain
NF
V
(V)
DD3
LNA Pout,IM3 vs. Pin
(V
DD3
=2.7V,I
=2.7mA,f=820+820.1MHz)
DD3
Pout
IM3
DD3
2
1.8
1.6
1.4
1.2
1
NF (dB)
2
2.5 3 3.5 4 4.5 5
LNA IIP3,OIP3 vs. V
4
2
(f=820+820.1MHz,Pin=-30dBm)
V
DD3
OIP3
(V)
DD3
0
-2
-4
IIP3 (dBm)
IIP3
-6
-8
-10
2.5 3 3.5 4 4.5 5
V
(V)
DD3
-6
18
16
14
12
10
8
6
4
OIP3 (dBm)
-70
-40 -35 -30 -25 -20 -15 -10 -5 0
Input Power (dBm)
ANT SW - LNA OUT Isolation vs. Frequency
( RX and LNAin :50ohm terminated,VDD=3.5V , VSS=0V)
-30
RX-ANT2 Thru
-40
-50
-60
Isolation (dB)
-70
RX-EXT2 Thru
-80
100 200 300 400 500 600 700 800 900 1000
Frequency (MHz)
RX-EXT1 Thru
RX-ANT1 Thru
NJG1707PG1
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TYPICAL CHARACTERISTICS (LNA)
Measured on the PCB evaluation circuit. V
DD3
=2.7V
NJG1707PG1
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TYPICAL CHARACTERISTICS (LNA)
Measured on the PCB evaluation circuit.
LNA Gain,I
19
18
17
Gain (dB)
16
15
-50 0 50 100
Ambient Temperature (oC)
vs. Temperature
DD3
(V
=2.7V,f=820MHz)
DD3
LNA P-1dB vs. Temperature
(V
=2.7V,f=820MHz)
5
4
DD3
4.5
4
3.5
3
2.5
(mA)
DD3
I
LNA NF vs. Temperature
(V
=2.7V,f=820MHz)
2
1.8
1.6
1.4
NF (dB)
1.2
1
0.8
-50 0 50 100
DD3
Ambient Temperature (oC)
LNA IIP3,OIP3 vs. Temperature
(V
=2.7V,f=820.0+820.1MHz,Pin=-30dBm)
2
1
0
DD3
16
15
14
3
2
P-1dB(dBm)
1
0
-50 0 50 100
Ambient Temperature (oC)
-1
-2
IIP3(dBm)
-3
-4
-5
-6
-50 0 50 100
Ambient Temperature (oC)
13
12
11
10
9
8
OIP3(dBm)
NJG1707PG1
n
Freq.
mag.
ang.
mag.
ang.
mag.
ang.
mag.
ang.
(GHz)
0.2
0.987
-5.10
2.087
168.16
0.008
38.98
0.940
-3.71
0.3
0.985
-7.12
2.053
161.77
0.005
68.44
0.954
-4.61
0.4
0.987
-10.49
2.079
154.25
0.010
61.48
0.940
-7.50
0.5
0.967
-12.19
2.020
147.74
0.008
58.51
0.939
-8.86
0.6
0.967
-15.33
1.998
141.28
0.007
57.29
0.931
-11.32
0.7
0.943
-17.89
1.947
134.57
0.010
62.79
0.921
-13.70
0.8
0.928
-20.65
1.899
128.63
0.010
57.35
0.918
-15.28
0.9
0.911
-23.45
1.845
122.18
0.013
61.22
0.924
-18.33
1
0.894
-26.19
1.795
116.45
0.013
64.15
0.914
-20.15
1.1
0.882
-28.43
1.723
111.16
0.013
68.15
0.923
-22.40
1.2
0.867
-30.91
1.675
105.79
0.014
66.63
0.910
-24.64
1.3
0.861
-33.29
1.613
100.76
0.014
69.43
0.927
-26.98
1.4
0.853
-35.74
1.556
95.80
0.015
65.80
0.916
-28.74
1.5
0.848
-37.65
1.498
90.90
0.015
69.41
0.921
-30.73
1.6
0.843
-39.63
1.442
86.45
0.017
75.17
0.915
-32.14
1.7
0.834
-41.23
1.384
82.25
0.018
76.93
0.913
-33.86
1.8
0.832
-42.72
1.344
78.49
0.018
80.33
0.913
-35.13
1.9
0.823
-43.91
1.288
74.67
0.021
84.19
0.908
-36.37
2
0.816
-44.93
1.253
71.30
0.022
82.05
0.912
-37.14
S11
S21
S12
S22
TYPICAL CHARACTERISTICS (LNA)
LNA Scattering Parameter Table
(unit) (deg.) (unit) (deg.) (unit) (deg.) (unit) (deg.)
0.1 1.000 -2.22 2.147 176.00 0.009 48.67 0.949 -1.04
V
DD3
=2.7V, I
=3mA, Zo=50Ω
DD3
NJG1707PG1
nRECOMMENDED CIRCUIT (Tx-ANT1 PASSING)
PRECAUTIONS
Please connect resistors R1~R3 between VCTL1~VCTL3 terminals (Pin#4, 5, 6)
and GND or VDD only when CTL1~CTL3 voltage is required to clip to H or L level.
NJG1707PG1
n
RECOMMENDED PCB DESIGN
Board total loss (Capacitors, Connectors, and PCB)
Pass route 800MHz band
TX-ANT1 0.30
TX-EXT1 0.26
RX-ANT1 0.28
RX-ANT2 0.29
RX-EXT1 0.32
RX-EXT2 0.37
(dB)
Frequency
(MHz)
960
885
PARTS LIST
PARTS ID VALUE COMMENT
R1-R3
C1~3, C9 1000pF MURATA(GRM36)
C4, C5, C7, C8 22pF MURATA(GRM36)
C10, C12 10pF MURATA(GRM36)
C11 16pF MURATA(GRM36)
C13 4pF MURATA(GRM36)
L1 27nH TAIYO-YUDEN(HK1608)
L2 33nH TAIYO-YUDEN(HK1005)
L3 27nH TAIYO-YUDEN(HK1005)
L4 12nH TAIYO-YUDEN(HK1005)
L5 15nH TAIYO-YUDEN(HK1005)
L6 22nH TAIYO-YUDEN(HK1005)
PRECAUTIONS
[1] The bypass capacitors should be connected to the VDD, VSS terminals as close as possible
respectively.
[2] For good RF performance, the ground terminals should be directly connected to the ground
patterns and through-holes as close as possible by using relativity wide pattern.
100Ω
1005 Size
NJG1707PG1
n
• To waste this product, please obey the relating law of your country.
This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle
the industrial rights.
UNITS : mm
PACKAGE OUTLINE (FFP32-G1)
1pin INDEX
0.35
0.254±0.1
0.85±0.15
PCB : Ceramic
OVER COAT : Epoxy resin
0.10
0.30
0.30
0.17
0.5
0.5
0.365 0.27
2pin INDEX
3.5±0.1
0.20
LEAD SURFACE : Au
WEIGHT : 30mg
Cautions on using this product
This product contains Gallium-Arsenide (GaAs) which is a harmful material.
• Do NOT eat or put into mouth.
• Do NOT dispose in fire or break up this product.
• Do NOT chemically make gas or powder with this product.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
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