Datasheet N74F712-1N, N74F712AD, N74F711AD, N74F711-1N, N74F711-1D Datasheet (Philips)

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Page 1
 
74F711A, 74F711-1, 74F712A, 74F712-1
Multiplexers
Product specification IC15 Data Handbook
1990 Dec 13
INTEGRATED CIRCUITS
Page 2
74F71 1A/74F711–1/
74F712A/74F712–1
Multiplexers
74F711A Quint 2-to-1 Data Selector Multiplexer (3-State) 74F711-1 Quint 2-to-1 Data Selector Multiplexer with 30 Equivalent Output Termination Impedance (3-State) 74F712A Quint 3-to-1 Data Selector Multiplexer 74F712-1 Quint 3-to-1 Data Selector Multiplexer with 30
Equivalent Output Termination Impedance
2
1990 Dec 13 853-1368 01258
FEATURES for 74F711A/74F711-1
Consists of five 2-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
Output inverting/non-inverting option
30 termination impedance on each output – 74F711-1
Outputs sink 64mA (74F711A only)
FEATURES for 74F712A/74F712-1
Consists of five 3-to-1 Multiplexers
High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
Designed for address multiplexing of dynamic RAM and other
applications
30 termination impedance on each output – 74F712-1
Outputs sink 64mA (74F712A only)
DESCRIPTION
The 74F711A/74F711-1 consist of five 2-to-1 multiplexers designed for address multiplexing of dynamic RAMs and other multiplexing applications. The 74F711A has a common select (S) input, an Output Enable (OE
) input and an Output Inverting (INV) input to control the 3-State outputs. The outputs source 15mA and sink 64mA. The 74F71 1-1 is the same as the 74F711A except that is has a 30 termination impedance on each output to reduce line noise and the 3-State outputs sink 5mA.
When the inverting input (INV
) is Low, the input data path is
inverted.
To improve speed and noise immunity, V
CC
and GND side pins are
used. The 74F712A/74F712-1 consist of five 3-to1 multiplexers designed
for address multiplexing of dynamic RAMs and other multiplexing applications. The 74F712A has two select (S0, S1) inputs to determine which set of five inputs will be propagated to the five outputs. The outputs source 15mA and sink 64mA. The 74F712-1 is the same as the 74F712A except that it has a 30 termination impedance on each output to reduce line noise and the outputs sink 5mA.
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPL Y
CURRENT
(TOT AL)
74F711A 6.0ns 30mA 74F711-1 6.5ns 29mA 74F712A 6.5ns 25mA 74F712-1 6.5ns 25mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ± 10%
T
amb
= 0° C to +70°C
PKG DWG #
20-Pin Plastic DIP N74F711AN, N74F711-1N SOT146-1 24-Pin Plastic Slim
DIP (300 mil)
N74F712AN, N74F712-1N SOT222-1
20-Pin Plastic SOL N74F711AD, N74F711-1D SOT163-1 24-Pin Plastic SOL N74F712AD, N74F712-1D SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Dna, Dnb Data inputs 1.0/0.066 20µA/40µA S Select input 1.0/0.033 20µA/20µA
74F711A/
OE Output Enable input (active Low) 1.0/0.033 20µA/20µA
74F711-1
INV Output inverting input (active Low) 1.0/0.033 20µA/20µA Q0 - Q4 Data outputs for 74F711A 750/106.7 15mA/64mA Q0 - Q4 Data outputs for 74F711-1 750/8.33 15mA/5mA Dna, Dnb, Dnc Data inputs 1.0/0.066 20µA/40µA
74F712A/
S0, S1 Select inputs 1.0/0.033 20µA/20µA
74F712-1
Q0 - Q4 Data outputs for 74F712A 750/106.7 15mA/64mA Q0 - Q4 Data outputs for 74F712-1 750/8.33 15mA/5mA
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.
Page 3
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
3
PIN CONFIGURATION – 74F711A/74F711-1
D1a20 19 18 17 16 15 14 13 12 1110
9
8
7
6
5
4
3
2
1
D1b
D2a
D2b
V
CC
D3a
D3b
D4a
D4b
OE
D0a D0b
Q0
Q1
GND
Q2 Q3 Q4
S
INV
SF01215
PIN CONFIGURATION – 74F712A/74F712-1
24 23 22 21 20 19 18 17 16 15 14 1312
10 11
9
8
7
6
5
4
3
2
1
D0a D1a D2a
D3a
V
CC
D1b D2b
D3b D4b D4c
S0
S1 Q0 Q1
GND
Q3
Q4
D0c
D1c
Q2
D2c
D3c
D4a
D0b
SF01216
LOGIC SYMBOL – 74F711A/74F711-1
10SOE
D0a D0b D1a D1b D2a D2b D3a
Q1Q0
1 2 20 19 18 17 15 14 13 12
36
Q2 Q3
47
D3b
INV
9
11
V
CC
= Pin 16
GND = Pin 5
D4a D4b
Q4
8
SF01217
LOGIC SYMBOL – 74F712A/74F712-1
VCC = Pin 19 GND = Pin 6
2S0S1
D0a D0b D1a D1b D2a D2b D3a
Q1Q0
24 18 9 23 17 10 22 16 11 21
35
Q2 Q3
47
D3b
1
D4a D4b
Q4
8
D0c D1c D2c D3c
15 12 20 14 13
D4c
SF01218
LOGIC SYMBOL (IEEE/IEC) – 74F711A/74F711-1
SF01219
MUX
G
EN1
1 11 10
2
20 19
17 15 14
1
12
13
M
3
4
6
8
7
18
1
LOGIC SYMBOL (IEEE/IEC) – 74F712A/74F712-1
SF01220
MUX
G1 G2
1
2
18
9
23 17 10 22
24
11
16
3
4
5
8
7
15
12
20 14 13
21
Page 4
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
4
LOGIC DIAGRAM – 74F711A/74F711-1
11
10
9
1 2
20 19
18 17
15
14
OE
INV
S
D0a
D0b
D1a D1b
D2a D2b
D3a D3b
Q3
Q2
Q1
Q0
3
4
6
7
V
CC
= Pin 16
GND = Pin 5
13 12
D4a D4b
Q4
8
SF01221
FUNCTION TABLE – 74F711A/74F711-1
INPUTS OUTPUT
S INV OE Dna Dnb Qn
L L L Data a Data b Data a H L L Data a Data b Data b L H L Data a Data b Data a H H L Data a Data b Data b X X H X X Z
H = High voltage level L = Low voltage level X = Don’t care Z = High impedance “off” state
Page 5
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
5
LOGIC DIAGRAM – 74F712A/74F712-1
1
2
24 18
9
23 17 10
22 16
11
21 15 12
S0
S1
D0a D0b D0c
D1a D1b D1c
D2a D2b D2c
D3a D3b
D3c
V
CC
= Pin 19
GND = Pin 6
20 14 13
D4a D4b
D4c
Q0
Q1
Q2
Q3
Q4
3
4
5
7
8
SF01222
FUNCTION TABLE – 74F712A/74F712-1
INPUTS OUTPUT
S0 S1 Dna Dnb Dnc Qn
L L Data a Data b Data c Data a H L Data a Data b Data c Data b X H Data a Data b Data c Data c
H = High voltage level L = Low voltage level X = Don’t care
Page 6
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
6
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.
SYMBOL PARAMETER RATING UNIT
V
CC
Supply voltage –0.5 to +7.0 V
V
IN
Input voltage –0.5 to +7.0 V
I
IN
Input current –30 to +5 mA
V
OUT
Voltage applied to output in High output state –0.5 to +V
CC
V
pp
p
p
74F711A, 74F712A 96 mA
I
OUT
Current applied to output in Low output state
74F711-1, 74F712-1 10 mA
T
amb
Operating free-air temperature range 0 to +70 °C
T
stg
Storage temperature –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
LIMITS UNIT
SYMBOL
PARAMETER
MIN NOM MAX
V
CC
Supply voltage 4.5 5.0 5.5 V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level input voltage 0.8 V
I
IK
Input clamp current –18 mA
I
OH
High-level output current –15 mA
p
74F711A, 74F712A 64 mA
IOLLow-level output current
74F711-1, 74F712-1 5 mA
T
amb
Operating free-air temperature 0 70 °C
Page 7
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
7
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN TYP
2
MAX
±10%V
CC
2.4 V
p
VCC = MIN,
I
OH
= –
3mA
±5%V
CC
2.7 3.4 V
VOHHigh-level output voltage
V
IL
=
MAX
,
V
IH
= MIN
±10%V
CC
2.0 V
IH
I
OH
= –
15mA
±5%V
CC
2.0 V
74F711A/
±10%V
CC
0.38 0.55 V
V
O
L
Low-level output voltage
74F712A
only
VCC = MIN,
V
= MAX,
I
OL
=
MAX
±5%V
CC
0.42 0.55 V
OL
g
74F711-1/ 74F712-1
IL
,
VIH = MIN
IOL = 5mA ±10%V
CC
0.38 0.50 V
V
IK
Input clamp voltage VCC = MIN, II = I
IK
–0.73 –1.2 V
I
I
Input current at maximum input voltage
VCC = MAX, VI = 7.0V 100 µA
I
IH
High-level input current VCC = MAX, VI = 2.7V 20
µA
p
Others
–20 µA
IILLow-level input current
Dn only
V
CC
=
MAX, V
I
= 0.
5V
–40 µA
I
OZH
Off-state output current High-level voltage applied
74F711A/
VCC = MAX, VO = 2.7V 50
µA
I
OZL
Off-state output current Low-level voltage applied
74F711-1
only
VCC = MAX, VO = 0.5V –50 µA
I
OS
Short-circuit output current
3
74F711-1/ 74F712-1
VCC = MAX –60 –150 mA
I
O
Output current
4
74F711A/ 74F712A
VCC = MAX, VO = 2.25 V –60 –150 mA
I
CCH
25 35 mA
74F711A
I
CCL
VCC = MAX
33 46 mA
I
CCZ
27 40 mA
I
CCH
26 40 mA
Supply
74F711-1
I
CCL
VCC = MAX
33 45 mA
I
CC
curren
t
(total)
I
CCZ
28 45 mA
()
I
CCH
20 27 mA
74F712A
I
CCL
V
CC
=
MAX
30 40 mA
I
CCH
20 30 mA
74F712-1
I
CCL
V
CC
=
MAX
29 40 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I
OS
tests should be performed last.
4. I
O
is tested under conditions that produce current approximity one half of the true short-circuit output current (IOS).
Page 8
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
8
AC ELECTRICAL CHARACTERISTICS – 74F711A/74F711-1
LIMITS
Tm = +25°C
T
amb
= 0° C to +70°C
SYMBOL PARAMETER TEST CONDITION
amb
VCC = 5V
V
CC
= 5V ±
10%
C
= 50pF
,
UNIT
C
L
= 50pF,
R
L
=
500
C
L
=
50pF,
RL = 500
MIN TYP MAX MIN MAX
t
PLH
t
PHL
Propagation delay Dna, Dnb to Qn
Waveform 1, 2
2.5
2.5
5.0
4.0
7.5
7.0
2.0
2.0
8.0
7.5
ns ns
t
PLH
t
PHL
Propagation delay S to Qn
Waveform 1, 3
7.0
5.0
9.0
8.0
12.0
11.0
5.5
4.5
13.5
12.0
ns ns
t
PLH
t
PHL
Propagation delay INV to Qn
74F711A
Waveform 1, 3
6.0
4.0
9.0
8.0
12.5
11.0
5.0
3.5
14.0
11.5
ns ns
t
PZH
t
PZL
Output Enable time OE to Qn
Waveform 4 Waveform 5
2.5
2.5
4.0
4.5
6.5
7.0
2.0
2.0
7.0
7.5
ns ns
t
PHZ
t
PLZ
Output Disable time OE to Qn
Waveform 4 Waveform 5
2.5
3.0
4.0
5.0
7.0
8.0
2.0
2.5
8.0
8.5
ns ns
t
PLH
t
PHL
Propagation delay Dna, Dnb to Qn
Waveform 1, 2
3.0
2.0
4.5
4.5
7.5
7.5
2.0
2.5
9.0
8.0
ns ns
t
PLH
t
PHL
Propagation delay S, INV
to Qn
Waveform 1, 3
6.5
4.5
10.0
8.5
13.5
11.5
5.5
4.0
14.5
12.5
ns ns
t
PZH
t
PZL
Output Enable time OE
to Qn
74F711-1
Waveform 4 Waveform 5
2.5
3.0
4.5
5.0
7.5
7.5
2.0
2.5
9.0
8.0
ns ns
t
PHZ
t
PLZ
Output Disable time OE to Qn
Waveform 4 Waveform 5
2.0
3.5
4.5
5.5
7.0
8.5
2.0
3.0
8.0
9.5
ns ns
AC ELECTRICAL CHARACTERISTICS – 74F712A/74F712-1
LIMITS
Tm = +25°C
T
amb
= 0 to +70°C
SYMBOL PARAMETER TEST CONDITION
amb
VCC = 5V
V
CC
= 5V ±
10%
C
= 50pF,
UNIT
C
L
= 50pF,
R
L
=
500
C
L
=
50pF,
R
L
= 500
MIN TYP MAX MIN MAX
t
PLH
t
PHL
Propagation delay Dna, Dnb, Dnc to Qn
Waveform 1, 2
2.0
2.0
3.5
3.5
6.5
6.5
2.0
2.0
7.0
7.0
ns ns
t
PLH
t
PHL
Propagation delay S0, S1 to Qn
74F712A
Waveform 1
6.5
5.0
8.0
7.5
11.5
10.0
5.5
4.5
13.5
11.0
ns ns
t
PLH
t
PHL
Propagation delay Dna, Dnb, Dnc to Qn
Waveform 1, 2
2.0
2.0
4.0
4.0
7.0
7.0
2.0
2.0
7.5
7.5
ns ns
t
PLH
t
PHL
Propagation delay S0, S1 to Qn
74F712-1
Waveform 1
7.0
5.5
9.0
7.5
12.0
10.5
6.0
5.5
13.5
11.0
ns ns
Page 9
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
9
AC WAVEFORMS
For all waveforms, VM = 1.5V
V
M
V
M
V
M
V
M
t
PHL
t
PLH
Dna, Dnb,
Dnc, Sn
Qn
SF01223
Waveform 1. Propagation Delay for Non-Inverting Output
V
M
V
M
V
M
V
M
t
PLH
t
PHL
Q
n
Dna, Dnb,
Dnc, Sn
SF01224
Waveform 2. Propagation Delay for Inverting Output
V
M
V
M
t
PHL
t
PLH
INV
Qn
SF01225
Waveform 3. Propagation Delay for INV to Output
V
M
V
M
V
M
t
PHZ
t
PZH
VOH -0.3V
0V
OE
Qn
SF00343
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
V
M
V
M
V
M
t
PLZ
t
PZL
VOL +0.3V
Qn
OE
SF00344
Waveform 5. 3-State Output Enable Time to Low
Level and Output Disable Time from Low Level
Page 10
Philips Semiconductors Product specification
74F711A/74F71 1–1/
74F712A/74F712–1
Multiplexers
1990 Dec 13
10
TEST CIRCUIT AND WAVEFORMS
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE PULSE
POSITIVE PULSE
t
w
AMP (V)
0V
0V
t
THL (tf
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLHtTHL
1MHz 500ns
2.5ns 2.5ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for 3-State Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
t
THL (tf
)
t
TLH (tr
)
t
TLH (tr
)
AMP (V)
amplitude
3.0V
1.5V
V
M
R
L
7.0V
SF00777
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
SWITCH POSITION
Page 11
Philips Semiconductors Product specification
74F711A/74F71 1-1,
74F712A/74F712-1
Multiplexers
1990 Dec 13
11
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
Page 12
Philips Semiconductors Product specification
74F711A/74F71 1-1,
74F712A/74F712-1
Multiplexers
1990 Dec 13
12
DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1
Page 13
Philips Semiconductors Product specification
74F711A/74F71 1-1,
74F712A/74F712-1
Multiplexers
1990 Dec 13
13
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
Page 14
Philips Semiconductors Product specification
74F711A/74F71 1-1,
74F712A/74F712-1
Multiplexers
1990 Dec 13
14
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
Page 15
Philips Semiconductors Product specification
74F711A/74F71 1-1,
74F712A/74F712-1
Multiplexers
1990 Dec 13
15
NOTES
Page 16
Philips Semiconductors Product specification
74F711A/74F71 1-1,
74F712A/74F712-1
Multiplexers
yyyy mmm dd
16
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98 Document order number: 9397-750-05174
 
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
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