61.1.Features of the MSP 34x5G Family and Differences to MSPD
61.2.MSP 34x5G Version List
71.3.MSP 34x5G Versions and their Application Fields
82.Functional Description
92.1.Architecture of the MSP 34x5G Family
92.2.Sound IF Processing
92.2.1.Analog Sound IF Input
92.2.2.Demodulator: Standards and Features
102.2.3.Preprocessing of Demodulator Signals
102.2.4.Automatic Sound Select
102.2.5.Manual Mode
2
122.3.Preprocessing for SCART and I
122.4.Source Selection and Output Channel Matrix
122.5.Audio Baseband Processing
122.5.1.Automatic Volume Correction (AVC)
122.5.2.Loudspeaker Outputs
122.5.3.Quasi-Peak Detector
132.6.SCART Signal Routing
132.6.1.SCART DSP In and SCART Out Select
132.6.2.Stand-by Mode
2
132.7.I
S Bus Interface
142.8.ADR Bus Interface
142.9.Digital Control I/O Pins and Status Change Indication
142.10.Clock PLL Oscillator and Crystal Specifications
S Input Signals
153.Control Interface
2
153.1.I
C Bus Interface
153.1.1.Internal Hardware Error Handling
163.1.2.Description of CONTROL Register
163.1.3.Protocol Description
2
173.1.4.Proposals for General MSP 34x5G I
C Telegrams
173.1.4.1.Symbols
173.1.4.2.Write Telegrams
173.1.4.3.Read Telegrams
173.1.4.4.Examples
2
173.2.Start-Up Sequence: Power-Up and I
C-Controlling
173.3.MSP 34x5G Programming Interface
173.3.1.User Registers Overview
203.3.2.Description of User Registers
213.3.2.1.STANDARD SELECT Register
213.3.2.2.Refresh of STANDARD SELECT Register
213.3.2.3.STANDARD RESULT Register
2
233.3.2.4.Write Registers on I
253.3.2.5.Read Registers on I2C Subaddress 11
263.3.2.6.Write Registers on I2C Subaddress 12
C Subaddress 10
hex
hex
hex
2Micronas
Page 3
PRELIMINARY DATA SHEET
Contents, continued
PageSectionTitle
MSP 34x5G
363.3.2.7.Read Registers on I2C Subaddress 13
373.4.Programming Tips
373.5.Examples of Minimum Initialization Codes
373.5.1.B/G-FM (A2 or NICAM)
373.5.2.BTSC-Stereo
373.5.3.BTSC-SAP with SAP at Loudspeaker Channel
383.5.4.FM-Stereo Radio
383.5.5.Automatic Standard Detection
383.5.6.Software Flow for Interrupt driven STATUS Check
404.Specifications
404.1.Outline Dimensions
424.2.Pin Connections and Short Descriptions
454.3.Pin Description
474.4.Pin Configurations
514.5.Pin Circuits
534.6.Electrical Characteristics
534.6.1.Absolute Maximum Ratings
544.6.2.Recommended Operating Conditions
544.6.2.1.General Recommended Operating Conditions
544.6.2.2.Analog Input and Output Recommendations
554.6.2.3.Recommendations for Analog Sound IF Input Signal
564.6.2.4.Crystal Recommendations
574.6.3.Characteristics
574.6.3.1.General Characteristics
584.6.3.2.Digital Inputs, Digital Outputs
594.6.3.3.Reset Input and Power-Up
604.6.3.4.I
614.6.3.5.I
634.6.3.6.Analog Baseband Inputs and Outputs, AGNDC
644.6.3.7.Sound IF Input
644.6.3.8.Power Supply Rejection
654.6.3.9.Analog Performance
684.6.3.10.Sound Standard Dependent Characteristics
2
C Bus Characteristics
2
S-Bus Characteristics
hex
725.Appendix A: Overview of TV Sound Standards
725.1.NICAM 728
735.2.A2 Systems
745.3.BTSC-Sound System
745.4.Japanese FM Stereo System (EIA-J)
755.5.FM Satellite Sound
755.6.FM-Stereo Radio
766.Appendix B: Manual/Compatibility Mode
766.1.Demodulator Write and Read Registers for Manual/Compatibility Mode
776.2.DSP Write and Read Registers for Manual/Compatibility Mode
786.3.Manual/Compatibility Mode: Description of Demodulator Write Registers
786.3.1.Automatic Switching between NICAM and Analog Sound
Micronas3
Page 4
MSP 34x5GPRELIMINARY DATA SHEET
Contents, continued
PageSectionTitle
786.3.1.1.Function in Automatic Sound Select Mode
786.3.1.2.Function in Manual Mode
806.3.2.A2 Threshold
806.3.3.Carrier-Mute Threshold
816.3.4.Register AD_CV
826.3.5.Register MODE_REG
846.3.6.FIR-Parameter, Registers FIR1 and FIR2
846.3.7.DCO-Registers
866.4.Manual/Compatibility Mode: Description of Demodulator Read Registers
866.4.1.NICAM Mode Control/Additional Data Bits Register
866.4.2.Additional Data Bits Register
866.4.3.CIB Bits Register
876.4.4.NICAM Error Rate Register
876.4.5.PLL_CAPS Readback Register
876.4.6.AGC_GAIN Readback Register
876.4.7.Automatic Search Function for FM-Carrier Detection in Satellite Mode
886.5.Manual/Compatibility Mode: Description of DSP Write Registers
886.5.1.Additional Channel Matrix Modes
886.5.2.Volume Modes of SCART1 Output
886.5.3.FM Fixed Deemphasis
886.5.4.FM Adaptive Deemphasis
886.5.5.NICAM Deemphasis
896.5.6.Identification Mode for A2 Stereo Systems
896.5.7.FM DC Notch
896.6.Manual/Compatibility Mode: Description of DSP Read Registers
896.6.1.Stereo Detection Register for A2 Stereo Systems
896.6.2.DC Level Register
906.7.Demodulator Source Channels in Manual Mode
906.7.1.Terrestric Sound Standards
906.7.2.SAT Sound Standards
906.8.Exclusions of Audio Baseband Features
906.9.Compatibility Restrictions to MSP 34x5D
927.Appendix D: Application Information
927.1.Phase Relationship of Analog Outputs
937.2.Application Circuit
948.Appendix E: MSP 34x5G Version History
949.Data Sheet History
License Notice:
“Dolby Pro Logic” is a trademark of Dolby Laboratories.
Supply of this implementation of Dolby Technology does not convey a license nor imply a right under any patent, or any other industrial or intellectual property right of Dolby Laboratories, to use this implementation in any finished end-user or ready-to-use final product. Companies planning to
use this implementation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products.
4Micronas
Page 5
PRELIMINARY DATA SHEETMSP 34x5G
Multistandard Sound Processor Family
Release Note: Revision bars indicate significant
changes to the previous edition. The hardware and
software description in this document is valid for
the MSP 34x5G version B8 and following versions.
1. Introduction
The MSP 34x5G family of single-chip Multistandard
Sound Processors covers the sound processing of all
analog TV standards worldwide, as well as the NICAM
digital sound standards. The full TV sound processing,
starting with analog sound IF signal-in, down to processed analog AF-out, is performed in a single chip.
Figure 1–1 shows a simplified functional block diagram
of the MSP 34x5G.
These TV sound processing ICs include versions for
processing the multichannel television sound (MTS)
signal conforming to the standard recommended by
the Broadcast Television Systems Committe e (BTSC).
The DBX noise reduction, or alternatively, Micronas
Noise Reduction (MNR) is performed alignment free.
Other processed standards are the Japanese FM-FM
multiplex standard (EIA-J) and the FM-Stereo-Radio
standard.
Current ICs have to perform adjustment p rocedures in
order to achieve good stereo separatio n for BTSC and
EIA-J. The MSP 34x5G has optimum stereo performance without any adjustments.
All MSP 34xxG versions are pin compatible to the
MSP 34xxD. Only minor modifications are necessary
to adapt a MSP 34xxD controlling software to the
MSP 34xxG. The MSP 34x5G further simplifies controlling software. St andard selection requi res a single
2
C transmission only.
I
Note: The MSP 34x5G version has reduced control
registers and less functional pins. The remaining registers are software-compatible to the MSP 34x0G. The
pinning is compatible to the MSP 34x0G.
The MSP 34x5G has built-in automatic functions: The
IC is able to detect the actual sound standard automatically (Automatic Standard Detection). Furthermore,
pilot levels and identification sign als can be evaluated
internally with subsequent switching between mono/
stereo/bilingual; no I
2
C interaction is ne cessar y (Auto-
matic Sound Selectio n) .
The MSP 34x5G can handle very high FM deviation s
even in conjunction with NICAM processing. This is
especially impor tant for the introduction of NICAM in
China.
The ICs are produced in submicron CMOS technology.
The MSP 34x5G is available in the following packages:
PSDIP64, PSDIP52, PMQFP44, PLQFP64, and
PQFP80.
Sound IF1
I2S1
I2S2
SCART1
SCART2
MONO
SCART
DSP
Input
Select
De-
modulator
ADC
Pre-
processing
Prescale
Prescale
Fig. 1–1: Simplified functional block diagram of MSP 34x5G
Loud-
speaker
Sound
Processing
Source Select
DAC
DACADC
SCART
Output
Select
Loudspeaker
I2S
SCART1
Micronas5
Page 6
MSP 34x5GPRELIMINARY DATA SHEET
1.1. Features of the MSP 34x5G Family and Differences to MSPD
Feature (New features not available for MSPD are shaded gray. )3405341534253445 34553465
Standard Selection with single I
Automatic Standard Detection of terrestrial TV standardsXXXXXX
2
C transmissionXXXXXX
Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS
Automatic Carrier Mute functionXXXXXX
Interrupt output programmable (indicating status change)
Loudspeaker channel with volume, balance, bass, treble, loudnessXXXXXX
AVC: Automatic Volume CorrectionXXXXXX
Spatial effect for loudspeaker channelXXXXXX
Two Stereo SCART (line) inputs, one Mono input; one Stereo SCART outputsXXXXXX
Complete SCART in/out switching matrixXXXXXX
2
S inputs; one I2S outputXXXXXX
Two I
All analog Mono sound carriers including AM-SECAM L
All analog FM-Stereo A2 and satellite standards XXX
All NICAM standardsXX
Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM
Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification) XXXX
ASTRA Digital Radio (ADR) together with DRP 3510AXXX
Demodulation of the BTSC multiplex signal and the SAP channel
Alignment free digital DBX noise reduction for BTSC Stereo and SAP
XXXXXX
XXXXXX
XXXXXX
XX
XXX
XX
Alignment free digital Micronas Noise Reduction (MNR) for BTSC Stereo and SAP
BTSC stereo separation (MSP 3425/45G also EIA-J) significantly better than spec.
SAP and stereo detection for BTSC system
Korean FM-Stereo A2 standardXXXXX
Alignment-free Japanese standard EIA-J
Demodulation of the FM-Radio multiplex signal
X
XXX
XXX
XXX
XXX
1.2. MSP 34x5G Version List
VersionStatusDescription
MSP 3405GavailableFM Stereo (A2) Version
MSP 3415GavailableNICAM and FM Stereo (A2) Version
MSP 3425GavailableNTSC Version (A2 Korea, BTSC with Micronas Noise Reduction (MNR), Japanese EIA-J system)
MSP 3445GavailableNTSC Version (A2 Korea, BTSC with DBX noise reduction, Japanese EIA-J system)
MSP 3455GavailableGlobal Stereo Version (all sound standards)
MSP 3465GavailableGlobal Mono Vers io n (all sound standards)
6Micronas
Page 7
PRELIMINARY DATA SHEETMSP 34x5G
1.3. MSP 34x5G Versions and their Application Fields
Table 1–1 provides an overview of TV sound standards
that can be processed by the MSP 34x5G family. In
addition, the MSP 34x5G is able to handle the FMRadio standard. With the MSP 34x5G, a complete
multimedia receiver covering all TV sound standards
together with te rrestr ial/ cable and satel lite radio sou nd
can be built; even ASTRA Digital Radio can be processed (with a DRP 3510A coprocessor).
Table 1–1: TV Stereo Sound Standards covered by the MSP 34x5G IC Family (details see Appendix A)
MSP VersionTV-
3405
3405
3405
3415
System
B/G
L6.5/5.85AM-Mono/NICAMSECAM-LFrance
I6.0/6.552FM-Mono/NICAMPALUK, Hong Kong
3465All standards as above, but Mono demodulation only.
SAW Filter
Tuner
Composite
Video
4.5FM-FM (EIA-J) NTSCJapan
4.5BTSC-Stereo + SAPNTSC, PALUSA, Argentina
33 34 39 MHz4.5 9 MHz
Sound
IF
Mixer
1
2
2
Vision
Demodulator
SCART
Inputs
Mono
SCART1
SCART2
MSP 34x5G
2
I
S1ADRI2S2
2
SCART1
Loudspeaker
SCART Output
Dolby
Pro Logic
Processor
DPL 351xA
ADR
Decoder
DRP 3510A
Fig. 1–2: Typical MSP 34x5G application
Micronas7
Page 8
8Micronas
ANA_IN1+
ADR-Bus
Interface
AGC
A
D
Standard Selection
DEMODULATOR
(incl. Carrier Mute)
Decoded
Standards:
− NICAM
− A2
− AM
− BTSC
− EIA-J
− SAT
− FM-Radio
Deemphasis:
50/75 µs,
J17
DBX/MNR
Panda1
Deemphasis
J17
Standard
and Sound
Detection
FM/AM
Prescale
(0E
NICAM
Prescale
(10
I2C
Read
Register
Sound Select
)
hex
)
hex
Automatic
FM/AM
Stereo or A/B
Stereo or A
Stereo or B
2. Functional Description
0
1
3
Loud-
speaker
Channel
Matrix
(08
AVC
)
hex
Bass/
Treble
)
(02
hex
)
hex
)
(03
hex
Loud-
Σ
ness
(04
hex
Spatial
Effects
)(05
)(01
hex
Balance
Volume
)
(00
hex
D
)(29
hex
DACM_L
A
DACM_R
MSP 34x5GPRELIMINARY DATA SHEET
Beeper
4
(14
)
hex
I2S_DA_IN1
I2S_DA_IN2
I2S
Interface
I2S
Interface
I2S1
Prescale
(16
I2S2
5
)
hex
Source Select
6
I2S
Channel
Matrix
(0B
I2S
Interface
)
hex
Prescale
(12
)
hex
SCART
A
D
Prescale
2
(0D
)
hex
Quasi-Peak
Channel
Matrix
(0C
hex
SCART1
Channel
Matrix
(0A
hex
Quasi-Peak
Detector
)
Volume
)(07
)
hex
I2C
Read
Register
D
A
(19
(1A
SCART DSP Input Select
(13
)
hex
SC1_IN_L
SC1_IN_R
SC2_IN_L
SC2_IN_R
MONO_IN
ig. 2–1: Signal flow block diagram of the MSP 34x5G (input and output names correspond to pin names).
I2S_DA_OUT
)
hex
)
hex
SCART1_L/R
SC1_OUT_L
SC1_OUT_R
SCART Output Select
)
(13
hex
Page 9
PRELIMINARY DATA SHEETMSP 34x5G
2.1. Architecture of the MSP 34x5G Family
Fig. 2–1 on page 8 shows a simplified block diagram of
the IC. The block diagram contains all features of the
MSP 3455G. Other members of the MSP 34x5G family
do not have the complete set of features: The demodulator handles only a subset of the standards presented
in the demodulator block; NICAM processing is only
possible in the MSP 3415G and MSP 3455G (see
dashed block in Fig. 2–1).
2.2. Sound IF Processing
2.2.1. Analog Sound IF Input
The input pins ANA_ IN1+ and ANA _IN− offer the possibility to connect sound IF (SIF) sources to the
MSP 34x5G. The analog-to-digital conversion of the
sound IF signal is done by an A/D-conver ter. An analog automatic gain circuit (AGC) allows a wide range of
input levels. The high-pass filter formed by the coupling capacitor at pin ANA_IN1+ (see Section 7.
“Appendix D: Application Information” on page 92) is
sufficient in most cases to suppress video components. Some combinations of SAW filters and sound IF
mixer ICs, however, show large picture components on
their outputs. In this case, further filtering is recommended.
BTSC-Mono + SAP: Detection and FM demodulation
of the aural carrier resulting in the MTS/MPX signal.
Detection and evaluation of the pilot car rier, detection
and FM demodulat ion of the SA P-sub carr ier. Processing of the DBX noise reduction or Micronas Noise
Reduction (MNR).
Japan Stereo: Detection and FM demodulation of the
aural carrier resulting in the MPX signal. Demodulation
and evaluation of the identification signal and FM
demodulation of the (L-R)-carrier.
FM-Satellite Sound: Demodulation of one or two FM
carriers. Processi ng of high-deviation mono or na rrow
bandwidth mono, stereo, or bilingual satellite sound
according to the ASTRA specification.
FM-Stereo-Radio: Detection and FM demodulation of
the aural carrier resu lting in the MPX si gnal. Detecti on
and evaluation of the pilot carrier and AM demodulation of the (L-R)-carrier.
The demodulator blocks of all MSP 34x5G versions
have identical user interfaces. Even completely different systems like the BTSC and NICAM systems are
controlled the same way. Standards are selected by
means of MSP Standard Cod es. Automatic processes
handle standard detection and identification without
controller interaction. The key features of the
MSP 34x5G demodulator blocks are
2.2.2. Demodulator: Standards and Features
The MSP 34x5G is able to demodulate all TV sound
standards worldwide inc luding the digital NICAM system. Depending on the MSP 34x5G version, the following demodulation modes can be performed:
A2-Systems: Detectio n and demodu lation of two separate FM carriers ( FM1 and FM2), demodulation and
evaluation of the identification signal of carrier FM2.
NICAM-Systems: Demodulation and decoding of the
NICAM carrier, detection and demodulation of the analog (FM or AM) carrier. For D/K-NICAM, the FM carrier
may have a maximum deviation of 384 kHz.
Very high deviation FM-Mono: Detection and robust
demodulation of on e FM carr ier with a maximum deviation of 540 kHz.
BTSC-Stereo: Detection and FM demodulation of the
aural carrier resulting in the MTS/MPX signal. Detection and evaluation of the pilot carr ier, AM demodulation of the (L-R)-carr ier and detec tion of the SA P subcarrier. Processing of the DBX noise reduction or
Micronas Noise Reduction (MNR).
Standard Selection: The controlling of the de modula tor is minimized: All parameters, such as tuning frequencies or filter bandwidth, are adjusted automatically by transmitting one single value to the
STANDARD SELECT reg ister. For all standards, specific MSP standard codes are defined.
Automatic Standard Detection: If the TV sound standard is unknown, the MSP 34x5G can automatically
detect the actual standard, switch to that standard, and
respond the actual MSP standard code.
Automatic Carrier Mute: To prevent noise effects or
FM identification problems in the absence of an FM
carrier, the MSP 34x5G offers a configurable carrier
mute feature, which is activated automatically if th e T V
sound standard is selected by means of the STANDARD SELECT register. If no FM carrier is detected at
one of the two MSP demodulator channels, the corresponding demodulator output is muted. This is indicated in the STATUS register.
Micronas9
Page 10
MSP 34x5GPRELIMINARY DATA SHEET
2.2.3. Preprocessing of Demodulator Signals
The NICAM signals must be processed by a deemphasis filter and adjusted in level. The analog demodulated signals must b e processed by a deemphas is filter, adjusted in level, and dematrixed. The correct
deemphasis filters are already selected by setting th e
standard in the STANDARD SELECT register. The
level adjustment has to be done by means of the FM/
AM and NICAM prescale registers. The necessary
dematrix function depends on the selected sound
standard and the actual broadcasted sound mode
(mono, stereo, or bilingual). It can be manually set by
the FM Matrix Mode register or automatically by the
Automatic Sound Selection.
2.2.4. Automatic Sound Select
In the Automatic Sound Select mode, the dematrix
function i s aut om a t ica l ly s el ec t ed ba se d on th e id ent if i cation information in the ST ATUS register. No I
2
C interaction is necessary when the broadcasted sound
mode changes (e.g. from mono to stereo).
The demodulator sup ports the identification ch eck by
switching between mono-compatible standards (standards that have the same FM-Mon o carrier) automatically and non-audible. If B/G-FM or B/G-NICAM is
selected, the MSP will switch between these standards. The same action is performed for the standards:
D/K1-FM, D/K2-FM, D/K3-FM and D/K-NICAM.
Switching is only d one in th e abse nce of a ny ste reo or
bilingual identification. If identification is found, the
MSP keeps the detected standard.
In case of high bit-error rates, the MSP 34x5G automatically falls back from digital NI CAM sound to analog FM or AM mono.
– “Stereo or A” channel: Analog or digital mono
sound, stereo if available. In case of bilingual broadcast, it contains language A (on left and right).
– “Stereo or B” channel: Analog or digital mono
sound, stereo if available. In case of bilingual broadcast, it contains language B (on left and right).
Fig. 2–2 and Table 2–2 show the source channel
assignment of the demodulated signals in case of
Automatic Sound Select mode for all sound standards.
Note: The analog primar y input channel contains the
signal of the mono FM/AM c arrie r or the L+R sig nal of
the MPX carrier. The secondary input channel contains the signal of the 2nd FM c arrier, the L-R signal of
the MPX carrier, or the SAP signal.
Source Select
LS Ch.
Matrix
Output-Ch.
matrices
must be set
once to
stereo.
primary
channel
secondary
channel
NICAM A
NICAM B
FM/AM
Prescale
NICAM
Prescale
Automatic
Sound
Select
FM/AM
Stereo or A/B
Stereo or A
Stereo or B
0
1
3
4
Fig. 2–2: Source channel assignment of demodulated
signals in Automatic Sound Select Mode
2.2.5. Manual Mode
Fig. 2–3 shows the source channel assignment of
demodulated signals in ca se of manual mode. If manual mode is required, more information can be found in
Section 6.7. “Demodulator Source Channels in Manual
Mode” on page 90.
Table 2–1 summarizes all actions that take place when
Automatic Sound Select is switched on.
To provide more fl exibility, the Automatic Sound Select
block prepares four different source channels of
demodulated sound (Fi g. 2–2). By choosing one of th e
four demodulator channels, the p referred sound mode
can be selected for each of the output chann els (loudspeaker, headphone, etc.). This is done by means of
primary
channel
secondary
channel
NICAM A
NICAM B
FM/AM
Prescale
NICAM
Prescale
FM-Matrix
FM/AM
NICAM
(Stereo or A/B)
0
1
Source Select
LS Ch.
Matrix
Output-Ch.
matrices
must be set
according to
the standard.
the Source Select registers.
The following source chan nels of demodulated sound
are defined:
Fig. 2–3: Source channel assignment of demodulated
signals in Manual Mode
– “FM/AM” channel: Analog mono sound, stereo if
available. In case of NICAM, analog mono only
(FM or AM mono).
– “Stereo or A/B” channel: Analog or digital mono
sound, stereo if available. In case of bilingual broadcast, it contains both languages A (left) and B
(right).
10Micronas
Page 11
PRELIMINARY DATA SHEETMSP 34x5G
Table 2–1: Performed actions of the Automatic Sound Selection
Selected TV Sound StandardPerformed Actions
B/G-FM, D/K-FM, M-Korea,
and M-Japan
B/G-NICAM, L-NICAM, I-NICAM,
D/K-NICAM
Evaluation of the identification signal and automatic switching to mono, stereo, or bilingual. Preparing four
demodulator source channels according to Table 2–2.
Evaluation of NICAM-C-bits and automatic switching to mono, stereo, or bilingual. Preparing four
demodulator source channels according to Table 2–2.
In case of bad or no NICAM reception, the MSP switches automatically to FM/AM mono and switches
back to NICAM if possible. A hys teresis prevents periodical switching.
B/G-FM, B/G-NICAM
or
D/K1-FM, D/K2-FM, D/K3-FM,
and D/K-NICAM
Automatic searching for stereo/bilingual-identification in case of mono transmission. Automatic and nonaudible changes between Dual-FM and FM-NICAM standards while listening to the basic FM-mono sound
carrier.
Example: If starting with B/G-FM-Stereo, there will be a periodical alternation to B/G-NICAM in the
absence of FM-Stereo/Bilingual or NICAM-identification. Once an identification is detected, the MSP
keeps the corresponding standard.
BTSC-STEREO, FM RadioEvaluation of the pilot signal and automatic switching to mono or stereo. Preparing four demodulator
source channels according to Table2–2. Detection of the SAP carrier.
M-BTSC-SAPIn the absence of SAP, the MSP switches to BTSC-stereo if available. If SAP is detected, the MSP
switches automatically to SAP (see Table 2–2).
Table 2–2: Sound modes for the demodulator source channels with Automatic Sound Select
Source Channels in Automatic Sound Select Mode
Broadcasted
Sound
Standard
Selected
MSP Standard
3)
Code
Broadcasted
Sound Mode
FM/AM
(source select: 0)
Stereo or A/B
(source select: 1)
Stereo or A
(source select: 3)
Stereo or B
(source select: 4)
M-Korea
B/G-FM
D/K-FM
M-Japan
B/G-NICAM
L-NICAM
I-NICAM
D/K-NICAM
D/K-NICAM
(with high
deviation FM)
02
1)
03, 08
04, 05, 07, 0B
30
2)
08, 03
09
0A
2)
, 05
2)
0B, 04
0C, 0D
MONO MonoMonoMonoMono
1)
STEREOStereoStereoStereoStereo
BILINGUAL:
Languages A and BRight = B
NICAM not available or
analog Monoanalog Monoanalog Monoanalog Mono
Left = A
Right = B
AB
error rate too high
MONO analog MonoNICAM MonoNICAM MonoNICAM Mono
STEREOanalog MonoNICAM StereoNICAM StereoNICAM Stereo
BILINGUAL:
Languages A and B
analog MonoLeft = NICAM A
Right = NICAM B
NICAM ANICAM B
20, 21MONO MonoMonoMonoMono
STEREOStereoStereoStereoStereo
20MONO + SAPMonoMonoMonoMono
BTSC
21MONO + SAPLeft = Mono
STEREO + SAPStereoStereoStereoStereo
Right = SAP
STEREO + SAPLeft = Mono
Right = SAP
Left = Mono
Right = SAP
Left = Mono
Right = SAP
MonoSAP
MonoSAP
FM Radio40MONO MonoMonoMonoMono
STEREOStereoStereoStereoStereo
1)
The Automatic Sound Select process will automatically switch to the mono compatible analog standard.
2)
The Automatic Sound Select process will automatically switch to the mono compatible digital standard.
3)
The MSP Standard Codes are defined in Table 3–7 on page 20.
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MSP 34x5GPRELIMINARY DATA SHEET
2.3. Preprocessing for SCART and
2
S Input Signals
I
2
The SCART and I
level by means of the SCART and I
S inputs need only be adjusted in
2
S prescale re gis-
ters.
2.4. Source Selection and Output Channel Matrix
The Source Selec tor makes it possible to di stribute all
source signals (o ne of the demodulator source ch annels or SCART) to the desired out put channels (loudspeaker, etc.). All input and output signals can be processed simultaneously. Each source channel is
identified by a unique source address.
For each output channel, the soun d mode can be set
to sound A, sound B, stereo, or mono by means of the
output channel matrix.
If Automatic Sound Select is on, the output channel
matrix can stay fixed to stereo (transparent) for demodulated signals.
2.5. Audio Baseband Processing
2.5.1. Automatic Volume Correction (AVC)
Different sound sources (e.g. terrest rial ch annels, SAT
channels, or SCART) fairly often do not have the same
volume level. Advertisements during movies usually
have a higher volume level than the movie itself. This
results in annoying volume chang es. The AVC solves
this problem by equalizing the volume level.
To prevent clipping, th e AVC’s gain decreases quickly
in dynamic boost conditions. To suppress oscillation
effects, the gain increases rather slowly for low level
inputs. The decay time is programmable by means of
the AVC register (see page 30).
For input signals ranging from −24 dBr to 0 dBr, the
AVC maintains a fixed output level of −18 dBr . Fig. 2–4
shows the AVC output level versus its input level. For
prescale and volume registers set to 0 dB, a level of
0 dBr corresponds to full scale input/output. This is
– SCART input/output 0 dBr = 2.0 V
– Loudspeaker output 0 dBr = 1.4 V
rms
rms
output level
[dBr]
−18
−24
input level
−30−24−18−12−6
0
[dBr]
Fig. 2–4: Simplified AVC characteristics
2.5.2. Loudspeaker Outputs
The following baseband features are implemented in
the loudspeaker output channels: bass/treble, loudness, balance, and volume. A square wave beeper can
be added to the loudspeaker channel.
2.5.3. Quasi-Peak Detector
The quasi-peak r eadout register can be used to read
out the quasi-peak level of any input source. The feature is based on following filter time constants:
attack time: 1.3 ms
decay time: 37 ms
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PRELIMINARY DATA SHEETMSP 34x5G
2.6. SCART Signal Routing
2.6.1. SCART DSP In and SCART Out Select
The SCART DSP Input Select and SCART Output
Select blocks include full matr ix switching facilities. To
design a TV set with two pairs of SCART-inputs and
one pair of SCART-outputs, no external switching
hardware is required. The switches are controlled by
the ACB user register (see page 34).
2.6.2. Stand-by Mode
If the MSP 34x5G is switched off by first pulling
STANDBYQ low and th en (a fter >1 µs delay) switching
off DVSUP and AVSUP, but keeping AHVSUP
(‘Stand-by’-mode), the SCART switches maintain
their position and function. This allows the copying
from selected SCART-inp uts to SCART-outputs in the
TV set’s stand-by mode.
In case of power on or startin g from stand-by (switching on the DVSUP and AVSUP, RESETQ going high
2 ms later), all internal re giste rs except th e ACB register (page 34) are reset to the default configuration (see
Table 3–5 on p age 18). The reset position of th e ACB
register becomes active after the fir st I
2
C transmission
into the Baseband Processing part. By transmitting the
ACB register first, the reset state can be redefined.
2
S Bus Interface
2.7. I
The MSP 34x5G has a synchronous master/slave
input/output interface running on 32 kHz.
The interface accepts two formats:
2
S_WS changes at the word boundary
1. I
2
2. I
S_WS changes one I2S-cloc k period before the
word boundaries.
2
S options are set by means of the MODUS and
All I
the I2S_CONFIG registers.
2
S bus interface consists of five pins:
The I
– I 2 S _ D A _ I N 1 , I 2 S _ D A _ I N 2 :
2
I
S serial data input: 16, 18....32 bits per sample
– I2S_DA_OUT:
2
I
S serial data output: 16, 18...32 bits per sample
– I2S_CL:
2
I
S serial clock
– I2S_WS:
2
I
S word strobe signal defines the left and right
sample
If the MSP 34x5G serves as the master on the I
2
interface, the clock and word strobe lines are driven by
the IC. In this mode, only 1 6 o r 32 bi ts per sample can
be selected. In slave mode, these lines are input to the
IC and the MSP clock is synchronized to 576 times the
I2S_WS rate (32 kHz) . NICAM operation is n ot possible in slave mode.
S
2
S timing diagram is shown in Fig. 4–28 on
An I
page 62.
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MSP 34x5GPRELIMINARY DATA SHEET
2.8. ADR Bus Interface
For the ASTRA Digital Radio System (ADR), the
MSP 3405G, MSP 3415G , and MSP 3455 G performs
preprocessing such as carrier selection and filtering.
Via the 3-line ADR-bus, the resulting signals are transferred to the DRP 3510A coprocessor, where the
source decoding i s performed. To be prep ared for an
upgrade to ADR with an a ddi ti onal D RP board, the following lines of MSP 34x5G should be provided on a
feature connector:
For more details, please refer to the DRP 3510A data
sheet.
2.9. Digital Control I/O Pins and
Status Change Indication
2.10.Clock PLL Oscillator and
Crystal Specifications
The MSP 34x5G derives all internal system clocks
from the 18.432 MHz oscillator. In NICAM or in I
2
SSlave mode, the clock is phase-locked to the corresponding source. Therefore, it is not possible to use
NICAM and I
2
S-Slave mode at the same time.
For proper performance, the MSP clock oscillator
requires a 18.432-MHz crystal. Note, that for the
phase-locked mode (NICAM, I
2
S slave), crystals with
tighter tolerance are required.
The static level of the digital input/output pins
D_CTR_I/O_0/1 is switchable between HIGH and
LOW via the I
(see page 34). This enables the controlling of external
hardware switches or other devices via I
2
C-bus by means of the ACB register
2
C-bus.
The digital input/ou tput pins can b e set to high imp edance by means of the MODUS register (see page 23).
In this mode, the pins can be used as input. The current state can be rea d ou t of the S TATUS register (see
page 25).
Optionally, the pin D_CTR_I/O_1 can be used as an
interrupt reque st signal to the co ntrol ler, indicating any
changes in the read register STATUS. This makes polling unnecessary; I
2
C-bus interactions are reduced to a
minimum (see STATUS register on page 25 and
MODUS register on page 23).
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PRELIMINARY DATA SHEETMSP 34x5G
3. Control Interface
2
C Bus Interface
3.1. I
The MSP 34x5G is controlled via the I
2
C bus slave
interface.
The IC is selected by transmitting one of the
MSP 34x5G device addresses. In order to allow up to
three MSP ICs to be connected to a single bus, an
address select pin (ADR_SEL) has been implemented.
With ADR_SEL pulled to high, low, or left open, the
MSP 34x5G responds to different device addresses. A
device address pair is defined as a write address and a
read address (see Table 3–1).
Writing is done by sending the write device address,
followed by the subaddress byte, two address bytes,
and two data bytes.
Reading is done by sending the wr ite device address,
followed by the subaddress byte and two address
bytes. Without sending a stop c ondi tion, r ea din g of t he
addressed data is completed by sending the device
read address and reading two bytes of data.
2
Refer to Section 3.1.3. for the I
Section 3.4. “Programming T ips” on page 37for proposals of MSP 34x5G I
2
C telegrams. See Table 3–2
C bus protocol and to
for a list of available subaddresses.
response time is about 0.3 ms. If the MSP cannot
accept another byte of data (e.g. while servicing an
internal int err upt), it ho lds th e clock line I2C_CL l ow to
force the transmitter into a wait state. The I
Master must read back the clock line to detect when
the MSP is ready to r ecei ve the next I
2
C transmission.
2
C Bus
The positions within a transmission where this may
happen are indicated by ’Wait’ in Section 3.1.3. The
maximum wait period of the MSP during normal operation mode is less than 1 ms.
3.1.1. Internal Hardware Error Handling
In case of any hardware problems (e.g. interruption of
the power supply of the MSP), the MSP’s wait period is
extended to 1.8 ms. After this time period elapses, the
MSP releases data and clock lines.
Indication and solving the error status:
To indicate the error status, the remaining acknowledge bits of the actual I
Additionally, bit[14] of CONTROL is set to one. The
MSP can then be r eset via the I
2
C-protocol will be left high.
2
C bus by transmitting
the RESET condition to CONTROL.
Indication of reset:
Besides the possibility of hardware reset, the MSP can
also be reset by means of the RE SET bit in the CONTROL register by the controller via I
Due to the architecture o f the MS P 34x5G, the IC cannot react immediately to an I
2
Table 3–1: I
ADR_SELLow
ModeWriteReadWriteReadWriteRead
MSP device address80
C Bus Device Addresses
2
C bus.
2
C request. The typical
(connected to DVSS)
hex
81
hex
Any reset, even caused by an unstable reset line etc.,
is indicated in bit[15] of CONTROL.
2
A general timing diagram of the I
C bus is shown in
Fig. 4–27 on page 60.
High
(connected to DVSUP)
84
hex
85
hex
88
hex
Left Open
89
Table 3–2: I2C Bus Subaddresses
NameBinary ValueHex ValueModeFunction
CONTROL0000 000000Read/WriteWrite: Software reset of MSP (see Table 3–3)
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Powe r-on,
bit[15] of CONTROL will be set; it must be
read once to be reset.
3.1.3. Protocol Description
Write to DSP or Demodulator
Swrite
device
address
Wait
ACK sub-addr ACK addr-byte
high
ACK addr-byte
low
ACK data-byte
high
ACK data-byte
low
ACK P
Read from DSP or Demodulator
Swrite
device
address
Wait
ACK sub-addr ACK addr-byte
high
ACK addr-byte
low
ACK Sread
device
address
Wait
ACK data-byte-
high
ACK data-byte
Write to Control Register
Swrite
device
address
ACK sub-addr ACK data-byte
high
ACK data-byte
low
ACK P
Wait
Read from Control Register
Swrite
device
address
Wait
Note: S = I
P = I
ACK00hexACK Sread
2
C-Bus Start Condition from master
2
C-Bus Stop Condition from master
device
address
Wait
ACK data-byte-
high
ACK data-byte
low
NAK P
ACK = Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray) or master (= controller, dark gray)
NAK = Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate ‘End of Read’
or from MSP indicating internal error state
2
Wait = I
C-Clock line is held low, while the MSP is processing the I2C command.
This waiting time is max. 1 ms
NAK P
low
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PRELIMINARY DATA SHEETMSP 34x5G
I2C_DA
1
0
SP
I2C_CL
Fig. 3 –1: I2C bus protocol (MSB first; data must be stable while clock is high)
3.1.4. Proposals for General MSP 34x5G
2
I
C Telegrams
3.1.4.1. Symbols
3.2. Start-Up Sequence:
Power-Up and I
After POWER-ON or RE SET (s ee F ig. 4–26), the IC is
in an inactive state. All registers are in the Res et posi-
tion (see Table 3–5 and Table 3–6), the analog outputs
are muted. The controll er has to initialize all register s
for which a non-default setting is necessary.
, 84
>Stop Condition
aaAddress Byte
ddData Byte
3.3. MSP 3 4x5 G Programmin g Interf ace
2
C-Controlling
3.1.4.2. Write Telegr ams
<daw 00 d0 00>write to CONTROL register
<daw 10 aa aa dd dd>wr ite data into demodulator
<daw 12 aa aa dd dd>write data into DSP
3.1.4.3. Read Telegrams
<daw 00 <dar dd dd>read data from
CONTROL register
<daw 11 aa aa <dar dd dd> read data from demodulator
<daw 13 aa aa <dar dd dd> read data from DSP
The MSP 34x5G is controlled by means of user registers. The complete list of all user regist ers ar e given in
Table 3–5 and Table 3–6. The registers are partitioned
into the Demodulator section (Subaddress 10
writing, 11
ing sections (Subaddress 12
for reading) and the Baseband Process -
hex
for writing, 13
hex
hex
hex
for
for
reading).
Write and rea d registers are 16 bit wide, whereby the
MSB is denoted bit[15]. Transmissions via I
2
C bus have
to take place in 16-bit words (two byte transfers, with the
most significant byte transferred first). All write register s,
except the demodulator write registers are readable.
Unused parts of the 16-bit write registers must be zero.
Addresses not given in this table must not be
accessed.
For reasons of software compatibility to the
MSP 34xxD, a Manual /Com patibi li ty M ode i s available.
More read and wri te registers toge ther with a detailed
description can be found in “Appendix B: Manual/Compatibility Mode” on page 76.
More examples of typical application protocols are
listed in Section 3.4. “Programming Tips” on page 37.
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MSP 34x5GPRELIMINARY DATA SHEET
.
Table 3–5: List of MSP 34x5G Write Registers
Write RegisterAddress
(hex)
I2C Sub-Address = 10
; Registers are not readable
hex
BitsDescription and Adjustable RangeResetSee
Page
STANDARD SELECT00 20[15:0]Initial Programming of the Demodulator 00 0021
2
MODUS00 30[15:0]Demodulator, Automatic and I
2
I
S CONFIGURATION00 40[15:0]Configuration of I2S options00 0024
I2C Sub-Address = 12
; Registers are all readable by using I2C Sub-Address = 13
hex
S options00 0023
hex
Volume loudspeaker channel00 00[15:8][+12 dB ... −114 dB, MUTE]MUTE29
Volume / Mode loudspeaker channel[7:0]1/8 dB Steps,
Automatic Standard Detection, for China
00 20BTSC-Stereo4.5 3425, -45, -55
00 21BTSC-Mono + SAP
00 30M-EIA-J Japan Stereo4.53425, -45, -55
00 40FM-Stereo Radio with 75 µs Deemphasis10.73425, -45, -55
00 50SAT-Mono (see Table6–18)6.53405, -15, -55
00 51SAT-Stereo (see Table6–18)7.02/7.20
00 60SAT ADR (Astra Digital Radio)6.12
1)
In case of Automatic Sound Select, the B/G-codes 3
2)
In case of Automatic Sound Select, the D/K-codes 4
3)
HDEV3: Max. FM deviation must not exceed 540 kHz
4)
HDEV2: Max. FM deviation must not exceed 360 kHz
hex
hex
and 8
, 5
hex
are equivalent.
hex
, 7
, and B
hex
are equivalent.
hex
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PRELIMINARY DATA SHEETMSP 34x5G
3.3.2.1. STANDARD SELECT Register
The TV sound standard of the MSP 34x5G demodulator is determined by the STANDARD SELECT regis ter.
There are two ways to use the STANDARD SELECT
register:
– Setting up the demodulator for a TV sound standard
by sending the corresponding standard code with a
single I
2
C bus transmission.
– Starting the Automatic Standard Detection for ter-
restrial TV standards. This is the most comfortable
way to set up the demodulator (not for MSP 3435G).
Within 0.5 s the detection and setup of the actual TV
sound standard is performed. The detected standard can be read out of the STANDARD RESULT
register by the control processor. This feature is recommended for the primary setup of a TV set. Outputs should be muted during Automatic Standard
Detection.
The Standard Codes are listed in Table 3–7.
Selecting a TV sound standard via the STANDARD
SELECT register initializes the demodulator. This
includes: AGC-settings and carrier mute, tuning frequencies, FIR-filter se ttings, demodulation mode ( FM,
AM, NICAM), deemphasis and identification mode.
TV stereo sound standards that are unavailable for a
specific MSP version are processed in analog mono
sound of the standard. In that case, stereo or bil ingual
processing will not be possible.
For a complete setup of the TV sound processing from
analog IF input to the source selection, the transmi ssions as shown in Section 3.5. are necessary.
For reasons of software compatibility to the
MSP 34xxD, a Manual/ Comp ati bil it y mode i s available.
A detailed description of this mode can be found on
page 76.
3.3.2.2. Refresh of STANDARD SELECT Register
A general refresh o f t he ST A NDAR D S EL ECT register
is not allowed. However, the following method
enables watching the MSP 34x5G “alive” status and
detection of accidental resets (only versions B6 and
later):
– After Power-on, bit[15] of CONTROL will be set; it
must be read once to enable the reset-detection
feature.
– Reading of the CONTROL register and checking
the reset indicator bit[15] .
– If bit[15] is “0”, any refresh of the STANDARD
SELECT register is not allowed.
– If bit[15] is “1”, indicating a reset, a refresh of the
STANDARD SELECT register and all other MSPG
registers is required.
3.3.2.3. STANDARD RESULT Register
If Automatic Standard Detection is selected in the
STANDARD SELECT reg ister, status and result of the
Automatic Standard Detection process can be read out
of the STANDARD RESULT register. The possible
results are based on the mentioned Standard Code
and are listed in Table 3–8.
In cases where no sound standard h as been detected
(no standard present, too much noise, strong interferers, etc.) the STANDARD RESULT register contains
00 00
. In that case, the controller has to start further
hex
actions (for example set the standard according to a
preference list or by manual input).
As long as the STANDARD RESULT register contain s
a value greater than 07 FF
, the Automatic Standard
hex
Detection is still active. During this period, the MODUS
and STANDARD SELECT registe r must not be written.
The STATUS register will be updated when the Automatic Standard Detection has finished.
If a present sound standard is unavailable for a specific
MSP-version, it detects and switches to the analog
mono sound of this standard.
Example:
The MSPs 3425G and 3445G will detect a B/G-NICAM
signal as stand ard 3 and will switch to t he analog FMMono sound.
Micronas21
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MSP 34x5GPRELIMINARY DATA SHEET
Table 3–8: Results of the Automatic Standard
Detection
Broadcasted Sound
Standard
Automatic Stan dard
Detection could not
STANDARD RESULT Register
Read 007E
0000
hex
hex
find a sound standard
B/G-FM0003
B/G-NICAM0008
I000A
FM-Radio0040
M-Korea
M-Japan
M-BTSC
L-AM
D/K1
D/K2
D/K3
L-NICAM
D/K-NICAM
0002
0020
0030
0009
0004
0009
000B
hex
hex
hex
hex
(if MODUS[14,13]=00)
hex
(if MODUS[14,13]=01)
hex
(if MODUS[14,13]=10)
hex
(if MODUS[12]=0)
hex
(if MODUS[12]=1)
hex
(if MODUS[12]=0)
hex
(if MODUS[12]=1)
hex
Automatic Stan dard
Detection still active
>07FF
hex
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PRELIMINARY DATA SHEETMSP 34x5G
3.3.2.4. Write Registers on I2C Subaddress 10
Table 3–9: Write registers on I2C subaddress 10
Register
FunctionName
Address
00 20
hex
STANDARD SELECTION Register
Defines TV-Sound or FM-Radio Standard
bit[15:0]00 01
00 02
start Automatic Standard Detection
hex
MSP Standard Codes (see Table 3–7)
hex
...
hex
00 30
hex
00 60
MODUS Register
Preference in Automatic Standard Detection:
bit[15]0undefined, must be 0
bit[14:13]detected 4.5 MHz carrier is interpreted as:
0standard M (Korea)
1standard M (BTSC)
2standard M (Japan)
3chroma carrier (M/N standards are ignored)
bit[12]detected 6.5 MHz carrier is interpreted as:
0standard L (SECAM)
1standard D/K1, D/K2, D/K3, or D/K NICAM
hex
hex
STANDARD_SEL
MODUS
1)
1)
General MSP 34x5G Options
bit[11:8]0undefined, must be 0
bit[7]0/1active/tristate state of audio clock output pin
AUD_CL_OUT
bit[6]I
2
S word strobe alignment
0WS changes at data word boundary
1WS changes one clock cycle in advance
bit[5]0/1master/slave mode of I
(= Master) in case of NICAM mode)
bit[4]0/1active/tristate state of I
bit[3]state of digital output pins D_CTR_I/O_0 and _1
0active: D_CTR_I/O_0 and _1 are output pins
(can be set by means of the ACB register.
see also: MODUS[1])
1tristate: D_CTR_I/O_0 and _1 are input pins
(level can be read out of STATUS[4,3])
bit[2]0undefined, must be 0
bit[1]0/1disable/enable STATUS change indication by means of
Valid at the next start of Automatic Standard Detection.
2
S interface (must be set to 0
2
S output pins
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MSP 34x5GPRELIMINARY DATA SHEET
2
Table 3–9: Write registers on I
C subaddress 10
, continued
hex
Register
Address
00 40
hex
FunctionName
I2S CONFIGURATION Register
I2S_CONFIG
bit[15:1]0not used, must be set to “0”
bit[0]I2S_CL frequency and I
2
S data sample length for
master mode
02 x 16 bit (1.024 MHz)
12 x 32 bit (2.048 MHz))
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PRELIMINARY DATA SHEETMSP 34x5G
3.3.2.5. Read Registers on I2C Subaddress 11
hex
Table 3–10: Read Registers on I2C Subaddress 11
Register
FunctionName
Address
00 7E
hex
STANDARD RESULT Register
Readback of the detected TV sound or FM-Radio Standard
bit[15:0]00 00
Automatic Standard Detection could not find
hex
a sound standard
00 02
MSP Standard Codes (see Table 3–8)
hex
...
02 00
hex
00 40
>07 FF
STATUS Register
hex
Automatic Standard Detection still active
hex
Contains all user relevant internal information about the status of the MSP
bit[15:10]undefined
bit[8]0/1“1” indicates bilingual sound mode or SAP present
(internally evaluated from received analog or digital identification signals)
hex
STANDARD_RES
STATUS
bit[7]0/1“1” indicates independent mono sound (only for
NICAM)
bit[6]0/1mono/stereo indication
(internally evaluated from received analog or digital identification signals)
bit[5,9]00analog sound standard (FM or AM) active
01this pattern will not occur
10digital sound (NICAM) available
11bad reception condition of digital sound (NICAM) due
to:
a. high error rate
b. unimplemented sound code
c. data transmission only
bit[4]0/1low/high level of digital I/O pin D_CTR_I/O_1
bit[3]0/1low/high level of digital I/O pin D_CTR_I/O_0
bit[2]0detected secondary carrier (2nd A2 or SAP sub-carrier)
1no secondary carrier detected
bit[1]0detected primary carrier (Mono or MPX carrier)
1no primary carrier detect ed
bit[0]undefined
If STATUS change indication is activated by means of MODUS[1]: Each
change in the ST ATUS register sets the digital I/O pin D_CTR_I/O_1 to high
level. Reading the STATUS register resets D_CTR_I/O_1.
Micronas25
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MSP 34x5GPRELIMINARY DATA SHEET
3.3.2.6. Write Registers on I2C Subaddress 12
hex
Table 3–11: Write Registers on I2C Subaddress 12
Register
FunctionName
Address
PREPROCESSING
00 0E
hex
FM/AM Prescale
bit[15:8]00
hex
Defines the input prescale gain for the demodulated
...FM or AM signal
7F
hex
00
hex
off (RESET condition)
For all FM modes except satellite FM and AM-mode, the combinations of prescale value and FM deviation listed below lead to internal full scale.
FM mode
bit[15:8]7F
48
30
24
18
13
hex
hex
hex
hex
hex
hex
28 kHz FM deviation
50 kHz FM deviation
75 kHz FM deviation
100 kHz FM deviation
150 kHz FM deviation
180 kHz FM deviation (limit)
hex
PRE_FM
FM high deviation mode (HDEV2, MSP Standard Code = C
bit[15:8]30
14
hex
hex
150 kHz FM deviation
360 kHz FM deviation (limit)
hex
)
FM very high deviation mode (HDEV3, MSP Standard Code = 6 and D
bit[15:8]20
1A
hex
hex
450 kHz FM deviation
540 kHz FM deviation (limit)
Satellite FM with adaptive deemphasis
bit[15:8]10
hex
recommendation
AM mode (MSP Standard Code = 9)
bit[15:8]7C
hex
recommendation for SIF input levels from
0.1 V
to 0.8 V
pp
pp
(Due to the AGC being switched on, the AM-output level
remains stable and independent of the actual SIF-level in
the mentioned input range)
hex
)
26Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
Address
(continued)
00 0E
hex
FunctionName
FM Matrix Modes
FM_MATRIX
Defines the dematrix function for the demodulated FM signal
bit[7:0]00
01
02
03
hex
hex
hex
hex
no matrix (used f o r bi lin gu al and un ma trixed stereo sound)
German stereo (Standard B/G)
Korean stereo (also used for BTSC, EIA-J and FM Radio)
sound A mono (left and right channel contain the mono
sound of the FM/AM mono carrier)
04
hex
sound B mono
In case of Automatic Sound Select = on, the FM Matrix Mode is set automati-
cally . Writing to the FM/AM prescale register (00 0E
In order not to disturb the automatic process, the low part of any I
high part) is still allowed.
hex
2
C transmission to this register is ignored. Therefore, any FM-Matrix readback values may
differ from data written previously.
In case of Automatic Sound Select = off, the FM Matrix Mode must be set as
shown in Table 6–17 of Appendix B.
To enable a Forced Mono Mode for all analog stereo systems by overriding the
internal pilot or id en ti fica ti on evaluation, the following steps must be tr an sm itte d:
1. MODUS with bit[0] = 0 (Automatic Sound Select off)
2. FM Presc./Matrix with FM Matrix = Sound A Mono (SAP: Sound B Mono)
3. Select FM/AM source channel, with channel matrix set to “Stereo” (transparent)
00 10
00 16
00 12
00 0D
hex
hex
hex
hex
NICAM Prescale
Defines the input prescale value for the digital NICAM signal
bit[15:8]00
hex
... 7F
prescale gain
hex
examples:
00
20
5A
7F
hex
hex
hex
hex
off
0dB gain
9 dB gain (recommendation)
+12 dB gain (maximum gain)
I2S1 Prescale
I2S2 Prescale
Defines the input prescale value for digital I
bit[15:8]00
hex
... 7F
prescale gain
hex
2
S input signals
examples:
00
10
7F
hex
hex
hex
off
0 dB gain (recommendation, RESET condition)
+18 dB gain (maximum gain)
SCART Input Prescale
Defines the input prescale value for the analog SCART input signal
PRE_NICAM
PRE_I2S1
PRE_I2S2
PRE_SCART
bit[15:8]00
hex
... 7F
prescale gain
hex
examples:
00
19
7F
hex
hex
hex
off (RESET condition)
0dB gain (2 V
input leads to digital full scale)
RMS
+14 dB gain (400 mV
input leads to digital full scale)
RMS
Micronas27
Page 28
MSP 34x5GPRELIMINARY DATA SHEET
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
FunctionName
Address
SOURCE SELECT AND OUTPUT CHANNEL MATRIX
Source for:
00 08
00 0A
00 0B
00 0C
hex
hex
hex
hex
Loudspeaker Output
SCART1 DA Output
2
S Output
I
Quasi-Peak Detector
bit[15:8]0“FM/AM”: demodulated FM or AM mono signal
1“Stereo or A/B”: demodulator Stereo or A/B signal
(in manual mode, this source is identical to the NICAM
source in the MSP 3410D)
3“Stereo or A”: demodul ato r Ste reo Soun d or
Language A (only defined for Automatic Sound Select)
4“Stereo or B”: demodul ato r Ste reo Soun d or
Language B (only defined for Automatic Sound Select)
2SCART input
5I
6I
2
S1 input
2
S2 input
SRC_MAIN
SRC_SCART1
SRC_I2S
SRC_QPEAK
00 08
00 0A
00 0B
00 0C
hex
hex
hex
hex
For demodulator sources, see Table 2–2.
Matrix Mode for:
Loudspeaker Output
SCART1 DA Output
2
I
S Output
Quasi-Peak Detector
bit[7:0]00
10
20
30
hex
hex
hex
hex
Sound A Mono (or Left Mono) (RESET condition)
Sound B Mono (or Right Mono)
Stereo (transparent mode)
Mono (sum of left and right inputs divided by 2)
special modes are available (see Section 6.5.1. on page 88)
In Automatic Sound Select mode, the demodulator source channels are set
according to Table 2–2. Therefore, the matrix modes o f the correspondin g output channels should be set to “Stereo” (transparent).
MAT_MAIN
MAT_SCART1
MAT_I2S
MAT_QPEAK
28Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
FunctionName
Address
LOUDSPEAKER PROCESSING
00 00
hex
Volume Loudspeaker
bit[15:8]volume table with 1 dB step size
7F
hex
7E
hex
...
74
hex
73
hex
72
hex
...
02
hex
01
hex
00
hex
FF
hex
bit[7:5]higher resolution volume table
0+0dB
1+0.125 dB increase in addition to the volume table
...
7+0.875 dB increase in addition to the volume table
VOL_MAIN
+12 dB (maximum volume)
+11 dB
+1dB
0dB
−1dB
−113 dB
−114 dB
Mute (RESET condition)
Fast Mute (needs about 75 ms until the signal is completely ramped down)
bit[4]0must be set to 0
bit[3:0]clipping mod e
0reduce volume
1reduce tone control
2compromise
3dynamic
With large scale input signals, positive volume settings may lead to signal clipping.
The MSP 34x5G loudspeaker and headphone volume function is divided into a
digital and an analog section. With Fast Mute, volume is reduced to mute position by digital volume only. Analog volume is not changed. This reduces any
audible DC plops. To turn volume on again, the volume step that has been used
before Fast Mute was activated must be transmitted.
If the clipping mode is set to “reduce volume”, the following rule is used: To
prevent severe clipping effects with bass, treble, or equalizer boosts, the internal volume is automatically limited to a level where, in combination with either
bass, treble, or equalizer setting, the amplification does not exceed 12 dB.
If the clipping mode is “reduce tone control”, the bass or treble value is
reduced if amplification exceeds 12 dB. If the equalizer is switched on, the gain
of those bands is reduced, where amplification together with volume exceeds
12 dB.
If the clipping mode is “compromise”, the bass or treble value and volume are
reduced half and half if amplification exceeds 12 dB. If the equalizer is switched
on, the gain of those bands is reduced half and half, where amplification
together with volume exceeds 12 dB.
If the clipping mode is “dynamic”, volume is reduced automatically if the signal
amplitudes would exceed −2 dBFS within the IC.
Micronas29
Page 30
MSP 34x5GPRELIMINARY DATA SHEET
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
Address
00 29
hex
00 01
hex
FunctionName
Automatic Volume Correction (A VC) Loudspeaker Channel
bit[15:12] 00
08
bit[11:8]08
04
02
01
hex
hex
hex
hex
hex
hex
AVC off (and reset internal variables)
AVC on
8 sec decay time
4 sec decay time (recommended)
2 sec decay time
20 ms decay time (should be used for approx. 100 ms
AVC
AVC_DECAY
after channel change)
Note: AVC should not be used in any Dolby Prologic mode (with DPL35xx),
except in PANORAMA or 3D-PANORAMA mode, when only the loudspeaker
output is active.
Balance Loudspeaker Channel
BAL_MAIN
bit[15:8]Linear Mode
7F
7E
hex
hex
Left muted, Right 100%
Left 0.8%, Right 100%
...
01
00
FF
hex
hex
hex
Left 99.2%, Right 100%
Left 100%, Right 100%
Left 100%, Right 99.2%
...
82
81
hex
hex
Left 100%, Right 0.8%
Left 100%, Right muted
bit[15:8]Logarithmic Mode
7F
7E
hex
hex
Left −127 dB, Right 0 dB
Left −126 dB, Right 0 dB
...
01
00
FF
hex
hex
hex
Left −1 dB, Right 0 dB
Left 0 dB, Right 0 dB
Left 0 dB, Right −1dB
...
81
80
hex
hex
Left 0 dB, Right −127 dB
Left 0 dB, Right −128 dB
bit[7:0]Balance Mode
00
01
hex
hex
linear
logarithmic
Positive balance settings reduce the left channel without affecting the right
channel; negative settings reduce the right channel leaving the left channel
unaffected.
30Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
Address
00 02
hex
FunctionName
Bass Loudspeaker Channel
BASS_MAIN
bit[15:8]extended range
7F
78
70
68
hex
hex
hex
hex
+20 dB
+18 dB
+16 dB
+14 dB
normal range
60
58
hex
hex
+12 dB
+11 dB
...
08
00
F8
hex
hex
hex
+1dB
0dB
−1dB
...
A8
A0
hex
hex
−11 dB
−12 dB
Higher resolution i s poss ible: An LS B ste p in th e normal range resu lts i n a gain
step of about 1/8 dB, in the extended range about 1/4 dB.
With positive bass settings, internal clipping may occur even with overall volume
less than 0 dB. This will lead to a clipped output signal. T herefore, it is not recommended to set bass to a value that, in conjunc tion with volume, would resu lt
in an overall positive gain.
00 03
hex
Treble Loudspeaker Channel
bit[15:8]78
70
hex
hex
+15 dB
+14 dB
...
08
00
F8
hex
hex
hex
+1dB
0dB
−1dB
...
A8
A0
hex
hex
−11 dB
−12 dB
Higher resolution is possible: An LSB step results in a gain step of about 1/8 dB.
With positive treble settings, inter nal clipping may occur even with overall vol-
ume less than 0 dB. This will lead to a clipped output signal. Therefore, it is not
recommended to set treble to a value that, in conjun ction with volume, would
result in an overall positive gain.
TREB_MAIN
Micronas31
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MSP 34x5GPRELIMINARY DATA SHEET
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
Address
00 04
hex
FunctionName
Loudness Loudspeaker Channel
LOUD_MAIN
bit[15:8]Loudness Gain
44
40
hex
hex
+17 dB
+16 dB
...
04
03
02
01
00
hex
hex
hex
hex
hex
+1dB
+0.75 dB
+0.5 dB
+0.25 dB
0dB
bit[7:0]Loudness Mode
00
04
hex
hex
normal (constant volume at 1kHz)
Super Bass (constant volume at 2kHz)
Higher resolutio n of Loudness Gain i s possible: An LSB step results in a g ain
step of about 1/4 dB.
Loudness increas es the volume of low and high frequen cy signals, while keeping the amplitud e of the reference frequency c onstant. The intended l oudness
has to be set according to the actual volume setting. Because loudnes s introduces gain, it is not recommended to set loudness to a value that, in conjunction
with volume, would result in an overall positive gain.
The corner frequency for bass amplification can be set to two different values. In
Super Bass mode, the corner frequency is sh ift ed up. The poin t of c ons tan t volume is shifted from 1 kHz to 2 kHz.
32Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
Address
00 05
hex
FunctionName
Spatial Effects Loudspeaker Channel
SPAT_MAIN
bit[15:8]Effect Strength
7F
3F
hex
hex
Enlargement 100%
Enlargement 50%
...
01
00
FF
hex
hex
hex
Enlargement 1.5%
Effect off
reduction 1.5%
...
C0
80
hex
hex
reduction 50%
reduction 100%
bit[7:4]Spatial Effect Mode
0
hex
Stereo Basewidth Enlargement (SBE) and
Pseudo Stereo Effect (PSE). (Mode A)
2
hex
Stereo Basewidth Enlargement (SBE) only. (Mode B)
bit[3:0]Spatial Effect High-Pass Gain
0
hex
2
hex
4
hex
6
hex
8
hex
max high-pass gain
2/3 high-pass gain
1/3 high-pass gain
min high-pass gain
automatic
There are several spatial effect modes available:
In Mode A (low byte = 00
), the spatial effect depends on the sou rce mode. If
hex
the incoming signal is mono, Pseudo Stere o Effect is active; for stereo s ignals,
Pseudo Stereo Effect and Stereo Basewidth Enlargement is effective. The
strength of the effect is controllable by the upper byte. A negative value reduces
the stereo image. A strong spatial effect is recommended for small TV sets
where loudspeaker spacing is rather close. For large screen TV se ts, a more
moderate spatial effect is recommended.
In Mode B, only Stereo Basewidth Enla rgement is effective. For mono input signals, the Pseudo Stereo Effect has to be switched on.
It is worth mentioning that all spatial effects affect amplitude and phase
response. With the lower 4 bits, the fre quency respon se can be customized. A
value of 0
function for L or R only signals. A value of 6
only signals but a low-pass fu nction for center signals. By using 8
yields a flat response for center signals (L = R) but a high-pass
hex
has a flat respons e for L or R
hex
, the fre-
hex
quency response is automatically adapted to the sound material by choosing an
optimal high-pass gain.
Micronas33
Page 34
MSP 34x5GPRELIMINARY DATA SHEET
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
FunctionName
Address
SCART OUTPUT CHANNEL
00 07
hex
Volume SCART1 Output Channel
bit[15:8]volume table with 1 dB step size
7F
hex
7E
hex
...
74
hex
73
hex
72
hex
...
02
hex
01
hex
00
hex
bit[7:5]higher resolution volume table
0+0dB
1+0.125 dB increase in addition to the volume table
...
7+0.875 dB increase in addition to the volume table
bit[4:0]01
hex
+12 dB (maximum volume)
+11 dB
+1dB
0dB
−1dB
−113 dB
−114 dB
Mute (RESET condition)
this must be 01
hex
VOL_SCART1
SCART SWITCHES AND DIGITAL I/O PINS
00 13
hex
ACB Register
Defines the level of the digital out pu t pi ns an d th e po si ti on of th e S CA RT switches
bit[15]0/1low/high of digital output pin D_CTR_I/O_1
(MODUS[3]=0)
bit[14]0/1low/high of digital output pin D_CTR_I/O_0
(MODUS[3]=0)
bit[13:5]SCART DSP Input Select
xxxx00xx0SCART1 to DSP input (RESET position)
xxxx01xx0MONO to DSP input (Sound A Mono must be selected in
the channel matrix mode for the corresponding output
channels)
xxxx10xx0SCART2 to DSP input
xxxx11xx1mute DSP input
bit[13:5]SCART1 Output Select
xx00xxx0xundefined (RESET position)
xx01xxx0x SCART2 input to SCART1 output
xx10xxx0x MONO input to SCART1 output
xx11xxx0x SCART1 DA to SCART1 output
xx01xxx1x SCART1 input to SCART1 output
xx11xxx1x mute SCART1 output
ACB_REG
The RESET position b ecomes active at the time of the first wr ite transmission
on the control bus to the audio pr ocessing par t. By writing to the ACB register
first, the RESET state can be redefined.
34Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
2
Table 3–11: Write Registers on I
C Subaddress 12
, continued
hex
Register
Address
BEEPER
00 14
hex
FunctionName
Beeper Volume and Frequency
BEEPER
bit[15:8]Beeper Volume
00
7F
hex
hex
off
maximum volume
bit[7:0]Beeper Frequency
01
40
FF
hex
hex
hex
16 Hz (lowest)
1kHz
4kHz
Micronas35
Page 36
MSP 34x5GPRELIMINARY DATA SHEET
3.3.2.7. Read Registers on I2C Subaddress 13
hex
Table 3–12: Read Registers on I2C Subaddress 13
Register
FunctionName
Address
QUASI-PEAK DETECTOR READOUT
00 19
00 1A
hex
hex
Quasi-Peak Detector Readout Left
Quasi-Peak Detector Readout Right
bit[15:0]0
... 7FFF
hex
values are 16 bit two’s complement (only positive)
hex
MSP 34x5G VERSION READOUT REGISTERS
00 1E
MSP Hardware Version Code
hex
bit[15:8]02
hex
MSP 34x5G - B8
A change in the hardware version cod e defines hardware optimizations that
may have influence on the chip’s behavior. The readout of this register i s identical to the hardware version code in the chip’s imprint.
A change in the ROM version code defines internal software optimizations,
that may have influence on the chip’s behavior, e.g. new features may have
been included. W hile a software change i s intende d to create no compati bility
problems, customers that want to use the new functions can identify new
MSP 34x5G versions according to this number.
MSP_PRODUCT
MSP_ROM
To avoid compatibility pr oblems with M SP 3410B and MSP 34x0D, an offset of
is added to the ROM version code of the chip’s imprint.
40
hex
36Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
3.4. Programmi ng Ti ps
This section descr ibes the pre ferred method for initializing the MSP 34x5G. The initializat ion is grouped into
four sections:
– SCART Signal Path (analog signal path)
– Demodulator
– SCART and I
2
S Inputs
– Output Channels
See Fig. 2–1 on page 8 for a complete signal flow.
SCART Signal Path
1. Select analog input for the SCART baseband processing (SCART DSP Input Select) by means of the
ACB register.
2. Select the source for each analog SCART output
(SCART Output Select) by means of the ACB register.
Demodulator
For a complete setup of the TV sound processing from
analog IF input to the source selection, the following
steps must be performed:
1. Set MODUS register to the preferred mode and
Sound IF input.
3.5. Examples of Minimum Initialization Codes
Initialization of the MSP 34x5G according to thes e list ings reproduces sound of the selected standard on the
loudspeaker output. All numbers are hexadecimal. The
examples have the following structure:
2
1. Perform an I
C controlled reset of the IC.
2. Write MODUS register
(with Automatic Sound Select).
3. Set Source Selection for loudspeaker channel
(with matrix set to STEREO).
4. Set Prescale
(FM and/or NICAM and dummy FM matrix).
5. Write STANDARD SELECT register.
6. Set Volume loudspeaker channel to 0 dB.
3.5.1. B/G-FM (A2 or NICAM)
<80008000> // Softreset
<80000000>
<801000302003> // MODUS-Register: Automatic = on
<801200080320> // Source Sel. = (St or A) & Ch. Matr. = St
5A
hex
hex
,
<8012000E2403> // FM/AM-Prescale = 24
FM-Matrix = MONO/SOUNDA
<801200105A00> // NICAM-Prescale =
<801000200003> // Standard Select: A2 B/G or NICAM B/G
or
<801000200008>
<801200007300> // Loudspeaker Volume 0 dB
2. Set preferred prescale (FM and NICAM) values.
3. Write STANDARD SELECT register.
4. If Automatic Sound Select is not active:
Choose FM matrix repeatedly according to the
sound mode indicated in the STATUS register.
2
SCART and I
S Inputs
1. Set preferred prescale for SCART.
2. Set preferred prescale for I
2
S inputs
(set to 0 dB after RESET).
Output Channels
1. Select the source channel and matrix for each out-
put channel.
2. Set audio baseband processing.
3. Select volume for each output channel.
3.5.2. BTSC-Stereo
<80008000> // Softreset
<80000000>
<801000302003> // MODUS-Register: Automatic = on
<801200080320> // Source Sel. = (St or A) & Ch. Matr. = St
<8012000E2403> // FM/AM-Prescale = 24
FM-Matrix = Sound A Mono
<801000200020> // St andard Select : BTS C-ST E REO
<801200007300> // Loudspeaker Volume 0 dB
hex
,
3.5.3. BTSC-SAP with SAP at Loudspeaker Channel
<80008000> // Softreset
<80000000>
<801000302003> // MODUS-Register: Automatic = on
<801200080320> // Source Sel. = (St or A) & Ch. Matr. = St
<8012000E2403> // FM/AM-Prescale = 24
FM-Matrix = Sound A Mono
<801000200021> // St andard Select : BTS C-SA P
<801200007300> // Loudspeaker Volume 0 dB
hex
,
Micronas37
Page 38
MSP 34x5GPRELIMINARY DATA SHEET
3.5.4. FM-Stereo Radio
<80008000> // Softreset
<80000000>
<801000302003> // MODUS-Register: Automatic = on
<801200080320> // Source Sel. = (St or A) & Ch. Matr. = St
5A
hex
hex
hex
,
,
<8012000E2403> // FM/AM-Prescale = 24
FM-Matrix = Sound A Mono
<801000200040> // Standard Select: FM-STEREO-RADIO
<801200007300> // Loudspeaker Volume 0 dB
3.5.5. Automatic Standard Detection
A detailed software flow diagram is shown in Fig. 3–2
on page 39.
<80008000> // Softreset
<80000000>
<801000302003> // MODUS-Register: Automatic = on
<801200080320> // Source Sel. = (St or A) & Ch. Matr. = St
<8012000E2403> // FM/AM-Prescale = 24
FM-Matrix = Sound A Mono
<801200105A00> // NICAM-Prescale =
<801000200001> // Standard Select:
Automatic Standard Detection
// Wait till STANDARD RESULT contains a value ≤ 07FF
// IF STANDARD RESULT contains 0000
// do some error handling
// ELSE
<801200007300> // Loudspeaker Volume 0 dB
3.5.6. Software Flow for Interrupt driven STATUS
Check
A detailed software flow diagram is shown in Fig. 3–2
on page 39.
If the D_CTR_I/O_1 pin of the MSP 34x5G is connected to an interrupt input pin of the controller, the following interrupt handler can be applied to be automatically called with each status change of the
MSP 34x5G. The interrupt handler may adjust the TV
display according to the new status information.
Interrupt Handler:
<80 11 02 00 <81 dd dd> // Read STATUS
// adjust TV-display with given status information
// Return from Interrupt
38Micronas
Page 39
PRELIMINARY DATA SHEETMSP 34x5G
Write MODUS Register
Example
[0] = 1 Automatic Sound Select = on
[1] = 1 Enable interrupt if STATUS changes
[8] = 0 ANA_IN1+ is selected
Define Preference for Automatic Standard
Detection:
[12] = 0 If 6.5 MHz, set SECAM-L
[14:13] = 3 Ignore 4.5 MHz carrier
for the essential bits:
:
Write SOURCE SELECT Settings
Example:
set loudspeaker Source Select to "Stereo or A"
set headphone Source Select to "Stereo or B"
set SCART_Out Source Select to "Stereo or A/B"
set Channel Matrix mode for all outputs to "Stereo"
Write FM/AM-Prescale
Write NICAM-Prescale
set previous standard or
set standard manually according
picture informat ion
In case of interrupt from
MSP to controller:
Write 01 into
STANDARD SELECT Register
(Start Automatic Standard Detection)
yes
expecting interrupt from MSP
Result = 0
?
no
Read STATUS
Adjust TV-Display
If bilingual, adjust Source Select setting if required
Fig. 3–2: Software flow diagram for a minimum demodulator setup for a European multistandard set applying the
Automatic Sound Select feature
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MSP 34x5GPRELIMINARY DATA SHEET
132
3364
57.7
±0.1
0.8
±0.2
3.8
±0.1
3.2
±0.2
1.778
1
±0.05
31 x 1.778 = 55.1
±0.1
0.48
±0.06
20.3
±0.5
0.28
±0.06
18
±0.05
19.3
±0.1
SPGS703000-1(P64)/1E
4. Specifications
4.1. Outline Dimensions
Fig. 4–1:
64-Pin Plastic Shrink Dual Inline Package
(PSDIP64)
Weight approximately 9.0 g
Dimensions in mm
2752
126
47.0
1
1.778
25 x 1.778 = 44.4
±0.1
±0.05
±0.1
0.48
±0.06
±0.1
±0.2
4.0
0.6
±0.2
2.8
SPGS703000-1(P52)/1E
15.6
±0.06
0.28
16.3
Fig. 4–2:
52-Pin Plastic Shrink Dual Inline Package
(PSDIP52)
Weight approximately 5.5 g
Dimensions in mm
±0.1
±0.1
14
±1
4164
65
0.15±
17.2
80
Fig. 4–3:
23.2
0.15±
40
25
241
1.3
80-Pin Plastic Quad Flat Pack Package
(PQFP80)
Weight approximately 1.6 g
Dimensions in mm
0.04±
0.17
0.04±
0.37
0.05±
±0.2
3
2.7
0.1±
0.1
0.1±
14
0.8
23 x 0.8 = 18.4
0.1±
0.1±
0.8
15 x 0.8 = 12.0
0.1±
20
SPGS705000-3(P80)/1E
40Micronas
Page 41
PRELIMINARY DATA SHEETMSP 34x5G
0.055±
0.145
3348
49
0.2±
12
64
1.75
116
1.75
12
0.2±
32
0.05±
17
1.5
0.22
1.4
0.1
0.1±
Fig. 4–4:
64-Pin Plastic Low-Profile Quad Flat Pack
(PLQFP64)
Weight approximately 0.35 g
Dimensions in mm
0.06±
0.17
2333
0.5
10
0.1±
0.1±
0.5
15 x 0.5 = 7.5
0.1±
D0025/3E
0.1±
0.8
15 x 0.5 = 7.5
0.1±
10
0.05±
10 x 0.8 = 8
22
12
11
2.15
0.2±
13.2
34
44
1
0.2±
13.2
Fig. 4–5:
44-Pin Plastic Metric Qu ad Flat Pack
(PMQFP44)
Weight approximately 0.4 g
Dimensions in mm
0.1±
0.1±
0.05±
0.34
0.1±
2.0
0.1
0.2±
10
0.1±
10
SPGS706000-5(P44)/1E
0.8
10 x 0.8 = 8
Micronas41
Page 42
MSP 34x5GPRELIMINARY DATA SHEET
4.2. Pin Connections and Short Descriptions
NC = not connected; leave vacant
LV = if not used, leave vacant
DVSS: if not used, connect to DVSS
X = obligatory; connect as described in circuit diagram
AHVSS: connect to AHVSS
S1 data input
87–1513ADR_DALVADR data output
98–1614ADR_WSLVADR word strobe
109181715ADR_CLLVADR clock
11−–––DVSUPXDigital power supply +5 V
12−–––DVSUPXDigital power supply +5 V
1310191816DVSUPXDigital power supply +5 V
14−20––DVSSXDigital ground
15−–––DVSSXDigital ground
1611–1917DVSSXDigital ground
1712212018I2S_DA_IN2LVI
high-voltage part
2720262824DACM_ROUTLVLoudspeaker out, right
2821272925DACM_LOUTLVLoudspeaker out, left
2922–30–NCLVNot connected
3023–3126NCLVNot connected
3124–32–NCLVNot connected
32−–––NCLVNot connected
3325–3327NCLVNot connected
3426283428NCLVNot connected
352729352 9V REF 1XReference ground 1
high-voltage part
3628303630SC1_OUT_ROUTLVSCART 1 output, right
3729313731SC1_OUT_LOUTLVSCART 1 output, left
3830323832NCLVNot connected
3931333933AHVSUPXAnalog power supply
8.0 V
403234403 4CA PL _MXVolume capacitor MAIN
41−–––NCLVNot connected
42−–––NCLVNot connected
43−–––AHVSSXAnalog ground
4433354135AHVSSXAnalog ground
4534364236AGNDCXAnalog reference voltage
high-voltage part
46−–––NCLVNot connected
4735–43–NCLVNot connected
4836–44–NCLVNot connected
4937–45–NCLVNot connected
5038–4637NCLVNot connected
5139–4738NCLVNot connected
5240–48–NCAHVSSAnalog Shield Ground
5341374939SC2_IN_LINLVSCART 2 input, left
5442385040SC2_IN_RINLVSCART 2 input, right
Micronas43
Page 44
MSP 34x5GPRELIMINARY DATA SHEET
PQFP
80-pin
PLQFP
64-pin
Pin No.Pin NameTypeConnection
PMQFP
44-pin
PSDIP
64-pin
PSDIP
52-pin
(if not used)
Short Description
55433951–ASGAHVSSAnalog Shield Ground
5644405241SC1_IN_LINLVSCART 1 input, left
5745415342SC1_IN_RINLVSCART 1 input, right
5846425443VREFTOPXReference voltage IF
A/D converter
59−–––NCLVNot connected
6047435544MONO_ININLVMono input
61−–––AVSSXAnalog ground
6248445645AVSSXAnalog ground
63−–––NCLVNot connected
64−–––NCLVNot connected
65−–––AVSUPXAnalog power supply +5 V
664915746AVSUPXAnalog power supply +5 V
675025847ANA_IN1+INLVIF input 1
685135948ANA_IN−INLVIF common
6952–6049NCLVNot connected
705346150TES T ENINXTest pin
715456251XTAL_ININXCrystal oscillator
725566352XTAL_OUTOUTXCrystal oscillator
73567641TPLVTest pin
7457–12NCLVNot connected
7558–2–NCLVNot connected
7659–3–NCLVNot connected
7760843D_CTR_I/O_1IN/OUTLVD_CTR_I/O_1
7861954D_CTR_I/O_0IN/OUTLVD_CTR_I/O_0
79621065ADR_SELINXI
2
C Bus address select
80631176STA NDBYQINXStandby (low-active)
44Micronas
Page 45
PRELIMINARY DATA SHEETMSP 34x5G
4.3. Pin Description
Pin numbers refer to the 80-pin PQFP package
Pin 1, NC – Pin not connected
2
Pin 2, I2C_CL – I
Via this pin the I
C Clock Input/Output (Fig. 4–18)
2
C bus clock signal has to be supplied.
The signal can b e pulled down by the MSP in c ase of
wait conditions.
2
Pin 3, I2C_DA – I
Via this pin the I
C Data Input/Output (Fig. 4–18)
2
C bus data is written to or read from
the MSP.
2
Pin 4, I2S_CL – I
Clock line for the I
driven by the MSP; in slave mode, an external I
S Clock Input/Output (Fig. 4–19)
2
S bus. In master mode, this line is
2
clock has to be supplied.
2
Pin 5, I2S_WS – I
(Fig. 4–19)
Word strobe line for the I
line is driven by the MSP; in slave mode, an external
2
I
S word strobe has to be supplied.
Pin 6, I2S_DA_OUT – I
Output of digital seri al sound data of the MSP on the
Reference analog ground. This pi n must be connected
separately to ground (AHVSS). VREF2 serves as a
clean ground and sh ould be used as the reference for
analog connections to the loudspeaker and headphone outputs.
Pins 27, 28, DACM_R/L – Loudspeaker Outputs
(Fig. 4–21)
Output of the loudsp eaker signal. A 1n F capacitor to
AHVSS must be conn ected to t hese pins. The D C offset on these pins depends on the selected loudspeaker volume.
Pin 35, VREF1 – Reference Ground 1
Reference analog ground. This pi n must be connected
separately to ground (AHVSS). VREF1 serves as a
clean ground and sh ould be used as the reference for
analog connections to the SCART outputs.
Pins 36, 37, SC1_OUT_R/L – SCART1 Outputs
(Fig. 4–22)
Output of the SCART1 signal. Connections to these
pins must use a 100 ohm series resistor and are
intended to be AC coupled.
Pin 7, I2S_DA_IN1 – I
First input of digital se rial sound data to the MSP via
2
S bus.
the I
2
S Data Input 1 (Fig. 4–17)
Pin 8, ADR_DA – ADR Bus Data Output (Fig. 4–23)
Output of digital ser ial data to the DRP 3510A via the
ADR bus.
Pin 9, ADR_WS – ADR Bus Word Strobe Output
(Fig. 4–23)
Word strobe output for the ADR bus.
Pin 10, ADR_CL – ADR Bus Clock Output (Fig. 4–23)
Clock line for the ADR bus.
Pins 11, 12, 13, DVSUP* – Digital Supply Voltage
Power supply for the digital circuitry of the MSP. Must
be connected to a +5-V power supply.
Pins 14, 15, 16, DVSS* – Digita l Gr oun d
Ground connection for the digital circuitry of the MSP
2
Pin 17, I2S_DA_IN2 – I
Second input of digital s erial sound data to the MSP
via the I
In the steady state, high level is required. A low level
resets the MSP 34x0G.
Pin 38, NC – Pin not connected
Pin 39, AHVSUP* – Analog Power Supply High Voltage
Power is supplied via this pin for the analog circuitry of
the MSP (except IF input). This pin must be connected
to the +8V supply.
Pin 40, CAPLM – Volume Capacitor Loudspeakers
(Fig. 4–24)
A 10µF capacitor to AHVSUP must be connected to
this pin. It s erves as smoothing filter for loudsp eaker
volume changes in order to suppress audible plops.
The value of the capacitor can be lowered to 1µF if
faster response is required. The area encircled by the
trace lines should be minimized, keep traces as short
as possible. This input is sen sitive for magnetic induc tion.
Pins 41, 42, NC – Pins not connected.
Pins 43, 44, AHVSS* – Ground for Analog Power Sup-
ply High Voltage
Ground connection for the analog cir cuitr y of the MSP
(except IF input).
Pins 45, AGNDC – Internal Analog Reference Voltage
This pin ser ves as the internal groun d connection for
the analog circuitr y (except IF input). It must be connected to the VREF pins with a 3.3 µF and a 100 nF
capacitor in parallel. This pins shows a DC level of typically 3.73 V.
Micronas45
Page 46
MSP 34x5GPRELIMINARY DATA SHEET
Pin 46, 47, 48, 49, 50, 51 NC – Pins not connected.
Pin 52, ASG – Analog Shield Ground
Analog ground (AHVSS) should be connected to this
pin to reduce cross coupling between SCART inputs.
Pins 53, 54, SC2_IN_L/R – SCART2 Inputs
(Fig. 4–14)
The analog input signa l for SCART2 is fed to this pin.
Analog input connection must be AC coupled.
Pin 55, ASG – Analog Shield Ground
Analog ground (AHVSS) should be connected to this
pin to reduce cross coupling between SCART inputs.
Pins 56, 57, SC1_IN_L/R – SCART1 Inputs
(Fig. 4–14)
The analog input signa l for SCART1 is fed to this pin.
Analog input connection must be AC coupled.
Pin 58, VREFTOP – Reference Voltage IF AD Con-
verter (Fig. 4–15)
Via this pin, the reference voltage for the IF AD converter is decoupled. It must be connected to AVSS
pins with a 10µF and a 100nF capacitor in parallel.
Traces must be kept short.
Pin 59, NC – Pin not connected
Pins71, 72, XTAL_IN, XTAL_OUT – Cr ystal Input an d
Output Pins (Fig. 4–20)
These pins are connected to an 18.432 MHz crystal
oscillator which is digitally tuned by integrated shunt
capacitances. An external clock can be fed into
XTAL_IN. The audio clock output signal AUD_CL_OUT
is derived form the oscillator. External capacitors at
each crystal pin to ground (AVSS) are required. It
should be verifie d by layout, that no sup ply curren t for
the digital circuitr y is flowing through the ground c onnection point.
Pin 73, TP – Test pin
Pins 74, 75, 76, NC – Pins not connected
Pins 77, 78, D_CTR_I/O_1/0 – Digital Control Input/
Output Pins (Fig. 4–19)
General purpos e input/output pins. Pin D_CT R_I/O_1
can be used as an in terr upt request pin to the controller.
2
Pin 79, ADR_SEL – I
C Bus Address Select
(Fig. 4–16)
By means of this pin, one of 3 device addresses for the
MSP can be selected. The pin can be connected to
ground (I
(84/85
2
C device addresses 80/81
) or left open (88/89
hex
hex
), to +5V supply
hex
).
Pin 60, MONO_IN – Mono Input (Fig. 4–14)
The analog mono input signal is fed to this pi n. An alo g
input connection must be AC coupled.
Pins 61, 62, AVSS* – Ground for Analog Power Supply
Voltage
Ground connection for the analog IF input circui try of
the MSP.
Pins 63, 64, NC – Pins not connected
Pins 65, 66, AVSUP* – Analog Power Supply Voltage
Power is supplied via this pin for the analog IF input circuitry of t he MSP. This pin must be connected to the
+5 V supply.
Pin 67, ANA_IN1+ – IF Input 1 (Fig. 4–15)
The analog sound if signal is supplied to this pin.
Inputs must be AC coupled. This pin is designed as
symmetrical input: ANA_IN1+ is internally connected
to one input of a sy mmetr ical op amp, ANA_IN− to the
other.
Pin 68, ANA_IN− – IF Common (Fig. 4–15)
This pin ser ves as a common reference for ANA_IN1 /
2+ inputs.
Pin 69, NC – Pin not connected
Pin 80, STANDBYQ – Standby
In normal operation, this pin must be high. If the
MSP 34x5G is switched off by first pulling STA NDBYQ
low and then (after >1µs d elay) switching off DVSUP
and AVSUP, but keeping AHVSUP (‘Standby’-mode),
the SCART switches maintain their position and function.
* Application Note:
All ground pins shoul d be connected to one low-resi stive ground plane. All supply pins should be connected
separately with short and low-resistive lines to the
power supply. Decoupling capacitors from DVSUP to
DVSS, AVSUP to AVSS, and AHVSUP to AH VSS are
recommended as closely as possible to these pins.
Decoupling of DVSUP and DVSS is most important.
We recommend using more than one capacitor. By
choosing different values, the frequency range of
active decoupling can be extended. In our application
boards we use: 220 pF, 470 pF, 1.5 nF, and 10 µF. The
capacitor with the lowest value sho uld be pla ced nea rest to the DVSUP and DVSS pins.
The ASG pins should be connected as closely as possible to the MSP ground. If they are lead with the
SCART-inputs as shielding lines, they should not be
connected to ground at the SCART connector.
Pin 70, TESTEN – Test Enable Pin (Fig. 4–12)
This pin enables factory test modes. For normal operation it must be connected to ground.
Ambient Operating Temperature–070°C
Storage Temperature–−40125°C
First Supply VoltageAHVSUP−0.39.0V
Second Supply VoltageDVSUP−0.36.0V
Third Supply VoltageAVSUP−0.36.0V
Voltage between AVSUP
and DVSUP
Package Power Dissi pa tio n
PSDIP64
PSDIP52
PQFP80
PLQFP64
PMQFP44
Input Voltage, all Digital Inputs−0.3V
AVSUP,
DVSUP
AHVSUP,
DVSUP ,
AVSUP
−0.50.5V
1300
1200
1000
960
960
+0.3V
SUP2
mW
mW
mW
mW
mW
Input Current, all Digital Pins–−20+20mA
Input Voltage, all Analog InputsSCn_IN_s,
2)
−0.3V
SUP1
+0.3V
MONO_IN
Input Current, all Analog InputsSCn_IN_s,
2)
−5+5mA
MONO_IN
1)
1)
I
Oana
I
Oana
Output Current, all SCART OutputsSC1_OUT_s
Output Current, all Analog Outputs
DACM_s
2)3), 4)3), 4)
2)3)3)
except SCART Outputs
I
Cana
1)
positive value means current flowing into the circuit
2)
“n” means “1” or “2”, “s” means “L” or “R”
3)
The Analog Outputs are short-circuit proof with respect to First Supply Voltage and Ground.
4)
Total chip power dissipation must not exceed absolute maximum rating.
Output Current, other pins
connected to capacitors
CAPL_M,
AGNDC
3)3)
Stresses beyond those listed in the “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating onl y. Functional operation of the device at these or any ot her c onditions beyond those indi cated in
the “Rec ommended O perating Conditio ns/Characteris tics” of this s pecification is not implied. Exposure to absolute
maximum ratings conditions for extended periods may affect device reliability.
Micronas53
Page 54
MSP 34x5GPRELIMINARY DATA SHEET
4.6.2. Recommended Operating Conditions
= 0 to 70 °C
at T
A
4.6.2.1. General Recommended Operating Conditions
SymbolParameterPin NameMin.Typ.Max.Unit
V
SUP1
First Supply Voltage
AHVSUP7.68.08.7V
(AHVSUP = 8 V)
First Supply Voltage
4.755.05.25V
(AHVSUP = 5V)
V
SUP2
V
SUP3
t
STBYQ1
Second Supply VoltageDVSUP4.755.05.25V
Third Supply VoltageAVSUP4.755.05.25V
STANDBYQ Setup Time before
Turn-off of Second Supply V oltage
STANDBYQ,
DVSUP
1µs
4.6.2.2. Analog Input and Output Recommendations
SymbolParameterPin NameMin.Typ.Max.Unit
C
AGNDC
AGNDC-Filter-CapacitorAGNDC−20%3.3µF
Ceramic Capacitor in Parallel−20%100nF
C
inSC
DC-Decoupling Capacitor in front of
SCn_IN_s
1)
−20%330nF
SCART Inputs
V
inSC
V
inMONO
R
LSC
C
LSC
C
VMA
C
FMA
1)
“n” means “1” or “2”, “s” means “L” or “R”
SCART Input Level2.0V
Input Level, Mono InputMONO_IN2.0V
SCART Load ResistanceSC1_OUT_s
SCART Load Capacitance6.0nF
Main Volume CapacitorCAPL_M10µF
Main Filter CapacitorDACM_s
RMS
RMS
1)
1)
10kΩ
−10%1+10%nF
54Micronas
Page 55
PRELIMINARY DATA SHEETMSP 34x5G
4.6.2.3. Recommendations for Analog Sound IF Input Signal
SymbolParameterPin NameMin.Typ.Max.Unit
C
VREFTOP
F
IF_FMTV
F
IF_FMRADIO
V
IF_FM
V
IF_AM
R
FMNI
R
AMNI
R
FM
R
FM1/FM2
VREFTOP-Filter-CapacitorVREFTOP−20%10µF
Ceramic Capacitor in Parallel−20%100nF
Analog Input Frequency Range
for TV applications
Analog Input Frequency for
ANA_IN1+,
ANA_IN−
09MHz
10.7MHz
FM-Radio Applications
Analog Input Range FM/NICAM0.10.83V
Analog Input Range AM/NICAM0.10.450.8V
Ratio: NICAM Carrier/FM Carrier
XTAL_OUT
Crystal Recommendations for Master-Slave Applications
f
TOL
D
TEM
Accuracy of Adjustment−20+20ppm
Frequency Variation
versus Temperature
C
1
f
CL
Crystal Recommendations for FM / NICAM Applications
f
TOL
D
TEM
Motional (Dynamic) Capacitance1924fF
Required Open Loop Clock
Frequency (T
= 25 °C)
amb
(No MSP-clock synchronization to I2S clock possible)
Accuracy of Adjustment−30+30ppm
Frequency Variation
versus Temperature
18.432MHz
PSDIPapprox. 1.5
P(L,M)QFPapprox. 3.3
(MSP-clock must perform sync hron iz ati on to I2S clock)
pF
pF
−20+20ppm
18.43118.433MHz
−30+30ppm
C
1
f
CL
Crystal Recommendations for all analog FM/AM Applications
f
TOL
D
TEM
Motional (Dynamic) Capacitance15fF
Required Open Loop Clock
Frequency (T
= 25 °C)
amb
(No MSP-clock synchronization to I2S clock possible)
18.430518.4335
MHz
Accuracy of Adjustment−100+100ppm
Frequency Variation
−50+50ppm
versus Temperature
f
CL
Amplitude Recommendation for Operation with External Clock Input (C
V
XCA
1)
External capacitors at each crystal pin to ground are required. They are necessary to tune the open-loop fre-
Required Open Loop Clock
Frequency (T
= 25 °C)
amb
18.42918.435MHz
after reset typ. 22 pF)
load
External Clock AmplitudeXTAL_IN0.7V
pp
quency of the internal PLL and to stabilize the frequency in closed-loop operation.
Due to different layouts, the accurate capacitor size should be determined with the customer PCB
. The suggested
values (1.5...3.3 pF) are figures based on experience and should serve as “start value”.
To define the capacitor size, reset the MSP and transfer only the following I2C-protocol: <80 10 00 20 00 60>.
Measure the frequency at pin ADR_CL. Measurement at XTAL_IN/OUT pins is not possible. Change the capacitor size until the frequency matches 18.432/3 = 6.144 MHz as closely as possible. The higer the capacity, the
lower the resulting clock frequency.
THD+N of EIA-J Stereo Signal
THD+N of EIA-J Sub-Channel
fR
EIAJ
Frequency Response of EIA-J
Stereo, 50 Hz...12 kHz
Frequency Response of EIA-J
Sub-Channel, 50 Hz...12 kHz
XTALK
EIAJ
Main → SUB
Sub → MAIN
SEP
EIAJ
Stereo Separation
50 Hz...5 kHz
50 Hz...10 kHz
FM-Radio Characteristics (MSP Standard Code = 40
S/N
THD
fR
UKW
UKW
UKW
S/N of FM-Radio Stereo SignalDACM_s,
THD+N of FM-Radio Stereo Signal0.1%
Frequency Response of
FM-Radio Stereo
50 Hz...15 kHz−1.0+1.0dB
)
DACM_s,
SC1_OUT_s
)
hex
SC1_OUT_s
60
1)
60
0.2
0.3
−1.0
1.0
dB
dB
%
%
dB
1 kHz L or R,
100% modulation,
75 µs deemphasis,
RMS unweighted
0 to 15 kHz
100% modulation,
75 µs deemphasis
−1.0
66
80
1.0
dB
dB
dB
1 kHz L or R, 100%
modulation, 75 µs
deemphasis,
Bandpass 1 kHz
EIA-J Stereo Signal, L or R
35
28
68dB1 kHz L or R, 100%
1)
dB
dB
100% modulation
modulation, 75 µs
deemphasis, RMS
unweighted
0 to 15 kHz
L or R, 1%...100%
modulation, 75 µs
deemphasis
SEP
UKW
f
Pilot
1)
“s” means “L” or “R”
Stereo Separation 50 Hz...15 kHz45dB
Pilot Frequency RangeANA_IN1+18.84419.125 kHzstandard FM radio
stereo signal
Micronas71
Page 72
MSP 34x5GPRELIMINARY DATA SHEET
5. Appendix A: Overview of TV Sound Standards
5.1. NICAM 728
Table 5–1: Summary of NICAM 728 sound modulation parameters
SpecificationIB/GLD/K
Carrier frequency of
digital sound
Transmission rate728 kbit/s
Type of modulationDifferentially encoded quadrature phase shift keying (DQPSK)
Spectrum shaping
Roll-off factor
Carrier frequency of
analog sound compone nt
Powe r ratio between
vision carrier and
analog sound carrier
Powe r ratio between
analog and modulated
digital sound carrier
6.552 MHz5.85 MHz5.85 MHz5.85 MHz
by means of Roll-off filters
1.00.40.40.4
6.0 MHz
FM mono
10 dB13 dB10 dB16 dB13 dB
10 dB7 dB17 dB11 dBChina/
5.5 MHz
FM mono
6.5 MHz AM mono6.5 MHz
FM mono
terrestrialcable
Hungary
12 dB7 dB
Poland
Table 5–2: Summary of NICAM 728 sound coding characteristics
CharacteristicsValues
Audio sampling frequency 32 kHz
Number of channels2
Initial resolution 14 bit/sample
Companding characteristics near instantaneous, with compression to 10 bits/sample in 32-samples (1ms) blocks
Coding for compressed samples2’s complement
PreemphasisCCITT Recommendation J.17 (6.5 dB attenuation at 800Hz)
Audio overload level +12 dBm measured at the unity gain frequency of the preemphasis network (2kHz)
72Micronas
Page 73
PRELIMINARY DATA SHEETMSP 34x5G
5.2. A2 Systems
Table 5–3: Key parameters for A2 Systems of Standards B/G, D/K, and M
CharacteristicsSound Carrier FM1Sound Carrier FM2
TV-Sound Standard
Carrier frequency in MHz5.56.54.55.74218756.2578125
Vision/sound power difference13 dB20 dB
Sound bandwidth40 Hz to 15 kHz
Preemphasis50 µs75 µs50 µs75 µs
Frequenc y deviation (nom/max)±27/±50 kHz±17/±25 kHz±27/±50 kHz±15/±25 kHz
Table 5–7: Key pa rameters for FM-Stereo Radio Sys tems
Aural
Carrier
(L+R)Pilot(L−R)RDS/ARI
Carrier frequency (f
= 19 kHz)10.7MHzBasebandf
p
Sound bandwidth in kHz0.05 - 150.05 - 15
FM-Radio-MPX-Components
p
2 f
p
3 f
h
Preemphasis:
− USA
− Europe
Max. deviation to Aural Carrier75 kHz
(100%)
1)
Sum does not exceed 90% due to interleaving effects.
75 µs
50 µs
90%
75 µs
50 µs
1)
10%90%
1)
5%
Micronas75
Page 76
MSP 34x5GPRELIMINARY DATA SHEET
6. Appendix B: Manual/Compatibility Mode
To adapt the modes of the STANDARD SELECT register to individual r equiremen ts and for reasons of com-patibility to the MSP 34x5D, the MSP 34x5G offers
an Manual/Compatibility Mode, which provides sophisticated programming of the MSP 34x5G.
Using the STANDARD SELECT regist er ge nera lly pr ovides a more economic way to program the
MSP 34x5G and will result in optimal b ehavior. There-
fore, it is not recommend to use the Manual/Compatibility mode. In those cases, where the
MSP 34x5D is to be substituted by the MSP 34x5G,
the tips given in Section 6.9. on page 90 have to be
obeyed by the controller software.
6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode
1. MODUS[0]=1 (Automatic Sound Select): Switching Level threshold of
Automatic Switching between NICAM and FM/AM in case of bad NICAM
reception
2. MODUS[0]=0 (Manual Mode): Activation and configuration of Automatic
Switching between NICAM and FM/AM in case of bad NICAM reception
Controlling of MSP-Demodulator and Interface options. As soon as this
register is applied, the MSP 34x5G wor ks in the MSP 34x5D compatibility
mode.
Warning: In this mode, BTSC, EIA-J, and FM-Radio are disabled. Only
MSP 34x5D features are available; the use of MODUS and STATUS register
is not allowed.
The MSP 34x5G
MODUS register followed by transmitting a valid standard code to the
STANDARD SELECTION register.
is reset to the normal mode by first programming the
; these registers are not readable!
hex
Mode
00 0078
hex
hex
00 0082
Page
80
80
FIR1
FIR2
DCO1_LO
DCO1_HI
DCO2_LO
DCO2_HI
Note: All registers except AUTO_FM /AM, A2_Threshold, and CM_Threshold are initialized during STANDARD SE LECT ION and are
automatically updated when Automatic Sound Select (MODUS[0]=1) is on.
C_AD_BITS00 233415,
ADD_BITS00 38NICAM: bit [10:3] of additional data bits86
CIB_BITS00 3ENICAM: CIB1 and CIB2 control bits86
ERROR_RATE00 57NICAM error rate, updated with 182 ms87
PLL_CAPS02 1FNot for customer use.87
AGC_GAIN02 1ENot for customer use.87
Address
(hex)
MSPVersion
3455
DescriptionPage
NICAM-Sync bit, NICAM-C-Bits, and three LSBs of additional data bits86
; these registers are not writable!
hex
6.2. DSP Write and Read Registers for Manual/Compatibility Mode
Table 6–3: DSP-Write Registers; Subaddress: 12
Write RegisterAddress
(hex)
BitsOperational Modes and Adjustable RangeReset
, all registers are readable as well
hex
Mode
Page
Volume SCART1 channel: Ctrl. mode00 07[7:0][Linear mode / logarithmic mode]00
FM Fixed Deemphasis00 0F[15:8][50 µs, 75 µs, J17, OFF]50 µs88
FM Adaptive Deemphasis [7:0][OFF, WP1]OFF88
Identification Mode00 15[7:0][B/G, M]B/G89
FM DC Notch00 17[7:0][ON, OFF]ON89
Table 6–4: DSP Read Registers; Subaddress: 13
Additional Read
Registers
Stereo detection register for
A2 Stereo Systems
DC level readout FM1/Ch2-L00 1B[15:0][8000
DC level readout FM2/Ch1-R00 1C[15:0][8000
Address
(hex)
00 18[15:8][80
BitsOutput RangePage
, all registers are not writable
hex
... 7F
hex
] 8 bit two’s compl e ment89
hex
hex
hex
... 7FFF
... 7FFF
]16 bit two’s c omplem ent89
hex
]16 bit two’s c omplem ent89
hex
hex
88
Micronas77
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MSP 34x5GPRELIMINARY DATA SHEET
ERROR_RATE
Selected Sound
NICAM
analog
sound
thresholdthreshold/2
6.3. Manual/Compatibility Mode:
Description of Demodulator Write Registers
6.3.1. Automatic Switching between NICAM and
Analog Sound
In case of bad NICAM reception or loss of the
NICAM-carrier, the MSP 34x5G offers an Automatic
Switching (fall back) to the analog sound (FM/AMmono), without the necessity for the controller of reading
and evaluating any parameters. If a proper NICAM signal return s, switching back to th is source is performed
automatically as well . T h e feature evaluates th e NIC AM
ERROR_RATE and switches, if necessary, all output
channels which are assigned to the NICAM-source, to
the analog source, and vice versa.
An appropriate hysteresis algorithm avoids oscillating
effects (see Fig. 6–1). STATUS[9] and C_AD_BITS[11]
(Addr: 0023 hex) provide information about the actual
NICAM-FM/AM-status.
6.3.1.1. Function in Automatic Sound Select Mode
The Automatic Sound Select feature (MODUS[0]=1)
includes the procedure mentioned above. By default, the
internal ERROR_RATE threshold is set to 700
dec
. i.e.:
– NICAM → analog Sound if ERROR_RATE > 700
– analog Sound → NICAM if ERROR_RATE < 700/2
The ERROR_RATE value of 700 corresponds to a
BER of approximately 5.46*10
-3
/s.
Individual config uration of the threshold can be done
using Table 6–5. However, the internal settin g used by
the standard selection is recommended.
The optimum NICAM sound can be assigned to the
MSP output chann els by selecting one of the “Stereo
or A/B”, “Stereo or A”, or “Stereo or B” source channels
6.3.1.2. Function in Manual Mode
If the manual mode (MODUS[0]=0) is required, the
activation and configuration of the Automatic Switching
feature has to be done as described in Table 6–6.
Note, that the channel matrix of the corresponding output-channels must be set according to the
NICAM-mode and need not to be changed in the FM/
AM-fallback case.
Fig. 6–1: Hysteresis for Automatic Switching
Table 6–5: Coding of Automati c NICA M/Anal og Sou nd Swi tc hin g;
Automatic Sound Select is on (MODUS[0] = 1)
ModeDescriptionAUTO_FM [11:0]
1
Default
2Automatic Switching with
3Forced Analog Monobit[11] = 1
1)
The NICAM path may be assigned to “Stereo or A/B”, “Stereo or A”, or “Stereo or B” sourc e chan nel s
(see Table 2–2 on page 11).
Table 6–6: Coding of Automatic NICAM/Analog Sound Switching;
Automatic Sound Select is off (MODUS[0] = 0)
ModeDescriptionAUTO_FM [11:0]
0
reset
status
1Automatic Switching with
2Automatic Switching with
3Forced Analog Mono
Forced NICAM
(Automatic Switching disabled)
internal threshold
(Default, if Automatic Sound
Select is on)
external threshold
(Customizing of Automatic
Sound Select)
(Automatic Switching disabled)
Addr. = 00 21
bit[11]= 0
bit[10:1] = 0
bit[0]= 0
bit[11]= 0
bit[10:1] = 0
bit[0]= 1
bit[11]= 0
bit[10:1] = 25...1000
bit[0]= 1
bit[11]= 1
bit[10:1] = 0
bit[0]= 1
hex
= threshold/2
ERROR_RATEThreshold/dec
nonealways NICAM; Mute in
700NICAM or FM/AM,
set by customer;
recommended
range: 50...2000
nonealways FM/AM
Source Select:
Input at NICAM Path
case of no NICAM available
depending on
ERROR_RATE
Micronas79
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MSP 34x5GPRELIMINARY DATA SHEET
6.3.2. A2 Threshold
The threshold between Stereo/Bilingual and Mono
Identification for the A2 Standard has bee n made programmable according to the user’s preferences. An
internal hysteresis ensures robustness and stability.
2
Table 6–7: Write Register on I
C Subaddress 10
: A2 Threshold
hex
Register
FunctionName
Address
THRESHOLDS
00 22
(write)A2 THRESHOLD Register
hex
Defines threshold of all A2 and EIA_J standards for Stereo and Bilingual
detection
bit[15:0]07F0
force Mono Identif ication
hex
...
0190
default setting after reset
hex
...
00A0
recommended range : 00A0
minimum Threshold for stable detection
hex
hex
6.3.3. Carrier-Mute Threshold
The Carrier-Mute threshold has been made programmable according to the user’s preferences. An inter nal
hysteresis ensures stable behavior.
...03C0
A2_THRESH
hex
Table 6–8: Write Register on I2C Subaddress 10
Register
FunctionName
Address
THRESHOLDS
00 24
(write)Carrier-Mute THRESHOLD Register
hex
Defines threshold for the carrier mute feature
bit[15:0]0000
Carrier-Mute always ON (both channels muted)
hex
...
002A
default setting after reset
hex
...
07FF
Carrier-Mute always OFF
hex
(both channels forced on)
recommended range : 0014
: Carrier-Mute Threshold
hex
...0050
hex
hex
CM_THRESH
80Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
6.3.4. Register AD_CV
The use of this register is no longer recommended.
Use it only in cases where compatibility to the
MSP 34x5D is required. Using the STANDARD
SELECTION register together with the MODUS register provides a more economic way to program the
MSP 34x5G
Table 6–9: AD_CV Register; reset status: all bits are “0”
AD_CV
hex
)
(00 BB
BitFunctionSettings2-8, 0A-51
Automatic setting by
STANDARD SELECT Register
hex
9
[0]not usedmust be set to 000
[1:6]Reference level in case of Automatic Gain
101000100011
Control = on (see Table 6–10). Constant gain
factor when Automatic Gain Control = off
(see Table 6–11).
[7]Determination of Automatic Gain or
Constant Gain
[8]Selection of Sound IF source
0 = constant gain
11
1 = automatic gain
0 = ANA_IN1+XX
(identical to MODUS[8])
[9]MSP-Carrier-Mute Feature0 = off: no mute
11
1 = on: mute as de-
scribed in Section 2.2.2.
[10:15]not usedmust be set to 000
X: not affected while choosing the TV sound standard by means of the STANDARD SELECT Register
Note: This register is initialized during STANDARD SELECTION and is automatically updated when Automatic
Sound Select (MODUS[0]=1) is on.
Table 6–10: Reference values for active AGC (AD_CV[7] = 1)
ApplicationInput Signal ContainsAD_CV [6:1]
Ref. Value
Terrestrial TV
− Dual Carrier FM
− NICAM/FM
− NICAM/AM
− NICAM only
2 FM Carriers
1 FM and 1 NICAM Carrier
1 AM and 1 NICAM Carrier
1 NICAM Carrier only
101000
101000
100011
010100
SAT1 or more FM Carriers100011350.10 − 3 V
ADRFM and ADR carrierssee DRP 3510A data sheet
1)
For signals above 1.4 Vpp, the minimum gain of 3 dB is switched, and overflow of the A/D converter may result. Due to the
robustness of the internal processing, the IC works up to and even more than 3 Vpp, if norm conditions of FM/NICAM or
FM1/FM2 ratio are supposed. In this overflow case, a loss of FM-S/N-ratio of about 10 dB may appear.
AD_CV [6:1]
in decimal
40
40
35
20
Range of Input Signal
at pin ANA_IN1+
0.10 − 3 V
0.10 − 3 V
0.10 − 1.4 V
(recommended: 0.10 − 0.8 Vpp)
0.05 − 1.0 V
1)
pp
1)
pp
pp
pp
1)
pp
Micronas81
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MSP 34x5GPRELIMINARY DATA SHEET
Table 6–11: AD_CV parameters for constant input gain (AD_CV[7]=0)
For signals above 1.4 Vpp, the minimum gain of 3 dB is switched, and overflow of the A/D converter may result. Due to the
robustness of the internal processing, the IC works up to and even more than 3 Vpp, if norm conditions of FM/NICAM or
FM1/FM2 ratio are supposed. In this overflow case, a loss of FM-S/N-ratio of about 10 dB may appear.
6.3.5. Register MODE_REG
Note: The use of this register is no longer recom-
mended. It should be use d only in cases where software compatibility to the MSP 34x5D is required.
Using the STANDARD SELECTION register together
with the MODUS register provides a more economic
way to program the MSP 34x5G.
As soon as this register is applied, the MSP 34x5G
works in the MSP 34x5D Manual/Compatibility
Mode. In this mode, BTSC, EIA-J, and FM-Radio are
disabled. Only MSP 34x5D features are available; the
use of MODUS and STATUS register is not allowed.
The MSP 34x5G is reset to the normal mode by first
programming the MODUS regis ter, followed by transmitting a valid standard code to the STANDARD
SELECTION register.
The register ‘MODE_REG’ contains the control bits
determining the operation mode of the MSP 34x5G in
the MSP 34x5D Manual/Compatibility Mode; Table 6 –
12explains all bit positions.
82Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
Table 6–12: Control word ‘MODE_REG’; reset status: all bits are “0”
MODE_REG 00 83
hex
Automatic setting by
STANDARD SELECT Register
BitFunctionCommentDefinition2 - 58,A,B9
[0]not used0 : must be used000
[1]DCTR_TRIDigital control out
0/1 tri-state
[2]I
2
S_TRII2S outputs tri-state
(I2S_CL, I2S_WS,
0 : active
1 : tri-state
0 : active
1 : tri-state
XXX
XXX
I2S_DA_OUT)
[3]I
[4]I
2
S Mode
2
S_WS ModeWS due to the Sony or
1)
Master/Slave mode
2
of the I
S bus
Philips-Format
0 : Master
1 : Slave
0 : Sony
1 : Philips
XXX
XXX
[5]not used1 : recommendedXXX
[6]NICAM
1)
Mode of MSP-Ch10 : FM
011
1 : Nicam
[7]not used0 : must be used000
[8]FM AMMode of MSP-Ch20 : FM
001
1 : AM
[9]HDEVHigh Deviation Mode
(channel matrix must be
0 : normal
1 : high deviation mode
000
sound A)
[11:10]not used0 : must be used000
[12]MSP-Ch1 Gainsee also Table 6–140 : Gain = 6 dB
000
1 : Gain = 0 dB
[13]FIR1-Filter
Coeff. Set
[14]ADRMode of MSP-Ch1/
[15]AM-GainGain for AM
1)
NICAM and I2S-Master mode are not allowed simultaneouslyX: not affected by
The loading se quences must be o beyed. To chan ge a
coefficient set, the comp lete block FIR1 or FIR2 must
be transmitted.
Note: For compatibility with MSP 3415B, IMREG1 and
IMREG2 have to be transmitted. The value for
IMREG1 and IMREG2 is 004. Due to the partitioning to
8-bit units, the values 04
hex
, and 00
hex
hex
arise.
, 40
6.3.7. DCO-Registers
Note: The use of this register is no longer recom-
mended. It should be used on ly in cases where software compatibility to the MSP 34x5D is required.
Using the STANDARD SELECTION register together
with the MODUS register provides a more economic
way to program the MSP 34x5G.
When selecting a TV-sound standard by means of the
STANDARD SELECT register, all frequency tuning is
performed automatically.
IF manual setting of the tuning frequency is required, a
set of 24-bit registers d etermini ng the mixing frequ encies of the quadrature mixers can be written manually
into the IC. In Table 6–15, some examples of DCO registers are listed . It is necessar y to d ivide them up into
low part and high par t. T he formula for the ca lculation
of the registers for any chosen IF-Frequency is as follows:
8FM/AM_Coef (1)8
9FM/AM_Coef (0)8
6.3.6. FIR-Parameter, Registers FIR1 and FIR2
Note: The use of this register is no longer recom-
mended. Use it only in c ases where softwa re compa tibility to the M SP 34x5D is required. Using t he STANDARD SELECTION register together with the MO DUS
register provides a more economic way to program the
MSP 34x5G.
Data shaping and/or FM/AM bandwidth limitation is
performed by a pair of linear phase Finite Impulse
Response filters (FIR-fil ter). The filter coefficients are
programmable and either are configured automatic ally
by the STANDARD SELECT register or wr itten manually by the control processor via the contro l bus. Two
not necessarily different sets of coefficients are
required: one for MSP-Ch1 ( NICAM or FM2) and on e
for MSP-Ch2 (FM1 = FM-mono). In Table 6–14 several
coefficient sets are proposed.
INCR
= int(f/fs ⋅ 224)
dec
with: int = integer function
f= IF-frequency in MHz
= sampling frequency (18.432 MHz)
f
S
Conversion of INCR into hex-format and separation of
the 12-bit low and high parts lead to the required register values (DCO1_HI or _LO for MSP-Ch1, DCO2_HI
or LO for MSP-Ch2).
To load the FIR-filter s, the following data values are to
be transferred 8 bits at a time embeddedLSB-bound in a 16-bit word.
84Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
Table 6–14: 8-bit FIR-coefficients (decimal integer) for MSP 34x0D; reset status: all coefficients are “0”
6.4. Manual/Compatibility Mode:
Description of Demodulator Read Registers
Note: The use of these register is no longer recom-
mended. It should be use d only in cases where software compatibility to the MSP 34x5D is required.
Using the STANDARD SELECTION register together
with the STATUS register provides a more economic
way to program the MSP 34x5G and to retrieve information from the IC.
All registers except C_AD_BITs are 8 bit wide. They
can be read out of the RAM of the MSP 34x5G if the
MSP 34x5D compatibility mode is required.
All transmissions take place in 16 -bit words. The valid
8-bit data are the 8 LSBs of the received data word.
If the Automatic Sound Select feature is n ot used, the
NICAM or FM-identification pa rameters must be read
and evaluated by the controller in order to enable
appropriate switching of the channel select matrix of
the baseband processing part. The FM-identification
registers are descr ibed i n Section 6.6.1.To h andle the
NICAM-sound and to observe the NICAM-quality, at
least the registers C_AD_BITS and ERROR_RATE
must be read and evaluated by the controller. Additional data bits a nd CIB b its, if su pplied by the NICAM
transmitter, can be obtained by reading the registers
ADD_BITS and CIB_BITS.
Table 6–16: NICAM operation modes as defined by
the EBU NICAM 728 specification
chronization (S = 1). If S = 0, the MSP 3415/3455G
has not yet synchronized correctly to frame and
sequence, or has lost synchronization. T he remaining
read registers are therefore not valid. The MSP mutes
the NICAM output au tomatically and trie s to synchronize again as long as MODE_REG[6] is set.
The operation mode is coded by C4-C1 as s hown in
Table 6–16.
Note: It is no longer necess ar y to read out and evaluate the C_AD_BITS. All evaluation is performed in the
MSP and indicated in the STATUS register.
6.4.2. Additional Data Bits Register
Contains the remaining 8 of the 11 additional data bits.
The additional data bits are not yet defined by the
NICAM 728 system.
Format:
MSBADD_BITS 00 38
76543210
A[10]A[9]A[8]A[7]A[6]A[5]A[4]A[3]
hex
LSB
6.4.3. CIB Bits Register
Cib bits 1 and 2 (see NICAM 728 specifications).
Format:
MSBCIB_BITS 00 3E
76543210
hex
LSB
xxxxxxCIB1CIB2
86Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
6.4.4. NICAM Error Rate Register
ERROR_RATE00 57
Error free0000
maximum error rate07FF
hex
hex
hex
Average error rate of the NICAM reception in a time
interval of 182 ms, which should be close to 0. The initial and maximum value of ERROR_RATE is 2047.
This value is also active if the NICAM bit of
MODE_REG is not se t. Sinc e the value i s achieved by
filtering, a cer tain transition time (approx. 0.5 sec) is
unavoidable. Acceptable audio may have error rates
up to a value of 700 int. Individual evaluation of this
value by the controller and an appropriate threshold
may define the fallback mode from NICAM to FM/
AM-mono in case of poor NICAM reception.
The bit error rate per second (B ER) can be calculat ed
by means of the following formula:
−6
BER= ERROR_RATE * 12.3*10
/s
6.4.5. PLL_CAPS Readback Register
It is possible to read out the actual setting of the
PLL_CAPS. In standard applications, this register is
not of interest for the customer.
PLL_CAPS02 1F
hex
L
6.4.7. Automatic Search Function for FM-Carrier
Detection in Satellite Mode
The AM demodulation ability of the MSP 3415G and
MSP 3455G offers the possibility to calculate the “field
strength” of the momentarily selected FM carrier,
which can be read ou t by the con troll er. In SAT recei vers, this feature can be used to make automatic FM
carrier search possible.
For this, the MSP has to be switched to AM-mode
(MODE_REG[8]), FM-Prescale must be set to
7F
hex
=+127
, and the FM DC notch (see
dec
Section 6.5.7.)must be switched off. The sound-IF frequency range must now be “scanned” in the
MSP-channel 2 by means of the programmable
quadrature mixer with an approp riate incremental fre quency (i.e. 10 kHz). After each incrementation, a field
strength value is available at the qua si-peak detector
output (quasi-peak detector source must be set to
FM), which must be examined for relative maxima by
the controller. This result s in either continuing s earch
or switching the MSP back to FM demodulation mode.
During the se arch process, the FIR2 must be loaded
with the coefficient set “AUTOSEARCH”, which
enables small bandwidth , resulting in approp riate field
strength characteristics. The absolute field strength
value (can be read out o f “quasi peak dete ctor output
FM1”) also gives information on whether a main FM
carrier or a subcarrier was detected; and as a practical
consequence, the FM bandwidth (FIR1/2) and the
deemphasis (50 µs or adaptive) can be switched
accordingly.
It is possible to read out the actual setting of
AGC_GAIN in Automatic Gain Mode. In standard
applications, this re gister is not of i nterest for the customer.
AGC_GAIN02 1E
max. amplification
(20 dB)
min. amplification
(3 dB)
hex
0001 010014
0000 000000
hex
hex
Due to the fact that a constant demodulation frequency
offset of a few kHz, lea ds to a DC level in the demodulated signal, further fine tu ni ng o f th e found ca rr i er c an
be achieved by evaluating the “DC Level Readout
FM1”. Therefore, the FM DC Notch must be switched
on, and the demodulator part must be switched back to
FM-demodulation mode.
For a detailed description of the automatic search
function, please refer to the correspo nding MSP Windows software.
Micronas87
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MSP 34x5GPRELIMINARY DATA SHEET
6.5. Manual/Compatibility Mode:
Description of DSP Write Registers
This table shows more mode s for the channel matrix
registers.
The sum/difference mode can be used together with
the quasi-peak detecto r to determine th e sound material mode. If the di fference signal on channel B (right)
is near to zero, and the sum signal on cha nnel A (left)
is high, the incomi ng a udi o s ignal i s m ono. If there is a
significant level on the difference signal, the incom ing
audio is stereo.
Note: This register is initialized during STANDARD
SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on.
6.5.4. FM Adaptive Deemphasis
FM Adaptive
Deemphasis WP1
OFF0000 000000
WP10011 11113F
00 0F
RESET
hex
L
hex
hex
Note: This register is initialized during STANDARD
SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on.
6.5.5. NICAM Deemphasis
A J17 Deemphasis is always applied to the NICAM signal. It is not switchable.
88Micronas
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PRELIMINARY DATA SHEETMSP 34x5G
6.5.6. Identification Mode for A2 Stereo Systems
Identification Mode00 15
Standard B/G
(German Stereo)
Standard M
(Korean Stereo)
Reset of Ident-Filter0011 11113F
hex
0000 000000
RESET
0000 000101
L
hex
hex
hex
To shorten the response ti me of the i den tific ati on al gorithm after a p rogram change between two F M-Stereo
capable programs, the reset of the ident-filter can be
applied.
Sequence:
1. Program change
2. Reset ident-filter
3. Set identification mode back to standard B/G or M
4. Wait approx. 500 ms
5. Read stereo detection register
6.6. Manual/Compatibility Mode:
Description of DSP Read Registers
All readable registers are 16-bit wide. Transmissions
2
C bus have to take place in 16-bit words. Some of
via I
the defined 16-bit words are divided into low and high
byte, thus holding two different control entities.
These registers are not writable.
6.6.1. Stereo Detection Register
for A2 Stereo Systems
Stereo Detection
Register
Stereo ModeReading
MONOnear zero
STEREOpositive value (ideal
BILINGUALnegative value (ideal
00 18
hex
(two’s complement)
reception: 7F
reception: 80
hex
hex)
)
H
Note: This register is initialized during STANDARD
SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on.
6.5.7. FM DC Notch
The DC compensation filter (FM DC Notch) for FM
input can be switched off. This is used to spee d up the
automatic search functio n (see Section 6.4.7.). In normal FM-mode, the FM DC Notch shou ld be switched
on.
FM DC Notch00 17
ON0000 000000
OFF0011 11113F
hex
Reset
L
hex
hex
Note: It is no longer necessary to read out and evaluate the A2 identification level. All evaluation is performed in the MSP a nd ind ic ate d in th e S TATUS register.
6.6.2. DC Level Register
DC Level Readout
FM1 (MSP-Ch2)
DC Level Readout
FM2 (MSP-Ch1)
DC Level[8000
00 1B
hex
00 1C
hex
... 7FFF
hex
values are 16 bit two’s
complement
H+L
H+L
hex
]
The DC level register measures the D C componen t of
the incoming FM s ignals (FM 1 and FM2). T his can be
used for seek functions in satellite receivers and for IF
FM frequencies fine tuning. A too low demodulation
frequency (DCO) results in a positive DC-Level and
vice versa. For further processing, the DC content of
the demodulated FM signals is suppressed. Th e time
constant τ, defining the transition time of the DC Level
Register, is approximately 28 ms.
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MSP 34x5GPRELIMINARY DATA SHEET
6.7. Demodulator Source Channels in Manual Mode
6.7.1. Ter restric Sound Standards
Ta b le 6 –17 s hows the source ch annel assignment of
the demodulated signals in case of manual mode for
all terrestric sound standards. See Table 2–2 for the
assignment in the Automatic Sound Select mode. In
manual mode for terrestric s ound standards, only two
demodulator sources are defined.
6.7.2. SAT Sound Standards
Table 6–18 shows the source channel assignment of
the demodulated signals for SAT sound standards.
6.8. Excl usions of Audio Baseband Features
In general, all fun ctions can be switched indepen dently.
Two exceptions exist:
1. NICAM cannot be processed simultaneously with
the FM2 channel.
2. FM adaptive deemphasis cannot be processed
simultaneously with FM-identification.
6.9. Compatibility Restrictions to MSP 34x5D
The MSP 34x5G is fully hardware compatible to the
MSP 34x5D. However, to substitute a MSP 34x5D by
the corresponding MS P 34x5G, the controller so ftware
has to be adapted slightly:
1. The register FM-Matrix (00 0E
changed from “no matr ix (00
)” during mono transmission of all TV-sound
(03
hex
low part) must be
hex
)” to “sound A mono
hex
standards (see also Tabl e 6–17).
2. With the MSP 34x5G, the STANDARD SELECTION
initializes the FM-deemphasis, which is not the case
for the MSP 34x5D. So, if STANDARD SELECTION
is applied, this I
2
C instruction can be omitted.
90Micronas
Page 91
PRELIMINARY DATA SHEETMSP 34x5G
Table 6–17: Manual Sound Select Mode for Terrestric Sound Standards
Source Channels of Sound Select Block
Broadcasted
Sound
Standard
B/G-FM
D/K-FM
M-Korea
M-Japan
B/G-NICAM
L-NICAM
I-NICAM
D/K-NICAM
D/K-NICAM
(with high
deviation FM)
BTSC
Selected MSP
Standard
Code
03
04, 05
02
30
08
09
0A
0B
0C
0D
20
21
Broadcasted
Sound Mode
FM MatrixFM/AM
(use 0 for channel select)
Stereo or A/B
(use 1 for channel select)
MONO Sound A MonoMonoMono
STEREOGerman Stereo
StereoStereo
Korean Stereo
BILINGUAL,
Languages A and B
NICAM not available
or NICAM error rate
too high
MONO Sound A Mono
STEREOSound A Mono
BILINGUAL,
Languages A and B
No MatrixLeft = A
Right = B
1)
Sound A Mono
Sound A Mono
analog Monono sound
1)
analog MonoNICAM Mono
1)
analog MonoNICAM Stereo
1)
analog MonoLeft = NICAM A
Left = A
Right = B
with AUTO_FM:
analog Mono
Right = NICAM B
MONOSound A MonoMonoMono
STEREOKorean StereoStereoStereo
MONO + SAPSound A MonoMonoMono
STEREO + SAPKorean StereoStereoStereo
MONO
Sound A MonoMonoMono
STEREO
MONO + SAP
No Matrix
STEREO + SAP
Left = Mono
Right = SAP
Left = Mono
Right = SAP
FM-Radio40
MONOSound A MonoMonoMono
STEREOKorean StereoStereoStereo
1)
Automatic refresh to Sound A Mono, do not write any other value to the register FM Matrix!
Table 6–18: Manual Sound Select Modes for SAT-Standards
Source Channels of Sound Select Block for SAT-Modes
Broadcasted
Sound
Standard
FM SAT
Selected
MSP Standar d
Code
6, 50
hex
51
hex
Broadcasted
Sound Mode
MONO Sound A MonoMonoMonoMonoMono
STEREO No MatrixStereoStereoStereoStereo
BILINGUALNo MatrixLeft = A (FM1)
FM MatrixFM/AM
(source select: 0)
Right = B (FM2)
Stereo or A/B
(source select: 1)
Left = A (FM1)
Right = B (FM2)
Stereo or A
(source select: 3)
A (FM1)B (FM2)
Stereo or B
(source select: 4)
Micronas91
Page 92
MSP 34x5GPRELIMINARY DATA SHEET
7. Appendix D: Application Information
7.1. Phase Relationship of Analog Outputs
The user does not need to correct output phases when
using the loudspeaker output directly. The SCART1
output has opposite phase.
The following schematics shows the phase relationship of all analog inputs and outputs.
Loudspeaker
SCART1
SCART
SCART2
MONO
DSP
Input
Select
Fig. 7–1: Phase diagram of the MSP 34x5G
Audio
Baseband
Processing
MONO, SCART1...2
SCART1-Ch.
SCART1
SCART
Output Select
92Micronas
Page 93
PRELIMINARY DATA SHEETMSP 34x5G
7.2. Application Circuit
AHVSS
Signal GND
Tuner
330 nF
330 nF
330 nF
330 nF
330 nF
SIF 1 IN
56 pF56 pF
MONO_IN
SC1_IN_L
SC1_IN_R
ASG
SC2_IN_L
SC2_IN_R
C s. section 4.6.2.
100
10
µF
-
nF
+
3.3 µF100
18.432
MHz
nF
+
8V (5V)
+
10 µF
100 p56 p
1kΩ
ANA_IN1+
Alternative circuit for
SIF-input for more
attenuation of video
components:
8. Appendix E: MSP 34x5G Version History
MSP 3435G-A2
First release for BTSC-Stereo/SAP and FM-Radio.
MSP 34x5G-B5
– additional package PLQFP64
– digital input specification changed as of version B5
and later (see Section 4.6. on page 53)
– max. analog high supply voltage AHVSUP 8.7 V.
– supply currents changed as of version B5 and later
(see Section 4.6.3. on page 57)
– programmable A2 and carrier mute thresholds
– new D/K standard 0D
: HDEV3 and NICAM
hex
– additional preference in Automatic Standard Detec-
tion
MSP 34x5G-B6
– improved AM-performance (see page 68)
– new D/K standard for Poland
(see Table 3–7 on page 20)
– improved I
2
C hardwa re proble m handling
(see Section 3.1.1. on page 15)
9. Data Sheet History
1. Preliminary data sheet: “MSP 34x5G Multistandard
Sound Processor Family, Edition Oct. 26, 1998, 6251480-1PD. First release of th e p rel im in ary data s hee t .
2. Preliminary data sheet: “MSP 34x5G Multistandard
Sound Processor Family”, Edition July 11, 2000, 6251480-2PD. Second release of the preliminary data
sheet. Major changes:
– section Specifications: specification for PLQFP64
package added
– specification for version B5 and B6 added
(see Appendix E: Version History)
– reset description modified
2
S and ADR functionality added
– I
– MSP 3425G and MSP 3465G added
– Multistandard controller software flow diagram
added
3. Preliminary data sheet: “MSP 34x5G Multistandard
Sound Processor Family”, Jan. 19, 2001, 6251-4803PD. Third release of the preliminary data sheet. Major
changes:
– Section 4.2.: pin allocation for PLQFP64 corrected
2
– I
C-bus description changed
– ACB register: documentation for bit allocation
D_CTR_I/O changed
– faster system-D/K-loop for stereo detection
– extended features in the CONTROL register
(see Section 3.1.2. on page 16)
MSP 34x5G-B8
– fine-tuning of A2-identification and carrier mute
– EIA-J identification: faster transition time stereo/
bilingual to mono
– J17 FM-deemphasis implemented
– input specification for RESETQ and TESTEN
All information and data contained in this data sheet are without any
commitment, are not to be considered as an offer for conclusion of a
contract, nor shall they be construed as to create any liability. Any new
issue of this data sheet invalidates previous issues. Product availability
and delivery are exclusively subject to our respective order confirmation
form; the same applies to orders based on development samples delivered. By this publication, Micronas GmbH does not assume responsibility for patent infr ingements or other right s of third parties whic h may
result from its use.
Further, Micronas GmbH reserves the right to revise this publication
and to make changes to its content, at any time, without obligation to
notify any pe r so n or en tity of such revisions or cha ng es.
No part of this publication may be reproduced, photocopied, stored on a
retrieval system, or transmitted without the express written consent of
Micronas GmbH .
94Micronas
Page 95
PRELIMINARY DATA SHEETMSP 34X5G
Freigabe-Exemplar
Dec. 11, 2000
6251-480-3PD
Micronas95
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