Page 1
TL/F/5877
MM54C00/MM74C00, MM54C02/MM74C02, MM54C04/MM74C04,
MM54C10/MM74C10, MM54C20/MM74C20
February 1988
MM54C00/MM74C00 Quad 2-Input NAND Gate
MM54C02/MM74C02 Quad 2-Input NOR Gate
MM54C04/MM74C04 Hex Inverter
MM54C10/MM74C10 Triple 3-Input NAND Gate
MM54C20/MM74C20 Dual 4-Input NAND Gate
General Description
These logic gates employ complementary MOS (CMOS) to
achieve wide power supply operating range, low power consumption, high noise immunity and symmetric controlled
rise and fall times. With features such as this the 54C/74C
logic family is close to ideal for use in digital systems. Function and pin out compatibility with series 54/74 devices minimizes design time for those designers already familiar with
the standard 54/74 logic family.
All inputs are protected from damage due to static discharge by diode clamps to V
CC
and GND.
Features
Y
Wide supply voltage range 3V to 15V
Y
Guaranteed noise margin 1V
Y
High noise immunity 0.45 VCC(typ.)
Y
Low power consumption 10 nW/package (typ.)
Y
Low power Fan out of 2
TTL compatibility driving 74L
Connection Diagrams
Dual-In-Line Packages
MM54C00/MM74C00
TL/F/5877– 1
Top View
Order Number MM54C00 or
MM74C00
MM54C02/MM74C02
TL/F/5877– 2
Top View
Order Number MM54C02 or
MM74C02
MM54C04/MM74C04
TL/F/5877– 3
Top View
Order Number MM54C04
or MM74C04
MM54C10/MM74C10
TL/F/5877– 4
Top View
Order Number MM54C10 or
MM74C10
MM54C20/MM74C20
TL/F/5877– 5
Top View
Order Number MM54C20 or
MM74C20
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Page 2
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Voltage at Any Pin
b
0.3V to V
CC
a
0.3V
Operating Temperature Range
54C
b
55§Ctoa125§C
74C
b
40§Ctoa85§C
Storage Temperature Range
b
65§Ctoa150§C
Operating V
CC
Range 3.0V to 15V
Maximum VCCVoltage 18V
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
Lead Temperature
(Soldering, 10 seconds) 300
§
C
DC Electrical Characteristics
Min/Max limits apply across the guaranteed temperature range unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
V
IN(1)
Logical ‘‘1’’ Input Voltage V
CC
e
5.0V 3.5 V
V
CC
e
10V 8.0 V
V
IN(0)
Logical ‘‘0’’ Input Voltage V
CC
e
5.0V 1.5 V
V
CC
e
10V 2.0 V
V
OUT(1)
Logical ‘‘1’’ Output Voltage V
CC
e
5.0V, I
O
eb
10 mA 4.5 V
V
CC
e
10V, I
O
eb
10 mA 9.0 V
V
OUT(0)
Logical ‘‘0’’ Output Voltage V
CC
e
5.0V, I
O
e
10 mA 0.5 V
V
CC
e
10V, I
O
e
10 mA 1.0 V
I
IN(1)
Logical ‘‘1’’ Input Current V
CC
e
15V, V
IN
e
15V 0.005 1.0 mA
I
IN(0)
Logical ‘‘0’’ Input Current V
CC
e
15V, V
IN
e
0V
b
1.0
b
0.005 mA
I
CC
Supply Current V
CC
e
15V 0.01 15 mA
LOW POWER TO CMOS
V
IN(1)
Logical ‘‘1’’ Input Voltage 54C, V
CC
e
4.5V V
CC
b
1.5 V
74C, V
CC
e
4.75V V
CC
b
1.5 V
V
IN(0)
Logical ‘‘0’’ Input Voltage 54C, V
CC
e
4.5V 0.8 V
74C, V
CC
e
4.75V 0.8 V
V
OUT(1)
Logical ‘‘1’’ Output Voltage 54C, V
CC
e
4.5V, I
O
eb
10 mA 4.4 V
74C, V
CC
e
4.75V, I
O
eb
10 mA 4.4 V
V
OUT(0)
Logical ‘‘0’’ Output Voltage 54C, V
CC
e
4.5V, I
O
e
10 mA 0.4 V
74C, V
CC
e
4.75V, I
O
e
10 mA 0.4 V
CMOS TO LOW POWER
V
IN(1)
Logical ‘‘1’’ Input Voltage 54C, V
CC
e
4.5V 4.0 V
74C, V
CC
e
4.75V 4.0 V
V
IN(0)
Logical ‘‘0’’ Input Voltage 54C, V
CC
e
4.5V 1.0 V
74C, V
CC
e
4.75V 1.0 V
V
OUT(1)
Logical ‘‘1’’ Output Voltage 54C, V
CC
e
4.5V, I
O
eb
360 mA 2.4 V
74C, V
CC
e
4.75V, I
O
eb
360 mA 2.4 V
V
OUT(0)
Logical ‘‘0’’ Output Voltage 54C, V
CC
e
4.5V, I
O
e
360 mA 0.4 V
74C, V
CC
e
4.75V, I
O
e
360 mA 0.4 V
OUTPUT DRIVE (see 54C/74C Family Characteristics Data Sheet) T
A
e
25§C (short circuit current)
I
SOURCE
Output Source Current V
CC
e
5.0V, V
IN(0)
e
0V, V
OUT
e
0V
b
1.75 mA
I
SOURCE
Output Source Current V
CC
e
10V, V
IN(0)
e
0V, V
OUT
e
0V
b
8.0 mA
I
SINK
Output Sink Current V
CC
e
5.0V, V
IN(1)
e
5.0V, V
OUT
e
V
CC
1.75 mA
I
SINK
Output Sink Current V
CC
e
10V, V
IN(1)
e
10V, V
OUT
e
V
CC
8.0 mA
2
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AC Electrical Characteristics* T
A
e
25§C, C
L
e
50 pF, unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
MM54C00/MM74C00, MM54C02/MM74C02, MM54C04/MM74C04
t
pd0,tpd1
Propagation Delay Time to V
CC
e
5.0V 50 90 ns
Logical ‘‘1’’ or ‘‘0’’
V
CC
e
10V 30 60 ns
C
IN
Input Capacitance (Note 2) 6.0 pF
C
PD
Power Dissipation Capacitance (Note 3) Per Gate or Inverter 12 pF
MM54C10/MM74C10
t
pd0,tpd1
Propagation Delay Time to V
CC
e
5.0V 60 100 ns
Logical ‘‘1’’ or ‘‘0’’
V
CC
e
10V 35 70 ns
C
IN
Input Capacitance (Note 2) 7.0 pF
C
PD
Power Dissipation Capacitance (Note 3) Per Gate 18 pF
MM54C20/MM74C20
t
pd0,tpd1
Propagation Delay Time to V
CC
e
5.0V 70 115 ns
Logical ‘‘1’’ or ‘‘0’’
V
CC
e
10V 40 80 ns
C
IN
Input Capacitance (Note 2) 9 pF
C
PD
Power Dissipation Capacitance (Note 3) Per Gate 30 pF
*AC Parameters are guaranteed by DC correlated testing.
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: Capacitance is guaranteed by periodic testing.
Note 3: C
PD
determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics Application
NoteÐAN-90.
Typical Performance Characteristics
Gate Transfer Characteristics Over Temperature vs V
CC
Guaranteed Noise Margin
Power Dissipation vs Frequency
MM54C02/MM74C02,
MM54C00/MM74C00,
MM54C04/MM74C04
TL/F/5877– 6
3
Page 4
Typical Performance Characteristics (Continued)
Ambient Temperature
Propagation Delay vs
MM54C00/MM74C00,
MM54C04/MM74C04
MM54C02/MM74C02,
Ambient Temperature
Propagation Delay vs
MM54C00/MM74C00,
MM54C04/MM74C04
MM54C02/MM74C02,
Load Capacitance
Propagation Delay Time vs
MM54C00/MM74C00,
MM54C04/MM74C04
MM54C02/MM74C02,
TL/F/5877– 7
Propagation Delay Time vs
Load Capacitance
MM54C10/MM74C10
TL/F/5877– 8
Propagation Delay Time vs
Load Capacitance
MM54C20/MM74C20
TL/F/5877– 9
Switching Time Waveforms and AC Test Circuit
CMOS to CMOS
TL/F/5877– 10
TL/F/5877– 11
Note: Delays measured with input tr,t
f
s
20 ns.
4
Page 5
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number MM54C00J, MM54C02J, MM54C04J, MM54C10J, MM54C20J,
MM74C00J, MM74C02J, MM74C04J, MM74C10J or MM74C20J
NS Package Number J14A
5
Page 6
MM54C00/MM74C00, MM54C02/MM74C02, MM54C04/MM74C04,
MM54C10/MM74C10, MM54C20/MM74C20
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number MM54C00N, MM54C02N, MM54C04N, MM54C10N, MM54C20N,
MM74C00N, MM74C02N, MM74C04N, MM74C10N or MM74C20N
NS Package Number N14A
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
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