• 6.7MHz Y and C filters, with CV out for NTSC or PAL
•75Ω cable line driver for Y, C, CV, and TV modulator
• 43dB stopband attenuation at 27MHz
• 1dB flatness up to 4.8MHz
• No external frequency select components or clocks
• 12ns group delay flatness up to 10MHz
• 5% overshoot on any input edge
•AC coupled input and output (ML6428CS-1)
•AC coupled input and DC coupled output
(ML6428CS-2)
• 0.4% differential gain on all channels, 0.4º differential
phase on all channels
• 0.7% total harmonic distortion on all channels
• 5V ±10% operation
• DC restore with low tilt
General Description
The ML6428 is a dual Y/C 4th-order Butterworth lowpass
video filter optimized for minimum overshoot and flat group
delay. The device also contains a summing circuit to generate filtered composite video.
The Y and C input signals from DACs are AC coupled into
the ML6428. Both channels have DC restore circuitry to
clamp the DC input levels during video sync. The Y channel
uses a sync tip clamp. The CV and the C channels share a
feedback clamp.
All outputs must be AC coupled into their loads for the -1
version. The -2 version must be DC coupled. All inputs (-1
and -2 versions) are AC coupled. The Y or C outputs can
drive 2VP-P into a 150Ω load, while the CV output can drive
2VP-P into 75Ω. Thus the CV output is capable of driving
two independent 150Ω loads to 2VP-P.
On the CV output, one of the 75Ω loads can be shorted to
ground with no loss of drive to the remaining load. The Y, C
and CV channels have a gain of 2 (6dB) with 1VP-P input
levels.
Block Diagram
YIN
CIN
VCCOVCC
72
1
SYNC TIP CLAMP
4
4th-ORDER
FILTER
TRANSCONDUCTANCE
ERROR AMP
4th-ORDER
FILTER
3
GND
8
6
5
YOUT
CVOUT
COUT
BUFFER
+
Σ
+
BUFFER
BUFFER
REV. 1B April 2003
Page 2
ML6428DATA SHEET
Pin Configuration
ML6428
8-Pin SOIC (S08)
YIN
VCC
GND
CIN
1
2
3
4
TOP VIEW
8
YOUT
7
VCCO
6
CVOUT
5
COUT
Pin Description
PinNameFunction
1YINLuminance input
2VCC5V supply for filters and references
3GNDGround
4CINChrominance input
5COUTChrominance output
6CVOUTComposite video output
7VCCO5V supply for output stages
8YOUTLuminance output
Electrical Characteristics
Absolute Maximum Ratings
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum
ratings are stress ratings only and functional device operation is not implied.
ParameterMin.Max.Units
DC Supply Voltage -0.37V
Analog & Digital I/OGND – 0.3V
Output Current (Continuous)
CV Channel
C and Y Channels
Junction Temperature150°C
Storage Temperature Range–65150°C
Lead Temperature (Soldering, 10 sec)260°C
Thermal Resistance (θJA)67°C/W
Operating Conditions
ParameterMin.Max.Units
Temperature Range070°C
VCC Range4.55.5V
+ 0.3V
CC
60
30
mA
mA
2REV. 1B April 2003
Page 3
DATA SHEETML6428
Electrical Table Unless otherwise specified, V
outputs must be AC coupled, ML6428-2 outputs must be DC coupled. TA = Operating Temperature Range
SymbolParameterConditionsMin.Typ.Max.Units
ICCSupply CurrentNo Load (VCC = 5.0V)5280mA
AVLow Frequency Gain (All Channels)VIN = 100mVP-P at 300KHz5.346.06.65dB
C DC Output Level (During Sync)Sync Present on Y1.71.92.3V
Y Sync Output Level ML6428-1Sync Present on Y0.70.91.3V
ML6428-2Sync Present on Y0.350.540.95V
Y+C Sync Output
Level
tCLAMPClamp Response Time (Y Channel)Settled to Within 10mV2ms
f1dB-1dB Bandwidth (Flatness)
(All Channels)
fC-3dB Bandwidth (Flatness)
(All Channels)
0.8fC0.8 x fC Attenuation (Y, C)1.5dB
fSBStopband Rejection (All Channels)fIN = 27MHz to 100MHz worst
ViInput Signal Dynamic Range AC Coupled ML6428-1, -21.01.4VP-P
NOISEOutput Noise (All Channels)25Hz to 50MHz2.3mVRMS
OSPeak Overshoot (All Channels)2VP-P Output Pulse (loaded)4.3%
PSRRPSRR (All Channels)0.5VP-P (100kHz) at VCC–49dB
tpdGroup Delay (All Channels)100kHz60ns
∆tpdGroup Delay Deviation from
Flatness
(All Channels)
tSKEWSkew Between Y & C Outputs1ns
ML6428-1Sync Present on Y0.70.921.3V
ML6428-2Sync Present on Y0.350.480.95V
= 5V ±10%, All inputs AC coupled with 100nF, ML6428-1
CC
4.04.8MHz
6.7MHz
–42–38dB
case
VOUT C, Y, or CV (Note 2)100mA
All Outputs35pF
0.7%
Y/C Out at 3.58MHz/4.43MHz
–55dB
3.58MHz/4.43MHz, to Y
Output
From Y Input of 0.4VP-P at
3.58MHz, to C Output
to 3.58MHz (NTSC)4ns
to 4.43MHz (PAL) without
peaking (see Figures 7 to 11)
to 10MHz12ns
–58dB
7ns
1
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
2: Sustained short circuit protection limited to 10 seconds.
REV. 1B April 20033
Page 4
ML6428DATA SHEET
Functional Description
The ML6428 is a dual monolithic continuous time video
filter designed for reconstructing the luminance and
chrominance signals from an S-Video D/A source.
Composite video output is generated by summing the Y
and C outputs. The ML6428CS-1 is intended for use in AC
coupled input and output applications. The ML6428CS-2 is
intended for AC coupled input and DC coupled output
applications (see Figures 5 and 6).
The filters have a 4th-order Butterworth characteristic with
an optimization toward low overshoot and flat group delay.
All outputs are capable of driving 2VP-P into 150Ω video
loads, with up to 35pF of load capacitance at the output pin.
ML6428CS-1 outputs are AC coupled, ML6428CS-2 outputs
are DC coupled. The CV output can drive two video loads
plus a high-impedance modulator. Thus the CV output is
intended to simultaneously drive a VCR, a TV, and a highimpedance modulator. Y and C are capable of driving a 75Ω
load at 1VP-P. The ML6428 is capable of driving two composite loads and a TV modulator simultaneously.
All channels are clamped during sync to establish the appropriate output voltage swing range. Thus the input coupling
capacitors do not behave according to the conventional RC
time constant. Clamping for all channels settles within 2ms
of a change in video input sources.
In most applications, the ML6428's input coupling capacitors
are 0.1µF. The Y input sinks 1.6µA during active video,
which nominally tilts a horizontal line by 2mV (max) at
the Y output (Figure 4). During sync, the clamp typically
sources 20µA to restore the DC level. The net result is that
the average input current is zero.
Any change in the input coupling capacitor's value will
inversely alter the amount of tilt per line. Such a change
will also linearly affect the clamp response times.
The C channel has no pulldown current sources and is essentially tilt-free. Its input is clamped by a feedback amp which
responds to the CV output. Since CV = Y+C, the CV output
will droop by the same amount as Y during active video, and
will rise by the same amount as Y during sync.
The ML6428 is robust and stable under all stated load and
input conditions. Capacitavely bypassing both VCC pins
directly to ground ensures this performance. (See Figures 5
and 6)
capacitance (at the output pin) can be driven without stability
or slew issues. A 220µF AC coupling capacitor is recommended at the output (ML6428-1 only).
Chrominance (C) I/O
The chroma input is driven by a low impedance source of
0.7VP-P or the output of a 75Ω terminated line. The input is
required to be AC coupled via a 0.1uF coupling capacitor
which allows for a nominal clamping time of 1ms. The
chroma output is capable of driving a 150Ω load at 2VP-P
or 1VP-P into a 75Ω load. ML6428CS-1 outputs are AC
coupled, ML6428CS-2 outputs are DC coupled. Up to 35pF
of load capacitance can be driven without stability or slew
issues. A 220µF AC coupling capacitor is recommended at
the output (ML6428-1 only).
Composite video (CV) output
The composite video output is capable of driving 2 CV loads
to 2VP-P and a high input impedance CV modulator.
ML6428CS-1 outputs are AC coupled, ML6428CS-2 outputs
are DC coupled. It is intended to drive three devices: TV,
VCR, and a modulator. The TV or VCR input can be shorted
to ground and the other outputs will still meet specifications.
Up to 35pF of load capacitance (at the output pin) can be
driven without stability or slew issues.
Using the ML6428 for PAL Applications
The ML6428 can be optimized for PAL video by adding
frequency peaking to the composite and S-video outputs.
Figures 7 and 8 illustrate the use of a additional external
capacitor, 330pF, added in parallel to the output source
termination resistor. This raises the frequency response from
1.6 dB down at 4.8Mhz to 0.35dB down at 4.8MHz allowing
for accurate reproduction of the upper sideband of the PAL
subcarrier. Figure 9 shows the frequency response of PAL
video with various values of peaking capacitors (0pF, 220pF,
270pF, 330pF) between 0 and 10MHz.
For NTSC applications without the peaking capacitor the
rejection at 27MHz is 42dB (typical) while for PAL applications with the peaking capacitor the rejection at 27MHz is
38dB (typical). This is shown in Figure 10. The differential
group delay is shown in Figure 11 with and without a peaking capacitor (0pF, 220pF, 270pF, and 330pF) varies slightly
with capacitance, going from 8ns to 13ns.
Luminance (Y) I/O
The luma input is driven by either a low impedance source of
1VP-P or the output of a 75Ω terminated line. The input is
required to be AC coupled via a 0.1uF coupling capacitor
which allows for a nominal settling time of 2ms. The luma
output is capable of driving a 150Ω load at 2VP-P or 1VP-P
into a 75Ω load. ML6428CS-1 outputs are AC coupled,
ML6428CS-2 outputs are DC coupled.Up to 35pF of load
4REV. 1B April 2003
Page 5
DATA SHEETML6428
20
0
–20
–40
–60
–80
AMPLITUDE (dB)
FREQUENCY (MHz)
0.010.1110010
SCALE: 200ms/DIV
SCALE: 200ms/DIV
Region of Tilt
1
0
–1
–2
AMPLITUDE (dB)
–3
–4
00.1110
FREQUENCY (MHz)
All outputs. (Normalized) Passband is ripple-free.
Figure 1. Passband Flatness
90
70
50
DELAY (ns)
30
10
159
FREQUENCY (MHz)
1137481026
Figure 2. Passband/Stopband Rejection Ratios
All outputs. (Normalized)
Low frequency group delay is 62ns. At 3.58MHz group
Figure 3. Group Delay, all Outputs
delay increases by only 4ns. At 4.43MHz group delay
Figure 4. DC Restore Performance of Luma Output
Luma ramp test pattern is shown to have minimal tilt
during vertical sync.
increases by only 7ns. The maximum deviation from flat
group delay of 12ns occurs at 6MHz.
In most applications, the ML6428's input coupling
capacitors are 0.1µF. The Y input sinks 1.6µA during
active video, which tilts a horizontal line by 2mV at the
Y output
REV. 1B April 20035
Page 6
ML6428DATA SHEET
Typical Applications
ML6428-1
220µF
220µF
220µF
220µF
* C AND R DEPEND ON THE INPUT IMPEDANCE OF LOAD
75Ω
75Ω
75Ω
C*
R*
75Ω
VIDEO CABLES
YOU T
75Ω
CVOUT
75Ω
CVOUT
75Ω
ON-CHANNEL
MODULATOR,
VCR, AND TV
COUT
75Ω
YIN
CIN
5V
0.1µF
0.1µF
1
4th-ORDER
FILTER
+
Σ
+
4
4th-ORDER
FILTER
1µF0.1µF
8
6
5
372
YIN
CIN
5V
0.1µF
0.1µF
Figure 5. AC Coupled S-Video and Composite Video Line Driver for NTSC
(Note: ML6428-1 outputs must be AC coupled)
ML6428-2
1
4th-ORDER
FILTER
+
8
6
75Ω
75Ω
Σ
+
4
4th-ORDER
FILTER
1µF0.1µF
5
372
* C AND R DEPEND ON THE INPUT IMPEDANCE OF LOAD
75Ω
C*
R*
75Ω
VIDEO CABLES
YOU T
75Ω
CVOUT
75Ω
CVOUT
75Ω
ON-CHANNEL
MODULATOR,
VCR, AND TV
COUT
75Ω
Figure 6. DC Coupled S-Video and Composite Video Line Driver for NTSC
(Note: ML6428-2 outputs must be DC coupled)
6REV. 1B April 2003
Page 7
DATA SHEETML6428
Typical Applications
ML6428-1
YIN
CIN
5V
0.1µF
0.1µF
1
4th-ORDER
FILTER
+
Σ
+
4
4th-ORDER
FILTER
1µF0.1µF
8
6
5
372
220µF
220µF
220µF
C1*
220µF
* C1, C2, AND R DEPEND ON THE INPUT IMPEDANCE OF LOAD
75Ω
330pF
75Ω
330pF
75Ω
330pF
R*
C2*
75Ω
330pF
VIDEO CABLES
YOUT
75Ω
CVOUT
75Ω
CVOUT
75Ω
ON-CHANNEL
MODULATOR,
VCR, AND TV
COUT
75Ω
YIN
CIN
5V
0.1µF
0.1µF
Figure 7. AC Coupled S-Video and Composite Video Line Driver for PAL
(Note: ML6428-1 outputs must be AC coupled)
ML6428-2
1
4th-ORDER
FILTER
+
Σ
+
4
4th-ORDER
FILTER
1µF0.1µF
8
6
5
C1*
372
* C1, C2, AND R DEPEND ON THE INPUT IMPEDANCE OF LOAD
75Ω
330pF
75Ω
330pF
75Ω
330pF
R*
C2*
75Ω
330pF
VIDEO CABLES
YOUT
75Ω
CVOUT
75Ω
CVOUT
75Ω
ON-CHANNEL
MODULATOR,
VCR, AND TV
COUT
75Ω
Figure 8. DC Coupled S-Video and Composite Video Line Driver for PAL
(Note: ML6428-2 outputs must be DC coupled)
REV. 1B April 20037
Page 8
ML6428DATA SHEET
–0.5
0
0.35dB
WITH
PEAKING
0.5
1.7dB
1
AMPLITUDE (dB)
1.5
2
2.5
04682
1573
330pF
270pF
220pF
0pF
WITHOUT
PEAKING
FREQUENCY (MHz)
Figure 9. NTSC/PAL Video Frequency Response With and Without Peaking Capacitor
0
10
NTSC/PAL
–38dB
20
WITH
PEAKING
30
AMPLITUDE (dB)
40
50
0121830246
31521279
330pF
270pF
220pF
0pF
NTSC/PAL
–42dB
WITHOUT
PEAKING
FREQUENCY (MHz)
Figure 10. Stopband Rejection at 27MHz With and Without Peaking Capacitor
10
8ns
GROUP
DELAY
WITHOUT
PEAKING
0
13ns GROUP
DELAY
DELAY (ns)
–10
–20
0461082
15793
WITH 330pF
PEAKING
330pF
270pF
220pF
0pF
FREQUENCY (MHz)
Figure 11. Group Delay at 5.5MHz (PAL) With and Without Peaking Capacitor
8REV. 1B April 2003
Page 9
DATA SHEETML6428
0
Mechanical Dimensions inches (millimeters)
Package: S08
8-Pin SOIC
0.189 - 0.199
(4.80 - 5.06)
8
0.017 - 0.027
(0.43 - 0.69)
(4 PLACES)
0.055 - 0.061
(1.40 - 1.55)
PIN 1 ID
1
0.050 BSC
(1.27 BSC)
0.012 - 0.020
(0.30 - 0.51)
SEATING PLANE
0.148 - 0.158
(3.76 - 4.01)
0.059 - 0.069
(1.49 - 1.75)
0.228 - 0.244
(5.79 - 6.20)
0.004 - 0.010
(0.10 - 0.26)
0° - 8°
0.015 - 0.035
(0.38 - 0.89)
0.006 - 0.01
(0.15 - 0.26)
REV. 1B April 20039
Page 10
ML6428DATA SHEET
Ordering Information
Part NumberTemperature RangePackage
ML6428CS-10°C to 70°C8 Pin SOIC (S08)
ML6428CS-20°C to 70°C8 Pin SOIC (S08)
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
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which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
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2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.