The ML6415 is a dual Y/C 4th-order Butterworth lowpass
video fi lter optimized for minimum overshoot and fl at
group delay. The device also contains a summing circuit
to generate fi ltered composite video, an audio trap and
group delay compensation circuit to notch-out audio, providing an area for the addition of the FM audio carrier(s)
and mimic the group delay distortion introduced at the
transmitter. The group delay predistortion compensates
for the nominal TV receiver IF fi lter distortion.
In a typical application, the Y and C input signals from
DACs are AC coupled into the fi lter. Both channels have
DC restore circuitry to clamp the DC input levels during
video sync. The Y and C channels use a separate feedback
clamp. The clamp pulse is derived from the Y channel.
The outputs are AC coupled. The Y, C, CV, and modulator
outputs can drive 2Vp-p into a 150Ω load (1Vp-p 75Ω
coax load). The Y, C, CV, and notch channels have a gain
of approximately 2 (6dB) with 1Vp-p input levels.
n 7.1MHz Y and C fi lters, with CV out
n 14dB notch at 4.5MHz for sound trap
n 42dB stopband attenuation at 27MHz on Y, C, and CV
n Better than 1dB fl atness to 4.5 MHz on Y, C, and CV
n RF Modulator output differential group delay between
3.0MHz and 3.58MHz is typically -170ns.
n No external frequency select components or clocks
n 9ns group delay fl atness on Y, C, and CV output
n 5% overshoot on Y, C, and CV output edges
n AC coupled inputs and outputs
n 0.4% differential gain on Y, C and CV channels, 0.4º
differential phase on Y, C and CV channels
n 0.8% total harmonic distortion on all channels
n DC restore with low tilt
APPLICATIONS
n Cable Set-top Boxes
n Satellite Set-top Boxes
n DVD Players
June, 2000DATASHEET
Page 2
ML6415
TABLE OF CONTENTS
General Description..........................................................................................................................................1
Features ............................................................................................................................................................1
Simplifi ed Block Diagram .................................................................................................................................3
Order Information ............................................................................................................................................9
Productsdescribedherein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116;
5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128;
5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977;
5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207;
5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714.
Other patents are pending.
Micro Linear makes no representations or warrantieswith respectto the accuracy, utility, or completeness ofthe contents
ofthispublication and reservesthe rightto make changesto specifi cations andproductdescriptions at anytime without
notice. No license, express or implied, by estoppel or otherwise, to anypatents or other intellectualproperty rights is
granted bythisdocument. The circuits contained in thisdocument are offered aspossible applications only. Particular
uses or applications may invalidate some of the specifi cations and/or productdescriptions containedherein. The customer
is urgedto perform its own engineering review before deciding on a particular application. Micro Linear assumes
no liabilitywhatsoever, anddisclaims any express or impliedwarranty, relatingto sale and/or use of Micro Linear
products includingliability or warranties relatingto merchantability, fitnessfor a particular purpose, or infringement of
any intellectualproperty right. Micro Linear products are notdesignedfor use in medical,life saving, or life sustaining
applications.
DatasheetJune, 20002
Page 3
SIMPLIFIED BLOCK DIAGRAM
SYNC STRIP,
REFERENCE,
AND TIMING
ML6415
VCC
7
YIN
CIN
1
4
4TH – ORDER
FILTER
gM
1V
gM
4TH – ORDER
FILTER
1V
+
Σ
+
×2
×2
3
GND
×2
NOTCH,
GROUP
DELAY
6
2
5
YOUT
CVOUT
RF MOD
COUT
June, 2000Datasheet3
Page 4
PIN CONFIGURATION
YIN
RF MOD
GND
CIN
ML6415
-Pin SOIC S0
1
2
3
4
TOP VIEW
7
6
5
ML6415
YOUT
VCC
CVOUT
COUT
PIN DESCRIPTIONS
PIN#SignalName Description
1 YIN Luminance input
2 RF MOD Output to RF modulator driver
3 GND Ground
4 CIN Chrominance input
5 COUT Chrominance output
6 CVOUT Composite video output
7 VCC 5V supply
8 YOUT Luminance output
DatasheetJune, 20004
Page 5
FUNCTIONAL DESCRIPTION
INTRODUCTION
ML6415
This product is a dual monolithic continuous time video
fi lter designed for reconstructing the luminance and chrominance signals from an S-Video D/A source. Composite
video output is generated by summing the Y and C outputs. The chip is intended for use in applications with AC
coupled input and AC coupled outputs. (See Figure 1)
The reconstruction fi lters approximate a 4th-order Butterworth characteristic with an optimization toward low
overshoot and fl at group delay. Y, C, and CV outputs are
capable of driving 2VP-P into AC coupled 150Ω video
loads, with up to 35pF of load capacitance at the output
pin.
All channels are clamped during sync to establish the
appropriate output voltage swing range. Thus the input
coupling capacitors do not behave according to the conventional RC time constant. Clamping for all channels
settles to less than 10mv within 5ms of a change in video
input sources.
In most applications the input coupling capacitors are
0.1µF. The Y and C input typically sinks 1µA during active
video, which nominally tilts a horizontal line by about
2mV at the Y output. During sync, the clamp typically
sources 20µA to restore the DC level. The net result is that
the average input current is zero.
Any change in the input coupling capacitor’s value will
inversely alter the amount of tilt per line. Such a change
will also linearly affect the clamp response times.
CHROMINANCE (C) I/O
The chroma input is driven by a low impedance
source of 0.7Vp-p or the output of a 75Ω terminated
line. The input is required to be AC coupled via a
0.1µF coupling capacitor which allows for a clamp
setting time of 5ms. The chroma output is capable
of driving an AC coupled 150Ω load at 2VP-P,
or 1VP-P into a 75Ω load. Up to 35pF of load
capacitance can be driven without stability or slew issues.
A 0.1µF AC coupling capacitor is recommended at the
output. (This reduces the circuit cost as chroma does not
contain low frequency components.)
COMPOSITE VIDEO (CV) OUTPUT
The composite video output is capable of driving 2 loads
to 2VP-P. It is intended to drive a TV and a VCR. Either
the TV input or the VCR input can be shorted to ground
and the other output will still meet specifi cations. Up to
35pF of load capacitance (at the output pin) can be driven
without stability or slew issues.
RF MODULATOR OUTPUT
The RF modulator output is capable of driving a 600Ω load
to 2VP-P, but is primarily intended to drive a modulator
load.
This product is robust and stable under all stated load
and input conditions. Capacitive bypassing VCC directly to
ground ensures this performance.
LUMINANCE (Y) I/O
The luma input is driven by either a low impedance source
of 1Vp-p or the output of a 75Ω terminated line. The
input is required to be AC coupled via a 0.1µF coupling
capacitor which allows for a settling time of 5ms. The
luma output is capable of driving an AC coupled 150Ω
load at 2VP-P, or 1VP-P into a 75Ω load. Up to 35pF of
load capacitance (at the output pin) can be driven without
stability or slew issues. The output is AC coupled with a
400µF or larger AC coupling capacitor.