The MK1714-02 is a low cost, high performance
clock synthesizer with selectable multipliers and
spread amounts (percentages), designed to
generate high frequency clocks with low EMI.
Using analog/digital Phase-Locked Loop (PLL)
techniques, the device accepts an inexpensive,
fundamental mode, parallel resonant crystal, or a
clock input to produce a spread, or dithered,
output, thereby reducing the frequency amplitude
peaks by several dB. The OE pin puts both outputs
into a high impedance state for board level testing.
The PD# pin powers down the entire chip, and the
outputs are held low.
Block Diagram
VDDGND
Features
• Packaged in 20 pin tiny SSOP (QSOP)
• Operating VDD of 3.3 V or 5 V
• Multiplier modes of x1, x2, x3, x4, x5, and x6
• Inexpensive 10-25 MHz crystal, or clock input
• OE pin tri-states the outputs for testing
• Power down pin stops the outputs low
• Selectable frequency spread
• Spread can be turned on or off
• Duty cycle of 40/60
• Advanced, low power CMOS process
• Industrial temperature range available
S4:0
PD
Low EMI
Enable
Input crystal
or clock
MDS 1714-02 C1 Revision 120400
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
X1
X2
5
Crystal
Oscillator
XSEL
PLL Clock
Multiplier and
Spread
Spectrum
Circuitry
Output
Buffer
Output
Buffer
OE (both outputs)
Clock Out
REF
Page 2
Pin Assignment
MK1714-02
Spread Spectrum Multiplier Clock
X2
X1/ICLK
VDD
VDD
S4
S3
GND
GND
S2
CLK
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
20
19
18
17
REF
OE
PD
GND
S0
NC
S1
GND
LEE
XSEL
20 pin.150 mil SSOP (QSOP)
Pin Descriptions
Pin #Name TypeDescription
1X2XOCrystal connection. Connect to parallel mode crystal. Leave open for clock.
2X1/ICLKXICrystal connection. Connect to parallel mode crystal, or clock.
3VDDPConnect to VDD. Must be same value as other VDD.
4VDDPConnect to VDD. Must be same value as other VDD. Decouple with pin 7.
5S4I(D)Select pin number 4. Determines multiplier and spread amount per table on following page.
6S3ISelect pin number 3. Determines multiplier and spread amount per table on following page.
7
8GNDPConnect to ground.
9S2ISelect pin number 2. Determines multiplier and spread amount per table on following page.
10CLKOClock output which depends on the input, multiplier and spread amount per table on page 3.
11XSELIConnect to VDD for crystal input, or GND for CLK input.
12LEEILow EMI Enable. Turns on the Spread spectrum when high.
13GNDPConnect to ground.
14
15NC-No Connect.
16S0ISelect pin number 0. Determines multiplier and spread amount per table on following page.
17GNDPConnect to ground.
18PDIPower Down. Turns off the chip when low. Outputs stop low.
19OEIOutput Enable. Tri-states all outputs when low.
20REFOReference clock output from crystal oscillator.
GNDPConnect to ground.
S1ISelect pin number 1. Determines multiplier and spread amount per table on following page.
Key: I = Input with internal pull-up; I(D) = Input with internal pull-down; XO/XI = crystal connections;
O = output; P = power supply connection
MDS 1714-02 C2 Revision 120400
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
3.3 V
Both
Both
Both
Both
Both
Both
Both
3.3 V
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
Both
For S4:S0, 0 = connect to GND, 1 = connect to VDD.
Direction: C=Center spread, D=Down spread, DC=Down+Center spread.
Amount equals the spread amount. So for a 40 MHz output clock spread down 1%, the lowest
frequency is 39.60 MHz.
Contact ICS with your exact output frequency for details on spread direction and amount.
MDS 1714-02 C3 Revision 120400
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
Page 4
MK1714-02
ABSOLUTE MAXIMUM RATINGS (note 1)
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Multiplier of x1, all clocks at highest frequencies.
Spread Spectrum Multiplier Clock
Electrical Specifications
ParameterConditionsMinimumTypicalMaximumUnits
Supply voltage, VDDReferenced to GND7V
Inputs and Clock OutputsReferenced to GND-0.5VDD+0.5V
Ambient Operating Temperature070°C
MK1714-02RI only-4085°C
Soldering TemperatureMax of 10 seconds260°C
Storage temperature-65150°C
Operating Voltage, VDD 3.05.5V
Input High Voltage, VIH, X1/ICLK onlyClock inputVDD/2 + 1VDD/2V
Input Low Voltage, VIL, X1/ICLK onlyClock inputVDD/2VDD/2 - 1V
Input High Voltage, VIHSelect inputs, OE, PD2V
Input Low Voltage, VILSelect inputs, OE, PD0.8V
Output High Voltage, VOHVDD=3.3V, IOH=-8mA2.4V
Output Low Voltage, VOLVDD=3.3V, IOL=8mA0.4V
Output High Voltage, VOH, VDD = 3.3 or 5VIOH=-8mAVDD-0.4V
Operating Supply Current, IDD, at 5V No Load, note 240mA
Operating Supply Current, IDD, at 3.3VNo Load, note 226mA
Short Circuit Current, VDD = 3.3 Each output±50mA
Input CapacitanceExcept X1, X27pF
Internal Pull-up or Pull-down ResistorExcept X1500kΩ
Input Crystal Frequency1025MHz
Input Clock FrequencySee page 310150MHz
Output Clock Rise Time0.8 to 2.0V, no load1.5ns
Output Clock Fall Time2.0 to 0.8V, no load1.5ns
Output Clock Duty CycleAt VDD/2405060%
One Sigma Jitter, CLK40ps
Absolute Jitter, CLK±160ps
Notes:1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
External Components
The MK1714 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01µF should be connected between VDD and GND (on pins 4 and 7), as close to the chip
as possible. A series termination resistor of 33 Ω may be used for each clock output. The crystal must be
connected as close to the chip as possible. The crystal should be a fundamental mode and parallel resonant.
If accurate tuning is required, crystal capacitors should be connected from pins X1 to ground and X2 to
ground. The value of these capacitors is given by the following equation, where CL is the crystal load
capacitance: Crystal caps (pF) = (CL-6) x 2. So for a crystal with 20pF load capacitance, two 28 pF caps
should be used. If a clock input is used, drive it into X1 and leave X2 unconnected.
MDS 1714-02 C4 Revision 120400
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
Page 5
Spread Spectrum Multiplier Clock
Inches
Millimeters
Package Outline and Package Dimensions
(For current dimensional specifications, see JEDEC Publication No. 95.)
MK1714-02RTRMK1714-02R20 pin SSOPTape and Reel0 to 70 °C
MK1714-02RIMK1714-02RI20 pin SSOPTubes-40 to 85 °C
MK1714-02RITRMK1714-02RI20 pin SSOPTape and Reel-40 to 85 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 1714-02 C5 Revision 120400
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
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