Datasheet MIC58P01BN, MIC58P01BV, MIC58P01BWM Datasheet (MICREL)

MIC58P01 Micrel

MIC58P01

8-Bit Parallel-Input Protected Latched Driver

General Description

The MIC58P01 parallel-input latched driver is a high-voltage (80V), high-current (500mA) integrated circuit comprised of eight CMOS data latches, a bipolar Darlington transistor driver for each latch, and CMOS control circuitry for the common CLEAR, STROBE, and OUTPUT ENABLE functions. Similar to the MIC5801, additional protection circuitry supplied on this device includes thermal shutdown, under voltage lockout (UVLO), and overcurrent shutdown.

The bipolar/CMOS combination provides an extremely lowpower latch with maximum interface flexibility. The MIC58P01 has open-collector outputs capable of sinking 500 mA and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80V (50V sustaining). The drivers may be paralleled for higher load current capability.

With a 5V logic supply, the MIC58P01 will typically operate at better than 5MHz. With a 12V logic supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS circuits. TTL circuits may require pull-up resistors.

Each of these eight outputs has an independent overcurrent shutdown of 500mA. Upon current shutdown, the affected channel will turn OFF until VDD is cycled or the ENABLE/ RESET pin is pulsed high. Current pulses less than 2µs will not activate current shutdown. Temperatures above 165°C will shut down all outputs. The UVLO circuit disables the outputs at low VDD; hysteresis of 0.5V is provided.

Features

• 4.4MHz Minimum Data Input Rate

• High-Voltage, High-Current Outputs

• Per-Output Overcurrent Shutdown (500mA typical)

• Under Voltage Lockout

• Thermal Shutdown

• Output Transient Protection Diodes

• CMOS, PMOS, NMOS, and TTL Compatible Inputs

• Internal Pull-Down Resistors

• Low-Power CMOS Latches

Ordering Information

Part Number Temperature Range Package

MIC58P01BN –40°C to +85°C 22-Pin Plastic DIP MIC58P01BV –40°C to +85°C 28-Pin PLCC MIC58P01BWM –40°C to +85°C 24-Pin Wide SOIC

7

Functional Diagram

ENABLE/RESET

+ –

UVLO

CLEAR

THERMAL

SHUTDOWN

I

SHUTDOWN

SRQ

Circuitry below dashed line is included in each of the 8 channels.

STROBE

V

DD

2.2R

1.25V R

IN

October 1998 7-17

-

+

R1

70k

COMMON

V

EE

I I

REF

OUT

R2 3k

/ N

OUTPUT

Pin Configuration

(DIP)

1

CLEAR

STROBE

IN

GROUND

2

3

1

4

2

5

3

6

4

7

5

8

6

9

7

10

8

11 12

THERMAL

SHUTDOWN

LATCHES

UVLO

I

LIMIT

AND

OUTPUT

22

ENABLE/RESET

21

V

DD

20

OUT

19

OUT

18

OUT

17

OUT

16

OUT

15

OUT

14

OUT

13

COMMON

1 2

3

4 5

6

7 8

MIC58P01 Micrel

Pin Configuration, Continued

CLEAR

OE/RESET

28 27 26

1

1615

GROUND

17

NC

DD

V

NC

18

OUT 8

COMMON

24 23 22

21

20 19 18 17

16

15

14

13

STROBE

NC

2

4

3

5

IN 1

6

IN 2 IN 3

7

MIC58P01BV

8

IN 4

9

IN 5

10

IN 6

11

IN 7

12 13

14

NC

IN 8

MIC58P01BV, 28–Pin PLCC

GROUND

CLEAR

STROBE

GROUND

1 2 3

IN

4

1

IN

5

2

IN

6

3 4

7

5

8 9

6 7

10

8

11 12

MIC58P01BWM

IN IN IN IN IN

MIC58P01BWM, 24–Pin SOIC

(not pin compatible with MIC5801BWM)

Pin Description

25

OUT 1

24

OUT 2

23

OUT 3

22

OUT 4 OUT 5

21

20

OUT 6 OUT 7

19

NC OUTPUT

ENABLE/RESET V

DD

OUT

1

OUT

2

OUT

3

OUT

4

OUT

5

OUT

6

OUT

7

OUT

8

COMMON

Absolute Maximum Ratings: (Note 1)

at +25°C Free-Air Temperature

Output Voltage, V Supply Voltage, V

CE DD

Input Voltage Range, V

IN

–0.3V to VDD + 0.3V

80V 15V

Package Power Dissipation: MIC58P01BN 2.25W Derate above TA = +25°C 22.5mW/°C MIC58P01BV 1.6W Derate above TA = +25°C 16mW/°C MIC58P01BWM 1.4W Derate above TA = +25°C 14mW/°C Operating Temperature Range, T Storage Temperature Range, T

A

S

Note 1: Micrel CMOS devices have input-static protection but are

susceptible to damage when exposed to extremely high static electrical charges.

Typical Input

IN

V

DD

–55°C to +85°C

–65°C to +125°C

Allowable Output Current As A Function

of Duty Cycle

450

400

350

300

250

200

NUMBER OF OUTPUTS

150

CONDUCTING SIMULTANEOUSLY

100

0102030405060708090100

ALLOWABLE COLLECTOR CURRENT IN mA AT 50°C

MIC58P01BN

5

6

7

8

PERCENT DUTY CYCLE

1 or 2

3

4

Pin (DIP) Name Description 1 CLEAR Resets all Latches and turns all outputs OFF (open). 2 STROBE Input Strobe Pin. Loads output latches when High. 3–10 INPUT Parallel Inputs, 1 through 8 11 GROUND Logic and Output Ground pin. 12 COMMON Transient suppression diode common cathode pin. 13–20 OUTPUT Parallel Outputs, 8 through 1. 21 V

DD

Logic Supply voltage.

22 OUTPUT When Low, Outputs are active. When High, outputs are inactive and device is reset

ENABLE/RESET from a fault condition. An undervoltage condition emulates a high OE input.

7-18 October 1998

MIC58P01 Micrel

Electrical Characteristics: at T

Characteristic Symbol Test Conditions Min. Typ. Max. Units

Output Leakage Current I

Collector-Emitter V Saturation Voltage IC = 200mA 1.1 1.3

Input Voltage V

Input Resistance R

Supply Current I

Clamp Diode I Leakage Current VR = 80V, TA = +70°C 100 Overcurrent Threshold I Start-Up Voltage V Minimum Operating V Clamp Diode Forward Voltage V Thermal Shutdown 165 °C Thermal Shutdown Hystersis 10 °C

DD

CEX

CE(SAT)

IN(0)

V

IN(1)

IN

DD(ON)

(One output V active) VDD = 5.0V, Outputs Open 2.4 3.6 I

DD(ON)

(All outputs V active) VDD = 5.0V, Outputs Open 4.7 7.5 I

DD(OFF)

(Total) V

R

LIM

SU

V

DD MIN F

= +25°C, VDD = 5V (unless otherwise noted)

A

VCE = 80V, TA = +25°C50µA V

= 80V, TA = +70°C 100

CE

IC = 100mA 0.9 1.1 V

I

= 350mA 1.3 1.6

C

VDD = 12V 10.5 V

= 10V 8.5

DD

VDD = 5.0V (See Note) 3.5 VDD = 12V 50 200 kΩ V

= 10V 50 300

DD

VDD = 5.0V 50 600 VDD = 12V, Outputs Open 3.3 4.5 mA

= 10V, Outputs Open 3.1 4.5

DD

VDD = 12V, Outputs Open 6.4 10.0 mA

= 10V, Outputs Open 6.0 9.0

DD

VDD = 12V, Outputs Open, Inputs = 0V 3.0 4.5 mA

= 5.0V, Outputs Open, Inputs = 0V 2.2 3.6

DD

VR = 80V, TA = +25°C50µA

Per Output 500 mA Note 2. 3.5 4.0 4.5 V

IF = 350mA 1.7 2.0 V

Limits

1.0 V

3.0 3.5 4.0 V

7

NOTE 1: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to insure a minimum logic “1”. NOTE 2: Under-Voltage Lockout is guaranteed to release device at no more than 4.5V, and disable the device at no less than 3.0V.

T ruth Tab le

Output OUT

IN

N

0 1 0 0 X OFF 11 0 0XON X X 1 X X OFF X X X 1 X OFF X 0 0 0 ON ON X 0 0 0 OFF OFF

X = Irrelevant t–1 = previous output state t = present output state

Strobe Clear Enable t–1 t

N

October 1998 7-19

Information present at an input is transferred to its latch when the STROBE is high. A high CLEAR input will set all latches to the output OFF condition regardless of the Data or STROBE input levels. A high OUTPUT ENABLE will set all outputs to the OFF condition, regardless of any other input conditions. When the OUTPUT ENABLE is low, the outputs depend on the state of their respective latches. If current shutdown is activated, the OUTPUT ENABLE must be pulsed high to restore operation. Over temperature faults are not latched and require no reset pulse.

MIC58P01 Micrel

CLEAR

F

STROBE

OUTPUT

ENABLE

IN

OUT

C

BA

G

N

D

N

C

B

E

C

BA

G

E

Timing Conditions

(TA = +25°C, Logic Levels are VDD and Ground, VDD = 5V)

A. Minimum data active time before strobe enabled (data set-up time) .......................................................................50ns

B. Minimum data active time after strobe disabled (data hold time) .............................................................................50ns

C. Minimum strobe pulse width..................................................................................................................................125 ns

D. Typical time between strobe activation and output on to off transition...................................................................500ns

E. Typical time between strobe activation and output off to on transition...................................................................500ns

F. Minimum clear pulse width.....................................................................................................................................300ns

G. Minimum data pulse width.....................................................................................................................................225 ns

Typical Characteristic Curves

Output Saturation

Voltage vs. Temperature

1.6

1.5

1.4

1.3

1.2

1.1 1

0.9

0.8

0.7

SATURATION VOLTAGE (V)

0.6

–50 0 50 100 150

IL = 350mA

VDD = 5V to 12V

IL = 100mA

TEMPERATURE (°C)

Current Shutdown

Threshold vs. Temperature

0.60

0.55

0.50

0.45

0.40

0.35

SHUTDOWN THRESHOLD (A)

–50 0 50 100 150

TEMPERATURE (°C)

V

DD

VDD = 5V

= 12V

Supply Current

vs. Temperature

6

5

4

3

2

1

SUPPLY CURRENT (mA)

0

–50 0 50 100 150

ALL OUTPUTS ON

VDD = 5V

ALL OUTPUTS OFF

TEMPERATURE (°C)

Supply Current

vs. Temperature

8 7 6

ALL OUTPUTS ON

5 4 3

ALL OUTPUTS OFF

2

SUPPLY CURRENT (mA)

1 0

–50 0 50 100 150

TEMPERATURE (°C)

VDD = 12V

Current Shutdown

Delay vs. Output Current

7 6 5 4 3 2 1

CURRENT SHUTDOWN DELAY (µS)

0

0.4 0.5 0.6 0.7 0.8 0.9 OUTPUT CURRENT (A)

VDD = 5V

VDD = 12V

Output Delay

vs. Supply Voltage

260 240 220 200 180 160 140

OUTPUT DELAY (nS)

120 100

56789101112131415

SUPPLY VOLTAGE (V)

RL = 50Ω

TD OFF

TD ON

7-20 October 1998

MIC58P01 Micrel

Typical Application

STROBE

INPUT 1

INPUT 2

INPUT 3

INPUT 4

INPUT 5

INPUT 6

INPUT 7

INPUT 8

+5V

0.1µµµµ22µµ

1

2

3

4

5

6

7

8

9

10

11

LATCHES

22

21

20

19

18

17

16

15

14

13

12

Relays: Guardian Electric 1725-1C-12D

MIC58P01 Protected Relay Driver

+12V

µµ

+

K1

K2

K3

K4

K5

K6

K7

K8

7

October 1998 7-21