MIC5841/5842
LATCHES
SHIFT REGISTER
8-Bit Serial-Input Latched Drivers
MicrelMIC5841/5842
General Description
Using BiCMOS technology, the MIC5841/5842 integrated
circuits were fabricated to be used in a wide variety of
peripheral power driver applications. The devices each have
an eight-bit CMOS shift register, CMOS control circuitry,
eight CMOS data latches, and eight bipolar current-sink
Darlington output drivers.
These two devices differ only in maximum voltage ratings.
The MIC5842 offers premium performance with a minimum
output breakdown voltage rating of 80V (50V sustaining). The
drivers can be operated with a split supply where the negative
supply is down to –20V.
The 500 mA outputs, with integral transient-suppression
diodes, are suitable for use with lamps, relays, solenoids and
other inductive loads.
These devices have improved speed characteristics. With a
5V logic supply, they will typically operate faster than 5 MHz.
With a 12V supply, significantly higher speeds are obtained.
The CMOS inputs are compatible with standard CMOS,
PMOS, and NMOS logic levels. TTL or DTL circuits may
require the use of appropriate pull-up resistors. By using the
serial data output, the drivers can be cascaded for interface
applications requiring additional drive lines.
Features
• 3.3 MHz Minimum Data-Input Rate
• CMOS, PMOS, NMOS, TTL Compatible
• Internal Pull-Up/Pull-Down Resistors
• Low-Power CMOS Logic and Latches
• High-Voltage Current-Sink Outputs
• Output Transient-Protection Diodes
• Single or Split Supply Operation
Ordering Information
Part Number Temperature Range Package
MIC5841BN –40°C to +85°C 18-Pin Plastic DIP
MIC5841BV –40°C to +85°C 20-Pin PLCC
MIC5841BWM –40°C to +85°C 18-Pin Wide SOIC
MIC5842BN –40°C to +85°C 18-Pin Plastic DIP
MIC5842BV –40°C to +85°C 20-Pin PLCC
MIC5842BWM –40°C to +85°C 18-Pin Wide SOIC
The MIC5840 family is available in DIP, PLCC, and SOIC
packages. Because of limitations on package power dissipation, the simultaneous operation of all drivers at maximum
rated current might require a reduction in duty cycle. A
copper-alloy lead frame provides for maximum package
power dissipation.
Functional Diagram
CLK
1
SERIAL
DATA IN
V
SS
3
4
10
OUT
K
8-BIT SERIAL-PARALLEL SHIFT REGISTER
OUT
OUT
1
3
2
OUT
LATCHES
4
OUT
MOS
Bipolar
12131415161718
11
OUT
OUT
OUT
6
5
8
7
Pin Configuration
V
1
SERIAL
6
DATA OUT
V
DD
5
STROBE
7
OUTPUT ENABLE
8
(ACTIVE LOW)
Sub
9
1
V
EE
SERIAL DATA IN
SERIAL DATA OUT
OUTPUT ENABLE
EE
CLOCK
V
SS
V
DD
STROBE
V
EE
SUB
2
C
3
4
V
SS
5
V
DD
6
7
ST
8
OE
9
SUB
(DIP, SOIC)
18
OUT
1
17
OUT
2
16
OUT
3
15
OUT
4
14
OUT
5
13
OUT
6
12
OUT
7
11
OUT
8
10
K
7-42 October 1998
MIC5841/5842
Pin Configuration
(20-Pin PLCC)Top View.
Micrel
Absolute Maximum Ratings (Note 1, 2, 3)
at 25°C Free-Air Temperature and VSS = 0V
EE
CLOCK
V
123
EE
V
OUTPUT EN
NC
V
SS
V
DD
SERIAL DATA OUT
NC
SERIAL DATA IN
4
5
MIC5842BV
6
7
8
9 10
STROBE
Electrical Characteristics at T
OUT 1
OUT 2
20 19
18
OUT 3
17
OUT 4
16
OUT 5
15
OUT 6
OUT 7
14
12 1311
K
OUT 8
= 25°C VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
A
Output Voltage, VCE (MIC5841) 50V
(MIC5842) 80V
Output Voltage, V
CE(SUS)
(MIC5841) (Note 1) 35V
(MIC5842) 50V
Logic Supply Voltage, V
VDD with Reference to V
Emitter Supply Voltage, V
Input Voltage Range, V
Continuous Output Current, I
Package Power Dissipation, P
Operating Temperature Range, T
Storage Temperature Range, T
Note 1: For Inductive load applications.
Note 2: Derate at the rate of 18.2mW/°C above TA = 25°C (Plastic DIP)
Note 3: CMOS devices have input-static protection but are susceptible to
damage when exposed to extremely high static electrical
charges.
IN
DD
EE
EE
OUT
D (Note 2)
A
S
–0.3V to VDD + 0.3V
500mA
1.82W
–55°C to +85°C
–65°C to +150°C
Applicable Limits
Characteristic Symbol Devices Test Conditions Min. Max. Unit
Output Leakage Current I
Collector-Emitter V
CEX
CE(SAT)
Saturation Voltage I
Collector-Emitter V
CE(SUS)
Sustaining Voltage (Note 5) MIC5842 I
Input Voltage V
V
IN(0)
IN(1)
MIC5841 V
MIC5842 V
Both I
MIC5841 I
= 50V 50 µA
OUT
V
= 50V, TA = +70°C 100
OUT
= 80V 50
OUT
V
= 80V, TA = +70°C 100
OUT
= 100mA 1.1 V
OUT
= 200mA 1.3
OUT
I
= 350mA, VDD = 7.0V 1.6
OUT
= 350mA, L = 2mH 35 V
OUT
= 350mA, L = 2mH 50
OUT
Both 0.8 V
Both VDD = 12V 10.5
V
= 10V 8.5
DD
VDD = 5.0V (See Note 4) 3.5
Input Resistance R
IN
Both VDD = 12V 50 kΩ
V
= 10V 50
DD
VDD = 5.0V 50
Supply Current I
DD(ON)
Both All Drivers ON, VDD = 12V 16 mA
All Drivers ON, V
= 10V 14
DD
All Drivers ON, VDD = 5.0V 8.0
I
DD(OFF)
Both All Drivers OFF, VDD = 12V 2.9
All Drivers OFF, V
= 10V 2.5
DD
All Drivers OFF, VDD = 5.0V 1.6
Clamp Diode I
R
Leakage Current MIC5842 V
Clamp Diode V
F
MIC5841 VR = 50V 50 µA
= 80V 50
R
Both IF = 350mA 2.0 V
Forward Voltage
15V
25V
–20V
7
Note 4: Operation of these devices with standard TTL may require the use of appropriate pull-up resistors to insure an
input logic HIGH.
Note 5: Not 100% tested. Guaranteed by design.
October 1998
7-43
MicrelMIC5841/5842
Electrical Characteristics T
= –55°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
A
Limits
Characteristic Symbol Test Conditions Min. Max. Unit
Output Leakage Current I
Collector-Emitter V
CEX
CE(SAT)
Saturation Voltage I
Input Voltage V
V
IN(0)
IN(1)
V
= 80V 50 µA
OUT
I
= 100mA 1.3 V
OUT
= 200mA 1.5
OUT
I
= 350mA, VDD = 7.0V 1.8
OUT
0.8 V
VDD = 12V 10.5
VDD = 5.0V 3.5
Input Resistance R
IN
VDD = 12V 35 kΩ
V
= 10V 35
DD
VDD = 5.0V 35
Supply Current I
DD(ON)
All Drivers ON, VDD = 12V 16 mA
All Drivers ON, V
= 10V 14
DD
All Drivers ON, VDD = 5.0V 10
I
DD(OFF)
All Drivers OFF, VDD = 12V 3.5
All Drivers OFF, V
= 5.0V 2.0
DD
Electrical Characteristics T
= +125°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted)
A
Limits
Characteristic Symbol Test Conditions Min. Max. Unit
Output Leakage Current I
Collector-Emitter V
CEX
CE(SAT)
Saturation Voltage I
Input Voltage V
V
IN(0)
IN(1)
V
= 80V 500 µA
OUT
I
= 100mA 1.3 V
OUT
= 200mA 1.5
OUT
I
= 350mA, VDD = 7.0V 1.8
OUT
0.8 V
VDD = 12V 10.5
VDD = 5.0V 3.5
Input Resistance R
IN
VDD = 12V 50 kΩ
V
= 10V 50
DD
VDD = 5.0V 50
Supply Current I
DD(ON)
All Drivers ON, VDD = 12V 16 mA
All Drivers ON, V
= 10V 14
DD
All Drivers ON, VDD = 5.0V 8
I
DD(OFF)
Clamp Diode Leakage I
R
MIC5841A VR = 50V 100 µA
All Drivers OFF, VDD = 12V 2.9
All Drivers OFF, V
= 5.0V 1.6
DD
Current MIC5842A VR = 80V 100
7-44 October 1998
MIC5841/5842
CLOCK
Micrel
D
B
E
C
F
G
DATA IN
STROBE
OUTPUT
ENABLE
OUT
A
N
Timing Conditions
(TA = 25°C Logic Levels are VDD and VSS)V
A. Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ........................................................................75 ns
B. Minimum Data Active Time After Clock Pulse (Data Hold Time)..............................................................................75 ns
C. Minimum Data Pulse Width .....................................................................................................................................150 ns
D. Minimum Clock Pulse Width....................................................................................................................................150 ns
E. Minimum Time Between Clock Activation and Strobe .............................................................................................300 ns
F. Minimum Strobe Pulse Width...................................................................................................................................100 ns
G. Typical Time Between Strobe Activation and Output Transition .............................................................................500 ns
DD
= 5V
SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input
pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL
DATA must appear at the input prior to the rising edge of the CLOCK input waveform.
Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion).
The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed
(STROBE tied high) will require that the ENABLE input be high during serial data entry.
When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting information stored in the latches
or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches.
MIC5840 Family Truth Table
Serial Shift Register Contents Serial Latch Contents Output Contents
Data Clock Data Strobe Output
Input Input I1I2I3…… I
HHR
LLR
XR
1R2
1R2
1R2R3
…… R
…… R
…… R
XXX……X X L R1R2R3…… R
P1P2P3…… P
L = Low Logic Level
H = High Logic Level
X = Irrelevant
P = Present State
R = Previous State
Output Input I1I
8
7
7
8
8
R
7
R
7
R
8
P
8
2I3
…… I8Enable I1I
HP1P2P3…… P
X X X …… X H H H H …… H
2I3
8
LP1P2P3…… P
8
…… I
8
8
7
October 1998
7-45
MicrelMIC5841/5842
Typical Output Driver
Typical Input Circuits
STROBE
OUTPUT
ENABLE
K
OUT
N
3K7.2K
V
DD
V
SS
SUB
V
EE
CLOCK
SERIAL
DATA IN
V
DD
V
SS
Maximum Allowable Duty Cycle (Plastic DIP)
VDD = 5.0V
Number of Outputs ON
(I
= 200mA Max. Allowable Duty Cycle at Ambient Temperature of
OUT
V
= 5.0V) 25°C40°C50°C60°C70°C
DD
8 85% 72% 64% 55% 46%
7 97% 82% 73% 63% 53%
6 100% 96% 85% 73% 62%
5 100% 100% 100% 88% 75%
4 100% 100% 100% 100% 93%
3 100% 100% 100% 100% 100%
2 100% 100% 100% 100% 100%
1 100% 100% 100% 100% 100%
VDD = 12V
Number of Outputs ON
(I
= 200mA Max. Allowable Duty Cycle at Ambient Temperature of
OUT
V
= 12V) 25°C40°C50°C60°C70°C
DD
8 80% 68% 60% 52% 44%
7 91% 77% 68% 59% 50%
6 100% 90% 79% 69% 58%
5 100% 100% 95% 82% 69%
4 100% 100% 100% 100% 86%
3 100% 100% 100% 100% 100%
2 100% 100% 100% 100% 100%
1 100% 100% 100% 100% 100%
7-46 October 1998
MIC5841/5842
Typical Applications
Micrel
CLOCK
DATA IN
DATA OUT
STROBE
OUTPUT
ENABLE
(ACTIVE LOW)
Relay/Solenoid Driver
MIC5842
1
SUB
2
C
3
4
V
SS
5
V
–15V
DD
6
7
ST
8
OE
9
SUB
LATCHES
SHIFT REGISTER
MIC5841 Hammer Driver
+5V
+30V-15V+5V
18
17
16
15
14
13
12
11
10
CLOCK
SERIAL
DATA IN
0.1µµ
µµ
1
SUB
2
3
4
V
SS
5
V
DD
6
7
ST
OE
8
9
SUB
LATCHES
SHIFT REGISTER
18
17
16
15
14
13
12
11
10
22µµ
+28V
+
µµ
28V
MIC5841 Solenoid Driver with Output Enable MIC5841 Level Shifting Lamp Driver with Darlington
Emitters Tied to a Negative Supply
SERIAL DATA CLOCK
CLOCK
SERIAL
DATA IN
ENABLE
+5V
0.1µµ
+12V
µµ
22µµ
+
1
SUB
2
3
4
V
µµ
SS
5
V
DD
6
7
ST
8
OE
9
SUB
LATCHES
SHIFT REGISTER
Solenoids: Guardian Electric LT4X7-C-12V
18
17
16
15
14
13
12
11
10
-9V
+
+5V
0.1µ
100µ
1
SUB
2
C
3
4
V
SS
5
V
DD
6
7
ST
OE
8
9
SUB
LATCHES
SHIFT REGISTER
18
17
16
15
14
13
12
11
10
7
October 1998
7-47
Typical Applications, Continued
MIC5842 Negative/Positive Supply PIN Diode Driver Transmit/Receive Switch
CLOCK
DATA IN
MicrelMIC5841/5842
+75V
STROBE
100µ
+
–5V
+5V
0.01µ
1
SUB
2
C
3
4
V
0.01µ
SS
5
V
DD
6
7
ST
OE
8
9
SUB
Diode
D1 D2 D3
(Latch 1) (Latch 5) (Latch 8)
Receive OFF ACTIVE OFF
Transmit ACTIVE OFF ACTIVE
LATCHES
SHIFT REGISTER
18
17
16
15
14
13
12
11
10
15
1000p
25
25
1000p
0.01µ
+75V
10k
RFC
+75V
10k
RFC1000p
+75V
10k
RFC
PIN Diodes: UM9651
Transmitter
D1
Antenna
D2
RFC
Receiver
D3
7-48 October 1998
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