Datasheet MIC2550BTS Datasheet (MICREL)

MIC2550 Micrel

MIC2550

Universal Serial Bus Transceiver

Advance Information

General Description

The MIC2550 is a single-chip transceiver that complies with
the physical layer specifications for Universal Serial Bus
(USB).

The MIC2550 supports full-speed (12Mb/s) dual supply volt­age operation (patent pending) and low-speed (1.5Mb/s)
operation.

A unique dual supply voltage operation allows the MIC2550
to reference the system I/F I/O signals to a supply voltage
down to 2.5V while independently powered by the USB V
This allows the system interface to operate at its core voltage
without addition of buffering logic and also reduce system
operating current.

BUS

Features

• Compliant to

• Operation down to 2.5V

• Dual supply voltage operation

• Supports full-speed (12Mb/s) and
low-speed (1.5Mb/s) operation

• Speed-select termination supply

• Very low power consumption meets
USB suspend-current requirements

• Small 14-pin TSSOP

.

USB Specification Revision 1.1

Applications

• Personal digital assistants (PDA)

• Palmtop computers

• Cellular telephones

Ordering Information

Part Number Junction Temp. Range Package

MIC2550BTS –40°C to +85°C 14-Pin TSSOP

System Diagram

System

Supply

Voltage

0.47µF

Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 [phone] • fax + 1 [phone] • http://www.micrel.com

System

Interface

GND

MIC2550

VIF
SPD
OE#
RCV
VP
VM
SUS

GND

VTRM

VBUS

D+
D–

October 4, 1999 1 MIC2550

1.5k

LOW
SPEED

24Ω

24Ω

1µF

HIGH
SPEED

V

BUS

D+
D–

GND

USB
Interface
Connector

MIC2550 Micrel

Pin Configuration

1VIF VBUS
2

SPD
RCV

3
4VP
5

VM

6NC

GND

7

Pin Description

Pin Number Pin Name Pin Function

1 VIF System Interface Supply Voltage (Input): Determines logic voltage levels for

2 SPD Speed (Input): Edge rate control. Logic high selects full-speed edge rates.

3 RCV Receive Data (Output): System interface receive data interface to logic

4 VP Plus (Input/Output): System interface signal to logic controller. If OE# is

5 VM Minus (Input/Output): System interface signal to logic controller. If OE# is

6, 13 NC not internally connected

7 GND Ground: Power supply return and signal reference.
8 SUS Suspend (Input): Logic high turns off internal circuits to reduce supply

9 OE# Output Enable (Input): Active-low system interface input signal from from

10 D– USB Differential Data Line – (Input/Output)
11 D+ USB Differential Data Line + (Input/Output)
12 VTRM Termination Supply (Output): 3.3V speed termination resistor supply output.
14 VBUS USB Supply Voltage (Input): Transceiver supply.

14
13

NC

12

VTRM

11

D+

10

D–

9

OE#

8

SUS

14-Pin TSSOP (TM)

system interface signaling to logic controller.

Logic low selects low-speed edge rates.

controller.

logic 1, VP is a receiver output (+); If OE# is logic 0, VP is a driver input (+).

logic 1, VM is a receiver output (–); If OE# is logic 0, VM is a driver input (–).

current.

logic controller. Logic low causes transceiver to transmit data onto the bus.
Logic high causes the transceiver to receive data from the bus.

MIC2550 2 October 4, 1999

MIC2550 Micrel

Absolute Maximum Ratings (Note 1)

Supply Voltage (VIF)...................................................+6.5V

Input Voltage (V

Output Current (ID+, ID–)...........................................±50mA

Output Current (all others) .......................................±15mA

Input Current ............................................................±50mA

) ........................–0.5V(min)/5.5V(max)

BUS

Operating Ratings (Note 2)

Supply Voltage (V

Temperature Range (TA) ........................... –40°C to +85°C

Junction Temperature (TJ) ........................................ 160°C

Package Thermal Resistance

TSSOP (θJA) .....................................................100°C/W

) ................................. 4.0V to 5.25V

BUS

Power Dissipation (PD) ................................................TBD

Storage Temperature (TS) ..........................–65° to +150°C

ESD, Note 3

Electrical Characteristics

TA = 25°C, bold values indicate –40°C ≤ TA ≤ +85°C; typical values at V
V

= 4.0V to 5.25V, VIF = 2.5V to 3.6V; unless noted.

BUS

Symbol Parameter Condition Min Typ Max Units
System and USB Interface DC Characteristics

V
V
V
V
V
V
I
I

BUS
IF
IL
IH
OH

OL
IL
IF

USB Supply Voltage 4.0 5.25 V
System I/F Supply voltage 2.5 5.25 V
Low-Level Input Voltage, Note 4 0.15V
High-Level Input Voltage, Note 4 0.85V
High-Level Output Voltage, Note 4 IOH = 20µA 0.9V
Low-Level Output Voltage, Note 4 IOL = 20µA 0.1 V
Input Leakage Current, Note 4 ±5 µA
System I/F Supply Current D– and D+ are idle, VIF = 3.6V, V

SUS = 1, OE# = 1
D– and D+ are idle, V

SUS = 0, OE# = 1
D– and D+ active, C

SUS = 0, VIF = 3.6V, OE# = 0
D– and D+ active, C

SUS = 0, VIF = 3.6V, OE# = 0

I

BUS

USB Supply Current D– and D+ are idle, V

SUS = 1, OE# = 1
D– and D+ are idle, V

SUS = 1, OE# = 1
D– and D+ are idle, V

SUS = 0, OE# = 0
D– and D+ are idle, V

SUS = 0, OE# = 1
D– and D+ active, C

SUS = 0, V

BUS

D– and D+ active, C

V

TRM

Termination Voltage I

SUS = 0, V

TRM

BUS

= 2.5mA 3.0 3.6 V

= 5.0V, VIF = 3.0V; minimum and maximum values at

BUS

IF

IF

= 5.25V 1 µA

BUS

LOAD

LOAD

LOAD

= 5.25V

LOAD

= 5.25V

= 3.6V, V

IF

= 50pF, SPD = 1, 2 µA

= 600pF, SPD = 0, 2 µA

= 5.25V, SPD = 0 140 200 µA

BUS

= 5.25V, SPD = 1 140 200 µA

BUS

= 5.25V, SPD = 0 140 200 µA

BUS

= 5.25V, SPD = 1 200 350 µA

BUS

= 50pF, SPD = 1, mA

= 600pF, SPD = 0 mA

= 5.25V 1 µA

BUS

V

IF

V
V

October 4, 1999 3 MIC2550

MIC2550 Micrel

Symbol Parameter Condition Min Typ Max Units
Transceiver DC Characteristics

I

LO

V

DI

V

CM

V

SE

V

OL

V

OH

V

CRS

C

IN

Z

DRV

Low-Speed Driver Characteristics

t

R

t

F

tR/t

F

V

CRS

Full-Speed Driver Characteristics

t

R

t

F

tR/t

F

V

CRS

Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4. Applies to the VP, VM, RCV, OE#, SPD, and SUS pins.
Note 5. Applies to D+, D–
Note 6. Not production tested. Guaranteed by design.

Hi-Z State Data Line Leakage 0V < V
Differential Input Sensitivity Ω(D+) – (D–)Ω, V

< 3.3V, D+, D–, OE# = 1 pins only –10 +10 µA

BUS

= 0.8V – 2.5V 0.2 V

IN

Differential Common-Mode Range includes VDI range 0.8 2.5 V
Single-Ended Receiver Threshold 0.8 2.0 V
Receiver Hysteresis, Note 6 200 mV
Static Output Low, Note 5 OE# = 0, RL = 1.5kΩ to 3.6V 0.3 V
Static Output High, Note 5 OE# = 0, RL = 15kΩ to GND 2.8 3.6 V
Output Signal Crossover Voltage 1.3 2.0 V

Note 6

Transceiver Capacitance, Note 6 pin to GND 20 pF
Driver Output Resistance steady state drive, Note 6 618Ω

Transition Rise Time CL = 50pF 75 ns

CL = 600pF 300 ns

Transition Fall Time CL = 50pF 75 ns

CL = 600pF 300 ns

Rise and Fall Time Matching TR ÷ T

F

80 125 %

Output Signal Crossover Voltage 1.3 2.0 V

Transition Rise Time CL = 50pF 4 20 ns
Transition Fall Time CL = 50pF 4 20 ns
Rise and Fall Time Matching TR ÷ T

F

90 111.11 %

Output Signal Crossover Voltage 1.3 2.0 V

MIC2550 4 October 4, 1999

MIC2550 Micrel

Symbol Parameter Condition Min Typ Max Units
Transceiver Timing

t

PVZ

t

PZD

t

PDZ

t

PZV

t

PLH

t

PHL

t

PLH

t

PHL

t

PLH

t

PHL

OE# to RCVR Tristate Delay Figure 1 15 ns
Receiver Tristate to Transmit Delay Figure 1 15 ns
OE# to DRVR Tristate Delay Figure 1 15 ns
Driver Tri-state to Receiver Delay Figure 1 15 ns
V+/V– to D+/D– Propagation Delay Figure 4 15 ns
V+/V– to D+/D– Propagation Delay Figure 4 15 ns
D+/D– to RCV Propagation Delay Figure 3 15 ns
D+/D– to RCV Propagation Delay Figure 3 15 ns
D+/D– to V+/D– Propagation Delay Figure 3 8 ns
D+/D– to V+/D– Propagation Delay Figure 3 8 ns

H

V

OE#

VP/V

VD+/V

L

V

P

M

V

M

V

D+

D–

V

D–

t

PVZ

t

PZD

t

PZV

Figure 1. Enable and Disable Times

V

Differential

Data

Lines

90%
10%

V

D+

V

CRS

D–

t

R

t

F

Figure 2. Rise and Fall Times

V

Differential

D+

Data

Lines

V

Output

D–

V

OH

V

OL

V

SS

t

PLH

t

PHL

Figure 3. Receiver Propagaion Delay D+/D– to RCV, VP, and V

V

Input

Differential

Data

Lines

OI

V

OL

V

SS

V

D+

V

D–

t

PLH

t

PHL

M

Figure 4. Driver Propagation Delay VP and VM to D+/D–

October 4, 1999 5 MIC2550

MIC2550 Micrel

:)timsnarT(0=#EO

tupnItuptuO

tluseRPVMV+D–DVCR

0000X 0ES
01010 0cigoL
10101 1cigoL
1111X denifednU

:)evieceR(1=#EO

tupnItuptuO

tluseR+D–DPVMVVCR

0000X 0ES
01010 0cigoL
10101 1cigoL
1111X denifednU

Table 1. Truth Table

Test Circuits

Test
Point

Device

24Ω

500Ω

Under

Test

50pF

V

For D+/D–:

for t

PZH

and t

PZL

and t

PHZ

PLZ

V = 0V for t
V = V

BUS

Load for Enable and Disable Time (D+/D–)

Device

Under

Test

25pF

VP, VM, and RCV Load

V

TRM

Device

24Ω

1.5kΩ*

Under

Test

15kΩ C

= 50pF, full speed

C

L

= 50pF, low speed (minimum timing)

C

L

= 600pF, low speed (maximum timing)

C

L

L

*1.5k on D– for low speed or D+ for high speed

D+ and D– Load

MIC2550 6 October 4, 1999

MIC2550 Micrel

Block Diagram

VIF

SPD

OE#

RCV

VP

VM

SUS

VOLTAGE DOMAIN

USB VOLTAGE DOMAINSYSTEM I/F

Regulator

TO

INTERNAL

CIRCUITS

VBUS
VTRM

D–
D+

Applications Information

The MIC2550 is designed to provide USB connectivity in
mobile systems where system supply voltages are not avail­able to satisfy USB requirements. The MIC2550 can operate
down to supply voltages of 2.5V and still meet USB physical
layer specifications. As shown in the system diagram, the
MIC2550 takes advantage of USB’s supply voltage, V
operate the transceiver. The system voltage, VIF, is used to
set the reference voltage used by the digital I/O lines (VP, VM,
RCV, OE#, SPD, and SUS pins) interfacing to the system.
Internal circuitry provides translation between the USB and
system voltage domains. VIF will typically be the main supply
voltage rail for the system.

In addition, a 3.3V, 10% termination supply voltage, V
provided to support speed selection. A 0.47µF (minimum)
capacitor from V

to ground is required to ensure stability.

TRM

A 1.5K resistor is required between this pin and the D+ or D–
lines to respectively specify full-speed or low-speed opera­tion.

Suspend

When the suspend pin (SUS) is high, power consumption is
reduced to a minimum. V

is not disabled. RCV, VP and

TRM

VM are still functional to enable the device to detect USB
activity. For minimal current consumption in suspend mode,
it is recommended that OE# = 1.

BUS

TRM

, to

, is

GND

External ESD Protection

The use of ESD transient protection devices is not required
for operation, but is recommended.

Nonmultiplexed Bus

To save pin count for the USB logic controller interface, the
MIC2550 was designed with VP and VM as bidirectional pins.
To interface the MIC2550 with a nonmultiplexed data bus,
resistors can be used for low cost isolation as shown in
Figure 6.

USB Logic

Controller

(SIE)

V

P

10k

V

PO

V

M

V

MO

10k

MIC2550

V

P

V

M

Figure 6. MIC2550 Interface to

Nonmultiplexed Data Bus.

October 4, 1999 7 MIC2550

MIC2550 Micrel

Package Information

0.65 BSC
(0.026)

4.50 (0.177)

4.30 (0.169)

0.30 (0.012)

0.19 (0.007)

5.10 (0.200)

4.90 (0.193)

1.10 MAX (0.043)

0.15 (0.006)

0.05 (0.002)

6.4 BSC (0.252)

8°
0°

14-Pin TSSOP (TS)

DIMENSIONS:

MM (INCH)

0.20 (0.008)

0.09 (0.003)

1.00 (0.039) REF

0.70 (0.028)

0.50 (0.020)

MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 [phone] FAX + 1 [phone] WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

© 1999 Micrel Incorporated

MIC2550 8 October 4, 1999