Datasheet MCTV65P100F1, MCTA65P100F113 Datasheet (Intersil)

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright

© Harris Corporation 1999

2-13

Semiconductor

MCTV65P100F1,

MCTA65P100F1

65A, 1000V

P-Type MOS Controlled Thyristor (MCT)

Package

JEDEC STYLE TO-247

JEDEC MO-093AA (5-LEAD TO-218)

Symbol

GATE

GATE RETURN

CATHODE

ANODE

ANODE

CATHODE (FLANGE)

CATHODE (FLANGE)

GATE

GATE RETURN

CATHODE

ANODE

ANODE

G

A

K

Features

• 65A, -1000V

•V

TM

≤ -1.4V at I = 65A and +150oC

• 2000A Surge Current Capability

• 2000A/µs di/dt Capability

• MOS Insulated Gate Control

• 100A Gate T urn-Off Capability at +150

o

C

Description

The MCT is an MOS Controlled Thyristor designed for switching
currents on and off by negative and positive voltage control of an
insulated MOS gate. It is designed for use in motor controls,
inverters, line switches and other power s witching applications .

The MCT is especially suited for resonant (zero voltage or zero
current switching) applications. The SCR like forward drop
greatly reduces conduction power loss.

MCTs allow the control of high power circuits with very small
amounts of input energy. They feature the high peak current
capability common to SCR type thyristors, and operate at junc­tion temperatures up to +150

o

C with active switching.

Formerly TA9900.

PART NUMBER INFORMATION

PART NUMBER PACKAGE BRAND

MCTV65P100F1 TO-247 M65P100F1
MCTA65P100F1 MO-093AA M65P100F1

NOTE: When ordering, use the entire part number.

April 1999

Absolute Maximum Ratings T

C

= +25oC, Unless Otherwise Specified

MCTV65P100F1
MCTA65P100F1 UNITS

Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DRM

-1000 V

Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

RRM

+5 V

Continuous Cathode Current (See Figure 2)

TC = +25oC (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TC = +90oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I

K25

I

K90

85
65

A
A

Non-Repetitive Peak Cathode Current (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TSM

2000 A

Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC

100 A

Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GA

±20 V

Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GA

±25 V

Rate of Change of Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt See Figure 11

Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . di/dt 2000 A/µs

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

T

208 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.67 W/oC

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

-55 to +150

o

C

Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(0.063" (1.6mm) from case for 10s)

T

L

260

o

C

NOTE:

1. Maximum Pulse Width of 200µs (Half Sine) Assume TJ (Initial) = +90oC and TJ (Final) = TJ (Max) = +150oC

File Number 3516.5

PART WITHDRAWN

PROCESS OBSOLETE - NO NEW DESIGNS

2-14

Specifications MCTV65P100F1, MCTA65P100F1

Electrical Specifications T

C

= +25oC Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Peak Off-State
Blocking Current

I

DRM

VKA = -1000V,
VGA = +18V

TC = +150oC- - 3 mA

TC = +25oC - - 100 µA

Peak Reverse
Blocking Current

I

RRM

VKA = +5V,
VGA = +18V

TC = +150oC- - 4 mA

TC = +25oC - - 100 µA

On-State Voltage V

TM

IK = I

K90

,

VGA = -10V

TC = +150oC - - 1.4 V

TC = +25oC - - 1.5 V

Gate-Anode
Leakage Current

I

GAS

VGA = ±20V - - 200 nA

Input Capacitance C

ISS

VKA = -20V, TJ = +25oC
VGA = +18V

-10-nF

Current Turn-On
Delay Time

t

D(ON)I

L = 200µH, IK = I

K90

= 65A
RG = 1Ω, VGA = +18V, -7V
TJ = +125oC
VKA = -400V

- 120 - ns

Current Rise Time t

RI

- 160 - ns

Current Turn-Off
Delay Time

t

D(OFF)I

- 750 - ns

Current Fall Time t

FI

- 1.45 1.9 µs

Turn-Off Energy E

OFF

-18-mJ

Thermal Resistance R

θJC

- 0.5 0.6

o

C/W

Typical Performance Curves

FIGURE 1. CATHODE CURRENT vs SATURATION VOLTAGE

(TYPICAL)

FIGURE 2. MAXIMUM CONTINUOUS CATHODE CURRENT

100

10

1

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
V

TM

, CATHODE VOLTAGE (V)

2.2 2.4

PULSE TEST
PULSE DURATION = 250µs
DUTY CYCLE < 2%

TJ = +150oC

TJ = +25oC

TJ = -40oC

I

K

, CATHODE CURRENT (A)

100

90
80
70
60
50
40
30
20
10

0

20 30 40 50 60 70 80 90 100 110 120 130 140 150

T

C

, CASE TEMPERATURE (oC)

160

PACKAGE LIMIT

I

K

, DC CATHODE CURRENT (A)

2-15

MCTV65P100F1, MCTA65P100F1

FIGURE 3. TURN-ON DELAY vs CATHODE CURRENT

(TYPICAL)

FIGURE 4. TURN-OFF DELAY vs CATHODE CURRENT

(TYPICAL)

FIGURE 5. TURN-ON RISE TIME vs CATHODE CURRENT

(TYPICAL)

FIGURE 6. TURN-OFF FALL TIME vs CATHODE CURRENT

(TYPICAL)

FIGURE 7. TURN-ON ENERGY LOSS vs CATHODE CURRENT

(TYPICAL)

FIGURE8. TURN-OFFENERGYLOSSvs CATHODECURRENT

(TYPICAL)

Typical Performance Curves

(Continued)

200

150

100

50

0

10 20 30 40 50 60 70 80 90 100

I

K

, CATHODE CURRENT (A)

T

J

= +150oC, RG = 1Ω, L = 200µH

VKA = -400V

VKA = -500V

0

t

D(ON)I

, TURN-ON DELAY (ns)

10

VKA = -500V

VKA = -400V

20 30 40 50 60 70 80 90 100

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

I

K

, CATHODE CURRENT (A)

T

J

= +150oC, RG = 1Ω, L = 200µH

0

t

D(OFF)I

, TURN-OFF DELAY (µs)

TJ = +150oC, RG = 1Ω, L = 200µH

10 20 30 40 50 60 70 80 90 100

250

200

150

100

50

0

I

K

, CATHODE CURRENT (A)

VKA = -500V

VKA = -400V

300

0

t

RI

, RISE TIME (ns)

TJ = +150oC, RG = 1Ω, L = 200µH

10 20 30 40 50 60 70 80 90 100

1.7

1.5

1.3

1.1

I

K

, CATHODE CURRENT (A)

VKA = -500V

VKA = -400V

1.8

1.6

1.4

1.2

1.0
0

t

FI

, FALL TIME (µs)

TJ = +150oC, RG = 1Ω, L = 200µH

10 20 30 40 50 60 70 80 90 100

10

1.0

I

K

, CATHODE CURRENT (A)

VKA = -500V

VKA = -400V

0

E

ON

, TURN-ON SWITCHING LOSS (mJ)

TJ = +150oC, RG = 1Ω, L = 200µH

10 20 30 40 50 60 70 80 90 100

10

1

I

K

, CATHODE CURRENT (A)

VKA = -500V

VKA = -400V

0

E

OFF

, TURN-OFF SWITCHING LOSS (mJ)

2-16

MCTV65P100F1, MCTA65P100F1

FIGURE9. OPERATINGFREQUENCYvsCATHODE CURRENT

(TYPICAL)

FIGURE 10. TURN-OFF CAPABILITY vs ANODE-CATHODE

VOLTAGE

FIGURE 11. BLOCKING VOLTAGE vs dv/dt FIGURE 12. SPIKE VOLTAGE vs di/dt (TYPICAL)

Typical Performance Curves

(Continued)

VKA = -400V

VKA = -500V

f

MAX1

= 0.05 / t

D(ON)I

+ t

D(OFF)I

f

MAX2

= (PD - PC) / E

SWITCH

PD: ALLOWABLE DISSIPATION
PC: CONDUCTION DISSIPATION
(PC DUTY FACTOR = 50%)
R

θ

JC

= 0.5oC/W

10 100

I

K

, CATHODE CURRENT (A)

50

10

1

f

MAX

, MAX OPERATING FREQUENCY (kHz)

TJ = +150oC, VGA = 18V

120

100

80

60

40

20

0

0 -100 -200 -300 -400 -500 -600

V

KA

, PEAK TURN OFF VOLTAGE (V)

-700 -800 -900 -1000

CS = 1.0µF

CS = 0µF

CS = 0.7µF

I

K

, PEAK CATHODE CURRENT (A)

TJ = +150oC

-875

-900

-925

-950

-975

-1000

-1025

-1050

-1075

0.1 1.0 10 100 1,000 10,000

dv/dt (V/µS)

-800

-825

-850

-1100

V

DRM

, BREAKDOWN VOLTAGE (V)

0 5 10 15 20 25 30 35 40 45

-100

-3

SPIKE VOLTAGE (V)

di/dt (A/µs)

-10

CS = 2µF, TJ = +25oC

CS = 0.1µF, TJ = +150oC
C

S

= 0.1µF, TJ = +25oC

CS = 1µF, TJ = +150oC

CS = 1µF, TJ = +25oC

50

CS = 2µF, TJ = +150oC

Operating Frequency Information

Operating frequency information for a typical device (Figure

9) is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs cathode
current (I

K

) plots are possible using the information shown
for a typical unit in Figures 3 to 8. The operating frequency
plot (Figure 9) of a typical device shows f

MAX1

or f

MAX2

whichever is smaller at each point. The information is based
on measurements of a typical device and is bounded by the
maximum rated junction temperature.

f

MAX1

is defined by f

MAX1

= 0.05 / (t

D(ON)I+tD(OFF)I

). t

D(ON)I

+

t

D(OFF)I

deadtime (the denominator) has been arbitrarily held to
10% of the on-state time for a 50% duty factor. Other definitions
are possible. t

D(ON)I

is defined as the 10% point of the leading
edge of the input pulse and the point where the cathode current
rises to 10% of its maximum value. t

D(OFF)I

is defined as the
90% point of the trailing edge of the input pulse and the point
where the cathode current falls to 90% of its maximum value .

Device delay can establish an additional frequency limiting
condition for an application other than T

JMAX.tD(OFF)I

is
important when controlling output ripple under a lightly loaded
condition. f

MAX2

is defined by f

MAX2

=(PD-PC)/(EON+E

OFF

).

The allowable dissipation (P

D

) is defined by PD=(T

JMAX-TC

)/

R

ΘJC

. The sum of device switching and conduction losses must

not exceed P

D

. A 50% duty factor was used and the conduction

losses (P

C

) are approximated by PC=(VKA•IK)/2.EONis
defined as the sum of the instantaneous power loss starting at
the leading edge of the input pulse and ending at the point where
the anode-cathode voltage equals saturation voltage (V

KA

=

V

TM

). E

OFF

is defined as the sum of the instantaneous power
loss starting at the trailing edge of the input pulse and ending at
the point where the cathode current equals zero (I

K

= 0).

2-17

MCTV65P100F1, MCTA65P100F1

Test Circuits

FIGURE 13. SWITCHING TEST CIRCUIT FIGURE 14. V

SPIKE

TEST CIRCUIT

FIGURE 15. SWITCHING TEST WAVEFORMS FIGURE 16. V

SPIKE

TEST WAVEFORMS

200µH

DUT

V

G

V

K

I

K

+

-

C

S

DIODES RHRG75120

9V

20V

V

A

I

K

V

G

500Ω

C

S

10kΩ

4.7kΩ

DUT

+

-

+

-

+

-

I

K

V

G

t

FI

t

D(OFF)I

t

RI

t

D(ON)I

10%

90%

10%

90%

-V

KA

I

K

V

AK

V

G

V

TM

V

SPIKE

di/dt

Handling Precautions for MCT's

Mos Controlled Thyristors are susceptible to gate-insula-

tion damage by the electrostatic discharge of energy through
the devices. When handling these devices, care should be
exercised to assure that the static charge built in the
handler's body capacitance is not discharged through the
device. MCT's can be handled safely if the following basic
precautions are taken:

1.Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as

*

“ECCOSORB LD26” or equivalent.

2.When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.

3.Tips of soldering irons should be grounded.

4.Devices should never be inserted into or removed from cir­cuits with power on.

5.Gate Voltage Rating - Never exceed the gate-voltage
rating of V

GA

. Exceeding the rated VGAcan result in

permanent damage to the oxide layer in the gate region.

6.Gate Termination - The gates of these devices are essen­tially capacitors. Circuits that leave the gate open-circuited
or floating should be avoided. These conditions can result
in turn-on of the device due to voltage buildup on the input
capacitor due to leakage currents or pickup.

7.Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate protec­tion is required an external zener is recommended.

† Trademark Emerson and Cumming, Inc.