Datasheet mb2646 DATASHEETS (Philips)

Page 1
Philips Semiconductors Products

Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
1
August 23, 1993 853-1617 10589

FEATURES

•Multiple V
CC
and GND pins minimize
switching noise
•Live insertion/extraction permitted
•Power-up 3-State
•Power-up reset
•Multiplexed real-time and stored data
•Outputs sink 64mA and source 32mA
•Latch-up protection exceeds 500mA per
Jedec JC40.2 Std 17
•ESD protection exceeds 2000V per MIL
STD 883 Method 3015 and 200V per Machine Model

DESCRIPTION

The MB2646 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The MB2646 dual transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (nOE
) and Direction (nDIR) pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both.

QUICK REFERENCE DATA

SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay nAx to nBx
CL = 50pF; VCC = 5V 3.2 ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
I/O
I/O capacitance VO = 0V or VCC; 3-State 7 pF
I
CCZ
Total supply current Outputs disabled; VCC = 5.5V 500 µA

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER
52-pin plastic Quad Flat Pack -40°C to +85°C MB2646BB 1418B

PIN CONFIGURATION LOGIC SYMBOL

Vcc Vcc
19 2220 231716 25 26241514 2118
1A2 1A3 1A4
GND
1A5 1A6 1A7 2A0 2A1 2A2 2A3 2A4 2A5
1 2
3 4
5 6 7 8
9 10 11 12 13
47 4446 434950 41 40425152 4548
1B2 1B3 1B4 1B5 1B6 1B7 2B0 2B1 2B2 GND 2B3 2B4 2B5
39 38 37 36
35 34 33 32 31 30 29 28 27
MB2646
52-pin PQFP
1A1
1A0
1SAB
1CPAB
1DIR
1OE
1CPBA
1SBA
GND
1B0
1B1
Vcc
2A6
2A7
GND
2SAB
2CPAB
2DIR
2OE
2CPBA
2SBA
2B7
2B6
Vcc
42 41 39 38 37 36 35 34
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
50 51 1 2 3 5 6 7
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
48 49
1CPAB
1SAB 47 1DIR 45 1CPBA
33 32 31 29 28 27 25 24
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
8 9 10 11 12 13 15 16
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 19
18
2CPAB
2SAB 20 2DIR 22 2CPBA
44 1SBA 46 1OE
23 2SBA 21 2OE
Page 2
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
2

DESCRIPTION (continued)

The select (nSAB, nSBA) pins determine whether data is stored or transferred through the device in real-time. The nDIR determines which bus will receive data when the nOE
is
active Low. In the isolation mode (nOE
= High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. When an output
function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time.

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION
48, 45, 19, 22 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A 49, 44, 18, 23 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A
47, 20 1DIR, 2DIR Direction control inputs
50, 51, 1, 2, 3, 5, 6, 7,
8, 9, 10, 11, 12, 13, 15, 16
1A0 – 1A7,
2A0 – 2A7
Data inputs/outputs (A side)
42, 41, 39, 38, 37, 36, 35, 34,
33, 32, 31, 29, 28, 27, 25, 24
1B0 – 1B7,
2B0 – 2B7
Data inputs/outputs (B side)
46, 21 1OE, 2OE Output enable inputs
4, 17, 30, 43 GND Ground (0V)
14, 26, 40, 52 V
CC
Positive supply voltage

LOGIC SYMBOL (IEEE/IEC)

50
41
39
38
37
36
35
34
46
47 44 49 45 48
51
1
2
3
5
6
7
42
8
32
31
29
28
27
25
24
21
20 23 18 22 19
9
10
11
12
13
15
16
33
≥1
∇1
G3 3EN1 [BA] 3EN2 [AB] G6 G7 C4 C5
5D 7 1 7
6 4D 6
1
≥1
2∇
≥1
∇1
G3 3EN1 [BA] 3EN2 [AB] G6 G7 C4 C5
5D 7 1 7
6 4D 6
1
≥1
2∇
Page 3
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
3
The following examples demonstrate the four fundamental bus-management functions that can be performed with the MB2646.
}
REAL TIME BUS TRANSFER
BUS B TO BUS A
nOE nDIR nCPAB nCPBA nSAB nSBA
L L X X X L
}
REAL TIME BUS TRANSFER
BUS A TO BUS B
nOE nDIR nCPAB nCPBA nSAB nSBA
L H X X L X
}
STORAGE FROM
A, B, OR A AND B
nOE nDIR nCPAB nCPBA nSAB nSBA
L H ↑ X X X L L X ↑ X X H X ↑ ↑ X X
}
TRANSFER STORED DATA
TO A OR B
nOE nDIR nCPAB nCPBA nSAB nSBA
L L X H | L X H L H H | L X H X
A B A B A B
A B
Page 4
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
4

LOGIC DIAGRAM

1D
C1
Q
nB1 nB2 nB3 nB4 nB5 nB6 nB7
nA1 nA2 nA3 nA4 nA5 nA6 nA7
DETAIL A X 7
nOE
nDIR
nCPBA
nSBA
nCPAB
nSAB
nB0
1D
C1
Q
nA0
1of 8 Channels

FUNCTION TABLE

INPUTS DATA I/O OPERATING MODE
nOE nDIR nCPAB nCPBA nSAB nSBA nAx nBx
X X ↑ X X X Input
Unspecified
output*
Store A, B unspecified
X X X ↑ X X
Unspecified
output*
Input Store B, A unspecified
H H
X X
↑
H or L
↑
H or L
X X
X X
Input Input
Store A and B data Isolation, hold storage
L L
L L
X X
X
H or L
X X
L H
Output Input
Real time B data to A bus Stored B data to A bus
L L
H H
X
H or L
X X
L H
X X
Input Output
Real time A data to B bus Stored A data to B bus
H = High voltage level L = Low voltage level X = Don’t care ↑ = Low-to-High clock transition * The data output function may be enabled or disabled by various signals at the nOE
input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every Low-to-High transition of the clock.
Page 5
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
5

ABSOLUTE MAXIMUM RATINGS

1, 2
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
I
IK
DC input diode current VI < 0 –18 mA
V
I
DC input voltage
3
–1.2 to +7.0 V
I
OK
DC output diode current VO < 0 –50 mA
V
OUT
DC output voltage
3
output in Off or High state –0.5 to +5.5 V
I
OUT
DC output current output in Low state 128 mA
T
stg
Storage temperature range –65 to 150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT
MIN MAX
V
CC
DC supply voltage 4.5 5.5 V
V
I
Input voltage 0 V
CC
V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level Input voltage 0.8 V
I
OH
High-level output current –32 mA
I
OL
Low-level output current 64 mA
∆t/∆v Input transition rise or fall rate 0 10 ns/V
T
amb
Operating free-air temperature range –40 +85 °C
Page 6
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
6

DC ELECTRICAL CHARACTERISTICS

LIMITS
SYMBOL PARAMETER TEST CONDITIONS T
amb
= +25°C
T
amb
= –40°C
to +85°C
UNIT
MIN TYP MAX MIN MAX
V
IK
Input clamp voltage VCC = 4.5V; IIK = –18mA –0.9 –1.2 –1.2 V
VCC = 4.5V; IOH = –3mA; VI = VIL or V
IH
2.5 2.9 2.5 V
V
OH
High–level output voltage VCC = 5.0V; IOH = –3mA; VI = VIL or V
IH
3.0 3.4 3.0 V
VCC = 4.5V; IOH = –32mA; VI = VIL or V
IH
2.0 2.4 2.0 V
V
OL
Low–level output voltage VCC = 4.5V; IOL = 64mA; VI = VIL or V
IH
0.42 0.55 0.55 V
V
RST
Power-up output voltage
NO TAG
VCC = 5.5V; IO = 1mA; VI = GND or V
CC
0.13 0.55 0.55 V
I
I
Input leakage Control pins VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA current Data pins VCC = 5.5V; VI = GND or 5.5V ±5 ±100 ±100 µA
I
OFF
Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA
I
PU/PD
Power-up/down 3-State output current
4
VCC = 2.1V; VO = 0.5V; VI = GND or VCC; V
OE
= Don’t care
±5.0 ±50 ±50 µA
IIH + I
OZH
3–State output High current VCC = 5.5V; VO = 2.7V; VI = VIL or V
IH
5.0 50 50 µA
IIL + I
OZL
3–State output Low current VCC = 5.5V; VO = 0.5V; VI = VIL or V
IH
–5.0 –50 –50 µA
I
CEX
Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or V
CC
5.0 50 50 µA
I
O
Output current
1
VCC = 5.5V; VO = 2.5V –50 –80 –180 –50 –180 mA
I
CCH
VCC = 5.5V; Outputs High, VI = GND or V
CC
120 250 250 µA
I
CCL
Quiescent supply current VCC = 5.5V; Outputs Low, VI = GND or V
CC
37 60 60 mA
I
CCZ
VCC = 5.5V; Outputs 3–State; V
I
= GND or V
CC
120 250 250 µA
∆I
CC
Additional supply current per input pin
2
VCC = 5.5V; one input at 3.4V, other inputs at V
CC
or GND
0.5 1.5 1.5 mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10% a
transition time of up to 100µsec is permitted.
Page 7
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
7

AC CHARACTERISTICS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
V
CC
= +5.0V
T
amb
= -40 to
+85
o
C
V
CC
= +5.0V ±0.5V
UNIT
MIN TYP MAX MIN MAX
f
MAX
Maximum clock frequency 1 130 190 130 MHz
t
PLH
t
PHL
Propagation delay nCPAB to nBx or nCPBA to nAx
1
2.2
2.4
3.9
4.6
5.1
5.4
2.2
2.4
5.6
5.9
ns
t
PLH
t
PHL
Propagation delay nAx to nBx or nBx to nAx
2
1.5
1.5
3.1
3.3
4.3
4.5
1.5
1.5
4.8
5.0
ns
t
PLH
t
PHL
Propagation delay nSAB to nBx or nSBA to nAx
2, 3
1.5
1.8
3.7
3.9
4.8
4.9
1.5
1.8
5.5
5.6
ns
t
PZH
t
PZL
Output enable time nOE
to nAx or nBx
5 6
1.5
2.1
3.5
4.4
4.8
5.6
1.5
2.1
5.6
6.4
ns
t
PHZ
t
PLZ
Output disable time nOE
to nAx or nBx
5 6
2.1
1.5
3.8
3.1
5.0
4.2
2.1
1.5
5.7
4.7
ns
t
PZH
t
PZL
Output enable time nDIR to nAx or nBx
5 6
1.5
2.3
4.2
4.9
5.4
6.2
1.5
2.3
6.2
6.9
ns
t
PHZ
t
PLZ
Output disable time nDIR to nAx or nBx
5 6
2.1
1.5
3.8
3.2
5.0
4.3
2.1
1.5
5.7
5.0
ns

AC SETUP REQUIREMENTS

GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25oC
VCC = +5.0V
T
amb
= -40 to +85oC
VCC = +5.0V ±0.5V
UNIT
MIN TYP MIN
ts(H) t
s
(L)
Setup time nAx to nCPAB, nBx to nCPBA
4
2.0
1.5
0.7
0.0
2.0
1.5
ns
th(H) t
h
(L)
Hold time nAx to nCPAB, nBx to nCPBA
4
1.5
1.0
0.0
–0.7
1.5
1.0
ns
tw(H) t
w
(L)
Pulse width, High or Low nCPAB or nCPBA
1
4.5
3.0
2.5
2.0
4.5
3.0
ns
Page 8
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
8

AC WAVEFORMS

VM = 1.5V, VIN = GND to 3.0V
V
M
nAx or nBx
V
M
V
M
V
M
V
MVM
nCPBA or
nCPAB
ts(H)
th(H)
ts(L)
th(L)
nOE, nDIR
V
M
t
PZH
t
PHZ
0V
V
OH
–0.3V
t
PZL
t
PLZ
0V
V
OL
+0.3V
V
M
V
M
V
M
V
M
V
M
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
nSBA or nSAB
V
M
t
PLH
t
PHL
V
M
V
M
V
M
nAx or nBx
V
M
t
PHL
t
PLH
V
M
V
M
V
M
nSBA or
nSAB
nAx or nBx
nAx or nBx
nOE
, nDIR
nAx or nBx
nDIR
nDIR
V
M
V
M
V
M
V
M
V
M
1/f
MAX
tw(H) tw(L)
t
PHL
t
PLH
nCPBA or
nCPAB
nAx or nBx
nAx or nBx
nAx or nBx
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Waveform 2. Propagation Delay, nSAB to nBx or
nSBA to nAx, nAx to nBx or nBx to nAx
Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx
Waveform 4. Data Setup and Hold Times
Waveform 5. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 6. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
Page 9
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
9
PULSE
GENERATOR
R
T
V
IN
D.U.T
V
OUT
C
L
R
L
V
CC
R
L
7.0V
Test Circuit for 3-State Outputs
V
M
V
M
t
W
AMP (V)
NEGATIVE PULSE
10% 10%
90%
90%
0V
V
M
V
M
t
W
AMP (V)
POSITIVE PULSE
90% 90%
10%
10%
0V
t
THL
(tF)
t
TLH
(tR) t
THL
(tF)
t
TLH
(tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. C
L
= Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
Amplitude Rep. Rate t
W
t
R
t
F
MB 3.0V 1MHz 500ns 2.5ns 2.5ns
SWITCH POSITION
TEST SWITCH
t
PLZ
closed
t
PZL
closed
All other open
Page 10
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
10
Adjustment of t
PHL
for
Load Capacitance and # of Outputs Switching
nCPAB to nBx or nCPBA to nAx
t
PLH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nCPAB to nBx or nCPBA to nAx
°C
MAX
4.5V
CC
5.5V
CC
MIN
ns
Offset in ns
Adjustment of t
PLH
for
Load Capacitance and # of Outputs Switching
nCPAB to nBx or nCPBA to nAx
pF
ns
Offset in ns
t
PHL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nCPAB to nBx or nCPBA to nAx
°C
MAX
4.5V
CC
5.5V
CC
MIN
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PLH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nAx to nBx or nBx to nAx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PLH
for
Load Capacitance and # of Outputs Switching
nAx to nBx or nBx to nAx
pF
16 switching 8 switching
1 switching
16 switching 8 switching
1 switching
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
5
4
3
2
1
0
–1
–2
0 50 100 150 200
5
4
3
2
1
0
–1
–2
0 50 100 150 200
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
5
4
3
2
1
0
–1
–2
0 50 100 150 200
Page 11
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
11
t
PHL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nAx to nBx or nBx to nAx
°C
MAX
4.5V
CC
5.5V
CC
MIN
ns
Offset in ns
Adjustment of t
PHL
for
Load Capacitance and # of Outputs Switching
nAx to nBx or nBx to nAx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PLH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nSAB to nBx or nSBA to nAx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PLH
for
Load Capacitance and # of Outputs Switching
nSAB to nBx or nSBA to nAx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PHL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nSAB to nBx or nSBA to nAx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PHL
for
Load Capacitance and # of Outputs Switching
nSAB to nBx or nSBA to nAx
pF
16 switching 8 switching
1 switching
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
7
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
5
4
3
2
1
0
–1
–2
0 50 100 150 200
4
3
2
1
0
–1
–2
0 50 100 150 200
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
0 50 100 150 200
5
4
3
2
1
0
–1
–2
Page 12
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
12
t
PZH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
ns
Offset in ns
Adjustment of t
PZH
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PZL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PZL
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PHZ
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PHZ
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching 1 switching
8
7
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
8
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
5
4
3
2
1
0
–1
–2
0 50 100 150 200
5
4
3
2
1
0
–1
–2
0 50 100 150 200
7
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
10
8
6
4
2
0
–2
–4
0 50 100 150 200
Page 13
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
13
t
PZH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
ns
Offset in ns
Adjustment of t
PZH
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PZL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PZL
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PHZ
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PHZ
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching 1 switching
8
7
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
8
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
5
4
3
2
1
0
–1
–2
0 50 100 150 200
5
4
3
2
1
0
–1
–2
0 50 100 150 200
7
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
10
8
6
4
2
0
–2
–4
0 50 100 150 200
Page 14
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
14
t
PLZ
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nOE
to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
ns
Offset in ns
Adjustment of t
PLZ
for
Load Capacitance and # of Outputs Switching
nOE
to nAx or nBx
pF
16 switching 8 switching 1 switching
ns
Offset in ns
t
PZH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nDIR to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PZH
for
Load Capacitance and # of Outputs Switching
nDIR to nAx or nBx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
PZL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nDIR to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PZL
for
Load Capacitance and # of Outputs Switching
nDIR to nAx or nBx
pF
16 switching 8 switching
1 switching
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
8
7
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
6
5
4
3
2
1
0
–1
–2
0 50 100 150 200
5
4
3
2
1
0
–1
–2
0 50 100 150 200
8
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
5
4
3
2
1
0
–1
–2
0 50 100 150 200
Page 15
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
15
t
PHZ
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nDIR to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
ns
Offset in ns
Adjustment of t
PHZ
for
Load Capacitance and # of Outputs Switching
nDIR to nAx or nBx
pF
16 switching 8 switching 1 switching
ns
Offset in ns
t
PLZ
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
nDIR to nAx or nBx
°C
MAX
4.5V
CC
5.5V
CC
MIN
Adjustment of t
PLZ
for
Load Capacitance and # of Outputs Switching
nDIR to nAx or nBx
pF
16 switching 8 switching
1 switching
ns
Offset in ns
t
TLH
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
°C
4.5V
CC
5.5V
CC
Adjustment of t
TLH
for
Load Capacitance and # of Outputs Switching
pF
16 switching 8 switching 1 switching
7
6
5
4
3
2
1
–55 –35 –15 5 25 45 65 85 105 125
6
5
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
10
8
6
4
2
0
–2
–4
0 50 100 150 200
6
5
4
3
2
1
0
–1
–2
0 50 100 150 200
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
9
7
5
3
1
–1
–3
0 50 100 150 200
Page 16
Philips Semiconductors Products Product specification
MB2646
Dual octal bus transceiver/registers (3-State)
August 23, 1993
16
ns
Offset in ns
t
THL
vs Temperature (T
amb
)
C
L
= 50pF, 1 Output Switching
°C
4.5V
CC
5.5V
CC
Adjustment of t
THL
for
Load Capacitance and # of Outputs Switching
pF
20 switching 10 switching
1 switching
Volts
Volts
V
OHV
and V
OLP
vs Load Capacitance
V
CC
= 5V, VIN = 0 to 3V
pF
125°C 25°C –55°C
V
OHP
and V
OLV
vs Load Capacitance
V
CC
= 5V, VIN = 0 to 3V
pF
125°C 25°C –55°C
125°C 25°C –55°C
125°C 25°C –55°C
4
3
2
1
0
–55 –35 –15 5 25 45 65 85 105 125
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0 50 100 150 200
5
4
3
2
1
0
–1
–2
0 50 100 150 200
6 5 4 3 2 1
0 –1 –2 –3
0 50 100 150 200
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