, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Protected by U.S. Patents, including 6411531.
The LTC®3210 is a low noise charge pump DC/DC converter
designed to drive four MAIN LEDs and one high current
CAM LED for camera lighting. The LTC3210 requires only
four small ceramic capacitors and two current set resistors to form a complete LED power supply and current
controller.
Built-in soft-start circuitry prevents excessive inrush current during start-up and mode changes. High switching
frequency enables the use of small external capacitors.
Independent MAIN and CAM full-scale current settings
are programmed by two external resistors. Shutdown
mode and current output levels are selected via two logic
inputs.
The full-scale current through the LEDs is programmed
via external resistors. ENM and ENC are toggled to adjust
the LED currents via internal counters and DACs. The
part is shut down when both ENM and ENC are low for
150µs (typ).
The charge pump optimizes effi ciency based on the voltage across the LED current sources. The part powers up
in 1x mode and will automatically switch to boost mode
whenever any enabled LED current source begins to enter dropout. The LTC3210 is available in a 3mm × 3mm
16-lead QFN package.
TYPICAL APPLICATIO
C2
2.2µF
C1P C1MC2P
V
BAT
C1
2.2µF
ENM
ENC
V
BAT
ENM
ENC
RMRCGND
30.1k1%24.3k
LTC3210
C3
2.2µF
C2M
CPO
MLED1
MLED2
MLED3
MLED4
CLED
1%
U
C4
2.2µF
MAINCAM
3210 TA01
Effi ciency vs V
100
90
80
) (%)
70
IN
/P
60
LED
50
40
30
EFFICIENCY (P
20
4 LEDs AT 9mA/LED
(TYP V
10
= 25°C
T
A
0
3.0
4-LED MAIN Display
Voltage
BAT
AT 9mA = 3V, NICHIA NSCW100)
F
3.4
3.6
3.8
4.0
V
(V)
BAT
3.2
4.44.2
3210 TA01b
3210f
1
Page 2
LTC3210
16 15 14 13
5 6 7 8
TOP VIEW
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
EXPOSED PAD IS GND (PIN 17)
MUST BE SOLDERED TO PCB
9
10
17
11
12
4
3
2
1C1P
CPO
ENM
MLED1
GND
CLED
ENC
RC
C2P
V
BAT
C1M
C2M
MLED2
MLED3
MLED4
RM
WW
W
U
ABSOLUTE AXIU RATIGS
(Note 1)
V
, CPO to GND ........................................–0.3V to 6V
BAT
ENM, ENC ................................... – 0.3V to (V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may become impaired.
Note 2: Based on long-term current density limitations. Assumes an
operating duty cycle of ≤10% under absolute maximum conditions
for durations less than 10 seconds. Maximum current for continuous
operation is 300mA.
Note 3: The LTC3210E is guaranteed to meet performance specifi cations
from 0°C to 70°C. Specifi cations over the –40°C to 85°C ambient
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 4: 1.5x mode output impedance is defi ned as (1.5V
2x mode output impedance is defi ned as (2V
BAT
– V
CPO
)/I
BAT
OUT
– V
.
CPO
)/I
OUT
.
Note 5: If the part has been shut down then the initial enable time is about
100µs longer due to the bandgap enable time.
3210f
3
Page 4
LTC3210
UW
TYPICAL PERFOR A CE CHARACTERISTICS
T
Dropout Time from ShutdownDropout Time When Enabled1.5x CPO Ripple
CPO
1V/DIV
2V/DIV
1X
EN
MODE
RESET
500µs/DIV
1.5X
2X
3210 G01
CPO
1V/DIV
ENC
2V/DIV
MODE
RESET
ENM = HIGH
1.5X
1X
250µs/DIV
1x Mode Switch Resistance
V
CPO
20mV/DIV
COUPLED
2x CPO Ripple
V
= 3.6V
BAT
= 200mA
I
CPO
= 2.2µF
C
CPO
AC
500ns/DIV
3210 G04
vs Temperature
0.70
I
= 200mA
CPO
0.65
0.60
V
0.55
0.50
SWITCH RESISTANCE (Ω)
0.45
0.40
BAT
–40
= 3.3V
V
= 3.9V
BAT
–15103560
TEMPERATURE (°C)
= 25°C unless otherwise stated.
A
2X
50mV/DIV
COUPLED
3210 G02
V
= 3.6V
BAT
85
3210 G05
V
= 3.6V
BAT
= 200mA
I
CPO
= 2.2µF
C
CPO
V
CPO
AC
500ns/DIV
1.5x Mode Charge Pump Open-Loop
Output Resistance vs Temperature
– V
(1.5V
3.8
V
BAT
V
CPO
3.6
C2 = C3 = C4 = 2.2µF
3.4
3.2
3.0
2.8
2.6
OPEN LOOP OUTPUT RESISTANCE (Ω)
2.4
–40
BAT
= 3V
= 4.2V
–15103585
)/I
CPO
CPO
TEMPERATURE (˚C)
3210 G03
60
3210 G06
4.8
4.6
4.4
4.2
4.0
CPO VOLTAGE (V)
3.8
3.6
4
1.5x Mode CPO Voltage
vs Load Current
C2 = C3 = C4 = 2.2µF
V
= 3.3V
BAT
V
BAT
V
= 3.2V
BAT
V
= 3.1V
BAT
V
= 3V
BAT
0
100200300400
LOAD CURRENT (mA)
= 3.4V
V
BAT
V
BAT
= 3.5V
= 3.6V
3210 G07
500
2x Mode Charge Pump Open-Loop
Output Resistance vs Temperature
– V
(2V
4.6
V
BAT
V
CPO
4.4
C2 = C3 = C4 = 2.2µF
4.2
4.0
3.8
3.6
3.4
OPEN LOOP OUTPUT RESISTANCE (Ω)
3.2
–40
BAT
= 3V
= 4.8V
)/I
CPO
CPO
–15103585
TEMPERATURE (˚C)
2x Mode CPO Voltage
vs Load Current
5.2
C2 = C3 = C4 = 2.2µF
5.1
5.0
4.9
4.8
4.7
4.6
CPO VOLTAGE (V)
4.5
4.4
4.3
4.2
60
3210 G08
0
V
BAT
V
BAT
V
100
200
LOAD CURRENT (mA)
= 3.5V
BAT
V
V
BAT
= 3.4V
= 3.3V
= 3.2V
BAT
= 3.1V
300
V
= 3.6V
BAT
V
= 3V
BAT
400
500
3210 G09
3210f
Page 5
UW
TYPICAL PERFOR A CE CHARACTERISTICS
T
= 25°C unless otherwise stated.
A
LTC3210
CLED Pin Dropout Voltage
vs CLED Pin Current
500
V
= 3.6V
BAT
400
300
200
100
CLED PIN DROPOUT VOLTAGE (mV)
SHUTDOWN CURRENT (µA)
V
BAT
0
50 100
V
Shutdown Current
BAT
vs V
BAT
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
2.7
3.03.3
150
CLED PIN CURRENT (mA)
Voltage
TA = –40°C
TA = 85°C
200
TA = 25°C
3.64.2
V
VOLTAGE (V)
BAT
250
350
400
3210 G10
3210 G13
300
3.94.5
MLED Pin Dropout Voltage
vs MLED Pin Current
100
V
= 3.6V
BAT
90
80
70
60
50
40
30
20
MLED PIN DROPOUT VOLTAGE (mV)
10
0
42
0
86
10
MLED PIN CURRENT (mA)
1x Mode No Load V
Voltage
vs V
RM = 33.2k
RC = 24.3k
2.7
BAT
3.0
3.3
V
VOLTAGE (V)
BAT
3.63.9
CURRENT (µA)
V
BAT
800
780
760
740
720
700
680
660
640
620
600
12 1418
16
Current
BAT
4.2
3210 G11
3210 G14
4.5
FREQUENCY (kHz)
20
SUPPLY CURRENT (mA)
Oscillator Frequency
Voltage
vs V
2.7
BAT
TA = 85°C
3.0
TA = 25°C
TA = –40°C
3.3
3.64.5
V
VOLTAGE (V)
BAT
850
840
830
820
810
800
790
780
770
760
1.5x Mode Supply Current vs I
– 1.5I
(IV
BAT
20
V
= 3.6V
BAT
15
10
5
0
100
0
)
CPO
300
200
LOAD CURRENT (mA)
3.9
400
4.2
3210 G12
CPO
3210 G15
500
2x Mode Supply Current vs I
– 2I
(IV
BAT
20
V
= 3.6V
BAT
15
10
SUPPLY CURRENT (mA)
5
0
100
0
)
CPO
200
LOAD CURRENT (mA)
300
400
CPO
3210 G16
500
CLED Pin Current
vs CLED Pin Voltage
400
V
= 3.6V
BAT
360
320
280
240
200
160
120
CLED PIN CURRENT (mA)
80
40
0
0.2
0
CLED PIN VOLTAGE (V)
0.4
0.6
0.8
1
3210 G17
3210f
5
Page 6
LTC3210
UW
TYPICAL PERFOR A CE CHARACTERISTICS
T
= 25°C unless otherwise stated.
A
MLED Pin Current
vs MLED Pin Voltage
22
V
= 3.6V
BAT
20
18
16
14
12
10
8
6
MLED PIN CURRENT (mA)
4
2
0
0.00
0.02
0.08
0.06
0.04
MLED PIN VOLTAGE (V)
MLED Current
vs ENM Strobe Pulses
20
V
= 3.6V
BAT
18
RM = 33.2k
16
14
12
10
8
6
MLED CURRENT (mA)
4
2
0
0
6
7
NUMBER OF ENM STROBE PULSES
CLED Current
vs ENC Strobe Pulses
400
V
= 3.6V
BAT
RC = 24.3k
350
300
250
200
150
CLED CURRENT (mA)
100
50
0.10
0.12
0.14
0.16
0.18
3210 G18
0.20
0
764
0
NUMBER OF ENC STROBE PULSES
5
321
3210 G19
V
BAT
BAT
Voltage
(V)
3.8 3.95 4.1 4.25
3210 G21
Effi ciency vs V
90
80
70
) (%)
60
IN
/P
50
LED
40
30
20
EFFICIENCY (P
300mA LED CURRENT
AT 300mA = 3.1V, AOT-2015HPW
(TYP V
10
4
5
3
2
1
3210 G20
0
F
= 25°C
T
A
3.05 3.2 3.35 3.5 3.654.4
2.9
6
3210f
Page 7
UUU
PI FUCTIOS
LTC3210
C1P, C2P, C1M, C2M (Pins 1, 16, 14, 13): Charge Pump
Flying Capacitor Pins. A 2.2µF X7R or X5R ceramic capacitor should be connected from C1P to C1M and C2P
to C2M.
CPO (Pin 2): Output of the Charge Pump Used to Power
All LEDs. This pin is enabled or disabled using the ENM
and ENC inputs. A 2.2µF X5R or X7R ceramic capacitor
should be connected to ground.
ENM, ENC (Pins 3, 10): Inputs. The ENM and ENC pins
are used to program the LED output currents. Each input
is strobed up to 7 times to decrement the internal 3-bit
DACs from full-scale to 1LSB. The counter will stop at
1 LSB if the strobing continues. The pin must be held
high after the fi nal desired positive strobe edge. The data
is transferred after a 150µs (typ) delay. Holding the ENM
or ENC pin low will set the LED current to 0 and will reset
the counter after 150µs (typ). If both inputs are held low
for longer than 150µs (typ) the part will go into shutdown.
The charge pump mode is reset to 1x whenever ENC goes
low or when the part is in shutdown mode.
MLED1, MLED2, MLED3, MLED4 (Pins 4, 5, 6, 7):
Outputs. MLED1 to MLED4 are the MAIN current source
outputs. The LEDs are connected between CPO (anodes)
and MLED1-4 (cathodes). The current to each LED output
is set via the ENM input, and the programming resistor
connected between RM and GND. Each of the four LED
outputs can be disabled by connecting the output directly
to CPO. A 10µA current will fl ow through each directly
connected LED output.
RM, RC (Pins 8, 9): LED Current Programming Resistor
Pins. The RM and RC pins will servo to 1.2V. Resistors
connected between each of these pins and GND are used
to set the CLED and MLED current levels. Connecting
a resistor 12k or less will cause the LTC3210 to enter
overcurrent shutdown.
CLED (Pin 11): Output. CLED is the CAM current source
output. The LED is connected between CPO (anode) and
CLED (cathode). The current to the LED output is set via
the ENC input, and the programming resistor connected
between RC and GND.
GND (Pin 12): Ground. This pin should be connected to
a low impedance ground plane.
V
(Pin 15): Supply voltage. This pin should be bypassed
BAT
with a 2.2µF, or greater low ESR ceramic capacitor.
Exposed Pad (Pin 17): This pad should be connected
directly to a low impedance ground plane for optimal
thermal and electrical performance.
3210f
7
Page 8
LTC3210
2
3
4
BLOCK DIAGRA
W
V
BAT
RM
ENM
C1P
1
800kHz
OSCILLATOR
15
CHARGE PUMP
141613
C2MC1MC2P
GND
12
CPO
2
–
+
+
1.215V
–
500Ω
8
3
250k
TIMER
3-BIT
DOWN
COUNTER
ENABLE MAIN
3-BIT
EXPONENTIAL
DAC
ENABLE CP
MLED
CURRENT
SOURCES
4
MLED1
MLED
4
5
6
MLED
RC
ENC
MLED
3210 BD
7
CLED
11
3210f
+
1.215V
–
500Ω
9
10
250k
TIMER
TIMER
3-BIT
DOWN
COUNTER
SHUTDOWN
ENABLE CAM
3-BIT
LINEAR
DAC
CLED
CURRENT
SOURCE
8
Page 9
OPERATIO
LTC3210
U
Power Management
The LTC3210 uses a switched capacitor charge pump to
boost CPO to as much as 2 times the input voltage up to
5.1V. The part starts up in 1x mode. In this mode, V
BAT
is
connected directly to CPO. This mode provides maximum
effi ciency and minimum noise. The LTC3210 will remain in
1x mode until an LED current source drops out. Dropout
occurs when a current source voltage becomes too low
for the programmed current to be supplied. When dropout
is detected, the LTC3210 will switch into 1.5x mode. The
CPO voltage will then start to increase and will attempt
to reach 1.5x V
up to 4.6V. Any subsequent dropout
BAT
will cause the part to enter the 2x mode. The CPO voltage
will attempt to reach 2x V
up to 5.1V. The part will be
BAT
reset to 1x mode whenever the part is shut down or when
ENC goes low.
A two phase nonoverlapping clock activates the charge
pump switches. In the 2x mode the fl ying capacitors are
charged on alternate clock phases from V
to minimize
BAT
input current ripple and CPO voltage ripple. In 1.5x mode the
fl ying capacitors are charged in series during the fi rst clock
phase and stacked in parallel on V
during the second
BAT
phase. This sequence of charging and discharging the fl ying
capacitors continues at a constant frequency of 800kHz.
current is achieved ENM is stopped high. The output current then changes to the programmed value after 150µs
(typ). The counter will stop when the LSB is reached. The
output current is set to 0 when ENM is toggled low after
the output has been enabled. If strobing is started within
150µs (typ), after ENM has been set low, the counter will
continue to count down. After 150µs (typ) the counter
is reset.
The CLED current is delivered by a programmable current
source. Eight linear current settings (0mA to 380mA, RC
= 24.3k) are available by strobing the ENC pin. Each positive strobe edge decrements a 3-bit down counter which
controls a 3-bit linear DAC. When the desired current is
reached, ENC is stopped high. The output current then
changes to the programmed value after 150µs (typ). The
counter will stop when the LSB is reached. The output
current is set to 0 when ENC is toggled low after the output
has been enabled. If strobing is started within 150µs (typ)
after ENC has been set low, the counter will continue to
count down. After 150µs (typ) the counter is reset.
The full-scale output current is calculated as follows:
MLED full-scale output current
=
(1.215V/(RM + 500)) • 515
LED Current Control
The MLED currents are delivered by the four programmable
current sources. Eight current settings (0mA to 20mA,
RM = 30.1k) are available by strobing the ENM pin. Each
positive strobe edge decrements a 3-bit down counter
which controls an exponential DAC. When the desired
ENM
OR ENC
LED
CURRENT
SHUTDOWN
t
PW ≥ 60ns
Figure 1. Current Programming and Shutdown Timing Diagram
t
EN 150µs (TYP)
CLED full-scale output current
(1.215V/(RC + 500)) • 7500
=
When both ENM and ENC are held low for 150µs (typ)
the part will go into shutdown. See Figure 1 for timing
information.
ENC resets the mode to 1x on a falling edge.
t
SD 150µs (TYP)
PROGRAMMED
CURRENT
ENM = ENC = LOW
3210 F01
3210f
9
Page 10
LTC3210
OPERATIO
U
Soft-Start
Initially, when the part is in shutdown, a weak switch
connects V
to CPO. This allows V
BAT
to slowly charge
BAT
the CPO output capacitor to prevent large charging
currents.
The LTC3210 also employs a soft-start feature on its
charge pump to prevent excessive inrush current and
supply droop when switching into the step-up modes. The
current available to the CPO pin is increased linearly over
a typical period of 150µs. Soft-start occurs at the start of
both 1.5x and 2x mode changes.
Charge Pump Strength and Regulation
Regulation is achieved by sensing the voltage at the CPO
pin and modulating the charge pump strength based
on the error signal. The CPO regulation voltages are set
internally, and are dependent on the charge pump modes
as shown in Table 1.
Table 1. Charge Pump Output Regulation Voltages
Charge Pump Mode Regulated V
1.5x4.55V
2x5.05V
CPO
However, for a given ROL, the amount of current available
will be directly proportional to the advantage voltage of
1.5V
– CPO for 1.5x mode and 2V
BAT
– CPO for 2x
BAT
mode. Consider the example of driving white LEDs from
a 3.1V supply. If the LED forward voltage is 3.8V and the
current sources require 100mV, the advantage voltage for
1.5x mode is 3.1V • 1.5 – 3.8V – 0.1V or 750mV. Notice
that if the input voltage is raised to 3.2V, the advantage
voltage jumps to 900mV— a 20% improvement in available strength.
From Figure 2, for 1.5x mode the available current is given by:
I
OUT
VV
(.–)15
=
BATCPO
R
OL
For 2x mode, the available current is given by:
I
OUT
VV
(–)2
BATCPO
=
R
OL
Notice that the advantage voltage in this case is 3.1V • 2
– 3.8V – 0.1V = 2.3V. R
is higher in 2x mode but a sig-
OL
nifi cant overall increase in available current is achieved.
Typical values of R
as a function of temperature are
OL
shown in Figure 3 and Figure 4.
When the LTC3210 operates in either 1.5x mode or 2x mode,
the charge pump can be modeled as a Thevenin-equivalent
circuit to determine the amount of current available from
the effective input voltage and effective open-loop output
resistance, R
is dependent on a number of factors including the
R
OL
switching term, 1/(2f
(Figure 2).
OL
OSC
• C
), internal switch resis-
FLY
tances and the nonoverlap period of the switching circuit.
R
OL
+
1.5V
BAT
–
Figure 2. Charge Pump Thevenin-Equivalent Circuit
Shutdown Current
In shutdown mode all the circuitry is turned off and the
LTC3210 draws a very low current from the V
Furthermore, CPO is weakly connected to V
supply.
BAT
BAT
. The
LTC3210 enters shutdown mode when both the ENM
and ENC pins are brought low for 150µs (typ). ENM and
ENC have 250k internal pull down resistors to defi ne
the shutdown state when the drivers are in a high impedance state.
+
BAT
CPO
–
3210f
OR 2V
10
Page 11
OPERATIO
LTC3210
U
Thermal Protection
The LTC3210 has built-in overtemperature protection.
At internal die temperatures of around 150°C thermal
shutdown will occur. This will disable all of the current
sources and charge pump until the die has cooled by
about 15°C. This thermal cycling will continue until the
fault has been corrected.
Mode Switching
The LTC3210 will automatically switch from 1x mode
to 1.5x mode and subsequently to 2x mode whenever
3.8
V
= 3V
BAT
= 4.2V
V
CPO
3.6
C2 = C3 = C4 = 2.2µF
3.4
3.2
3.0
a dropout condition is detected at an LED pin. Dropout
occurs when a current source voltage becomes too low
for the programmed current to be supplied. The time
from drop-out detection to mode switching is typically
0.4ms.
The part is reset back to 1x mode when the part is shut
down (ENM = ENC = Low) or on the falling edge of ENC.
An internal comparator will not allow the main switches to
connect V
and CPO in 1x mode until the voltage at the
BAT
CPO pin has decayed to less than or equal to the voltage
at the V
BAT
pin.
4.6
V
BAT
V
CPO
4.4
C2 = C3 = C4 = 2.2µF
4.2
4.0
3.8
= 3V
= 4.8V
2.8
2.6
OPEN LOOP OUTPUT RESISTANCE (Ω)
2.4
–15103585
–40
TEMPERATURE (˚C)
60
3210 F03
3.6
3.4
OPEN LOOP OUTPUT RESISTANCE (Ω)
3.2
–15103585
–40
TEMPERATURE (˚C)
60
3210 F04
Figure 3. Typical 1.5x ROL vs TemperatureFigure 4. Typical 2x ROL vs Temperature
3210f
11
Page 12
LTC3210
U
WUU
APPLICATIOS IFORATIO
V
, CPO Capacitor Selection
BAT
The style and value of the capacitors used with the LTC3210
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
used for both CV
BAT
and C
capacitors are not recommended due to high ESR.
The value of C
directly controls the amount of output
CPO
ripple for a given load current. Increasing the size of C
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
V
Where f
()
RIPPLE P P
−
OSC
is the LTC3210 oscillator frequency or typically
800kHz and C
=
CPO
I
OUT
fC
3
(•)
SCCPO
0
is the output storage capacitor.
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
. Tantalum and aluminum
CPO
(3)
CPO
In addition, excessive output capacitor ESR >100mΩ will
tend to degrade the loop stability. Multilayer ceramic chip
capacitors typically have exceptional ESR performance and
when combined with a tight board layout will result in very
good stability. As the value of C
output ripple, the value of CV
ripple present at the input pin(V
controls the amount of
CPO
controls the amount of
BAT
). The LTC3210’s input
BAT
current will be relatively constant while the charge pump is
either in the input charging phase or the output charging
phase but will drop to zero during the clock nonoverlap
times. Since the nonoverlap time is small (~35ns), these
missing “notches” will result in only a small perturbation
on the input power supply line. Note that a higher ESR
capacitor such as tantalum will have higher input noise
due to the higher ESR. Therefore, ceramic capacitors are
recommended for low ESR. Input noise can be further
reduced by powering the LTC3210 through a very small
series inductor as shown in Figure 5. A 10nH inductor
will reject the fast current notches, thereby presenting a
nearly constant current load to the input power supply.
For economy, the 10nH inductor can be fabricated on the
PC board with about 1cm (0.4") of PC board trace.
Both style and value of the output capacitor can signifi cantly affect the stability of the LTC3210. As shown in the
Block Diagram, the LTC3210 uses a control loop to adjust
the strength of the charge pump to match the required
output current. The error signal of the loop is stored
directly on the output capacitor. The output capacitor
also serves as the dominant pole for the control loop. To
prevent ringing or instability, it is important for the output
capacitor to maintain at least 1.3µF of capacitance over
all conditions.
V
BAT
LTC3210
GND
3210 F05
Figure 5. 10nH Inductor Used for Input Noise
Reduction (Approximately 1cm of Board Trace)
12
3210f
Page 13
LTC3210
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APPLICATIOS IFORATIO
Flying Capacitor Selection
Warning: Polarized capacitors such as tantalum or
aluminum should never be used for the fl ying capacitors since their voltage can reverse upon start-up of the
LTC3210. Ceramic capacitors should always be used for
the fl ying capacitors.
The fl ying capacitors control the strength of the charge
pump. In order to achieve the rated output current it is
necessary to have at least 1.6µF of capacitance for each
of the fl ying capacitors. Capacitors of different materials
lose their capacitance with higher temperature and voltage
at different rates. For example, a ceramic capacitor made
of X7R material will retain most of its capacitance from
–40°C to 85°C whereas a Z5U or Y5V style capacitor will
lose considerable capacitance over that range. Capacitors
may also have a very poor voltage coeffi cient causing them
to lose 60% or more of their capacitance when the rated
voltage is applied. Therefore, when comparing different
capacitors, it is often more appropriate to compare the
amount of achievable capacitance for a given case size
rather than comparing the specifi ed capacitance value. For
example, over rated voltage and temperature conditions,
a 1µF, 10V, Y5V ceramic capacitor in a 0603 case may not
provide any more capacitance than a 0.22µF, 10V, X7R
available in the same case. The capacitor manufacturer’s
data sheet should be consulted to determine what value
of capacitor is needed to ensure minimum capacitances
at all temperatures and voltages.
Table 2 shows a list of ceramic capacitor manufacturers
and how to contact them:
Table 2. Recommended Capacitor Vendors
AVXwww.avxcorp.com
Kemetwww.kemet.com
Muratawww.murata.com
Taiyo Yudenwww.t-yuden.com
Vishaywww.vishay.com
Layout Considerations and Noise
Due to the high switching frequency and the transient
currents produced by the LTC3210, careful board layout
is necessary. A true ground plane and short connections
to all capacitors will improve performance and ensure
proper regulation under all conditions.
The fl ying capacitor pins C1P, C2P, C1M and C2M will
have high edge rate waveforms. The large dv/dt on these
pins can couple energy capacitively to adjacent PCB runs.
Magnetic fi elds can also be generated if the fl ying capacitors
are not close to the LTC3210 (i.e., the loop area is large).
To decouple capacitive energy transfer, a Faraday shield
may be used. This is a grounded PCB trace between the
sensitive node and the LTC3210 pins. For a high quality
AC ground, it should be returned to a solid ground plane
that extends all the way to the LTC3210.
The following guidelines should be followed when designing a PCB layout for the LTC3210:
• The exposed pad should be soldered to a large copper
plane that is connected to a solid, low impedance ground
plane using plated through-hole vias for proper heat
sinking and noise protection.
• Input and output capacitors must be placed close to
the part.
• The fl ying capacitors must be placed close to the part.
The traces from the pins to the capacitor pad should
be as wide as possible.
, CPO traces must be wide to minimize inductance
• V
BAT
and handle high currents.
• LED pads must be large and connected to other layers
of metal to ensure proper heat sinking.
• RM and RC pins are sensitive to noise and capacitance.
The resistors should be placed near the part with minimum line width.
3210f
13
Page 14
LTC3210
U
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APPLICATIOS IFORATIO
Power Effi ciency
To calculate the power effi ciency (η) of a white LED
driver chip, the LED power should be compared to the
input power. The difference between these two numbers
represents lost power whether it is in the charge pump
or the current sources. Stated mathematically, the power
effi ciency is given by:
The effi ciency of the LTC3210 depends upon the mode in
which it is operating. Recall that the LTC3210 operates
as a pass switch, connecting V
is detected at the LED pin. This feature provides the optimum effi ciency available for a given input voltage and
LED forward voltage. When it is operating as a switch, the
effi ciency is approximated by:
since the input current will be very close to the sum of
the LED currents.
At moderate to high output power, the quiescent current
of the LTC3210 is negligible and the expression above is
valid.
Once dropout is detected at any LED pin, the LTC3210
enables the charge pump in 1.5x mode.
P
LED
η=
P
IN
P
LED
η===
P
(•)
VI
LEDLED
(•)
VIVV
IN
BATBAT
to CPO, until dropout
BAT
LED
BAT
In 1.5x boost mode, the effi ciency is similar to that of a
linear regulator with an effective input voltage of 1.5 times
the actual input voltage. This is because the input current
for a 1.5x charge pump is approximately 1.5 times the
load current. In an ideal 1.5x charge pump, the power
effi ciency would be given by:
P
η
IDEAL
LED
===
P
IN
VI
(•)
LEDLED
VIVV
(•(.)•)(.•)1515
BATLED
LED
BAT
Similarly, in 2x boost mode, the effi ciency is similar to
that of a linear regulator with an effective input voltage
of 2 times the actual input voltage. In an ideal 2x charge
pump, the power effi ciency would be given by:
η
IDEAL
P
LED
===
P
IN
VI
(•)
LEDLED
VIVV
(•()•)(•)22
BATLED
LED
BAT
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the LTC3210.
If the junction temperature increases above approximately
150°C the thermal shut down circuitry will automatically
deactivate the output current sources and charge pump.
To reduce maximum junction temperature, a good thermal
connection to the PC board is recommended. Connecting
the Exposed Pad to a ground plane and maintaining a solid
ground plane under the device will reduce the thermal
resistance of the package and PC board considerably.
14
3210f
Page 15
PACKAGE DESCRIPTIO
LTC3210
U
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 ±0.05
3.50 ± 0.05
2.10 ± 0.05
1.45 ± 0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ± 0.10
(4 SIDES)
PIN 1
TOP MARK
(NOTE 6)
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.75 ± 0.05
1.45 ± 0.10
(4-SIDES)
0.200 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
15 16
0.50 BSC
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
0.40 ± 0.10
1
2
(UD16) QFN 0904
0.25 ± 0.05
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.