Datasheet LT4363 Datasheet (Linear Technology)

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Page 1

100ms/DIV

20V/DIV

High Voltage Surge

Stopper with Current Limit

FeaTures DescripTion

Withstands Surges Over 100V with VCC Clamp

Wide Operating Voltage Range: 4V to 80V

Adjustable Output Clamp Voltage

Fast Overcurrent Limit: Less Than 5µs

Reverse Input Protection to –60V

Adjustable UV/OV Comparator Thresholds

Low 7µA Shutdown Current

Shutdown Pin Withstands –60V to 100V

Adjustable Fault Timer

Controls N-Channel MOSFET

Less Than 1% Retry Duty Cycle During Faults,

LT4363-2

Available in 12-Pin (4mm × 3mm) DFN, 12-Pin

MSOP and 16-Pin SO Packages

The LT®4363 surge stopper protects loads from high voltage transients. It regulates the output during an overvoltage event, such as load dump in vehicles, by controlling the gate of an external N-channel MOSFET. The output is limited to a safe value allowing the loads to continue functioning. The LT4363 also monitors the voltage drop between the SNS and OUT pins to protect against overcurrent faults. An internal amplifier limits the voltage across the current sense resistor to 50mV. In either fault condition, a timer is started inversely proportional to MOSFET stress. Before the timer expires, the F LT pin pulls low to warn of an impend ing power down. If the condition persists, the MOSFET is turned off. The L the L

T4363-2 restarts after a cool down period.

T4363-1 remains off until reset whereas

LT4363

Two precision comparators can monitor the input supply

applicaTions

Automotive/Avionic/Industrial Surge Protection

Hot Swap™/Live Insertion

High Side Switch for Battery Powered Systems

Intrinsic Safety Applications

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and

, ThinSOT and Hot Swap are trademarks of Linear Technology Corporation. All other

No R

SENSE

trademarks are the property of their respective owners.

for overvoltage (OV) and undervoltage (UV) conditions. When the potential is below the UV threshold, the external MOSFET is kept off. If the input supply voltage is above the OV threshold, the MOSFET is not allowed to turn back on. Back-to-back MOSFETs can be used in lieu of a Schottky diode for reverse input protection, reducing voltage drop and power loss. A shutdown pin reduces the quiescent current to less than 7µA during shutdown.

Typical applicaTion

4A, 12V Overvoltage Output Regulator with 150V Surge Protection Overvoltage Protector Regulates

Output at 27V During Transient

80V INPUT SURGE

12V

27V ADJUSTABLE CLAMP

12V

0.1µF

SMAJ58A

LT4363-2

10mΩ

OUTGATE SNS

ENOUT

4363 TA01

0.1µF

FLT

OUTPUT

DC/DC

GND

CLAMP AT 16V

OUT

22µF

57.6k

4.99k

CONVERTER

SHDN

127k

49.9k

FDB33N25

10Ω

SHDN

OV FAULT

GND TMR

TMR

LOAD

= 6.8µF = 500mA

4363 TA01b

For more information www.linear.com/LT4363

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Page 2

LT4363

ENOUT

SHDN

TOP VIEW

SHDN

ENOUT

TOP VIEW

12-LEAD PLASTIC MSOP

TOP VIEW

16-LEAD PLASTIC SO

SHDN

ENOUT

SHDN

TOP VIEW

12-LEAD (4mm × 3mm) PLASTIC DFN

SHDN

ENOUT

TOP VIEW

12-LEAD PLASTIC MSOP

TOP VIEW

16-LEAD PLASTIC SO

SHDN

ENOUT

absoluTe MaxiMuM raTings

(Notes 1, 2)

VCC, SHDN, UV, OV ................................... –60V to 100V

SNS, OUT ................................................. –0.3V to 100V

SNS to OUT ................................................. –30V to 30V

GATE (Note 3) ..................................–0.3V to SNS + 10V

ENOUT, FLT .............................................. –0.3V to 100V

FB ............................................................. –0.3V to 5.5V

TMR ......................................................................0.5mA

Operating Temperature Range

LT4363C LT4363I

.................................................. 0°C to 70°C

................................................–40°C to 85°C

LT4363H ............................................ –40°C to 125°C

LT4363MP ......................................... –55°C to 125°C

Storage Temperature Range

.................................................. –65°C to 125°C

DE12 MS, SO

.............................................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)

MS, SO

.............................................................300°C

pin conFiguraTion

LT4363-1 LT4363-1 LT4363-1

OUT

SNS

GND

GATE

12-LEAD (4mm × 3mm) PLASTIC DFN

EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB

LT4363-2 LT4363-2 LT4363-2

DE PACKAGE

= 125°C, θJA = 43°C/W

JMAX

OPTIONAL

TMR

FLT

GND

OUT SNS

GATE

2 3 4 5

MS PACKAGE

= 125°C, θJA = 135°C/W

JMAX

TMR

12 11

FLT

GND

OUT

SNS

GATE

S PACKAGE

= 125°C, θJA = 80°C/W

JMAX

TMR

FLT

GND

OUT

SNS

GATE

EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB

JMAX

GND

DE PACKAGE

= 125°C, θJA = 43°C/W

OPTIONAL

TMR

FLT

GND

OUT SNS

GATE

2 3 4 5

MS PACKAGE

= 125°C, θJA = 135°C/W

JMAX

TMR

12 11 10

FLT

GND

OUT

SNS

GATE

S PACKAGE

= 125°C, θJA = 80°C/W

JMAX

TMR

FLT

GND

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For more information www.linear.com/LT4363

Page 3

LT4363

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT4363CDE-1#PBF LT4363CDE-1#TRPBF 43631

LT4363IDE-1#PBF LT4363IDE-1#TRPBF 43631

LT4363HDE-1#PBF LT4363HDE-1#TRPBF 43631

LT4363CDE-2#PBF LT4363CDE-2#TRPBF 43632

LT4363IDE-2#PBF LT4363IDE-2#TRPBF 43632

LT4363HDE-2#PBF LT4363HDE-2#TRPBF 43632

LT4363CMS-1#PBF LT4363CMS-1#TRPBF 43631 12-Lead Plastic MSOP 0°C to 70°C

LT4363HMS-1#PBF LT4363HMS-1#TRPBF 43631 12-Lead Plastic MSOP –40°C to 125°C

LT4363IMS-1#PBF LT4363IMS-1#TRPBF 43631 12-Lead Plastic MSOP –40°C to 85°C

LT4363MPMS-1#PBF LT4363MPMS-1#TRPBF 43631 12-Lead Plastic MSOP –55°C to 125°C

LT4363CMS-2#PBF LT4363CMS-2#TRPBF 43632 12-Lead Plastic MSOP 0°C to 70°C

LT4363HMS-2#PBF LT4363HMS-2#TRPBF 43632 12-Lead Plastic MSOP –40°C to 125°C

LT4363IMS-2#PBF LT4363IMS-2#TRPBF 43632 12-Lead Plastic MSOP –40°C to 85°C

LT4363MPMS-2#PBF LT4363MPMS-2#TRPBF 43632 12-Lead Plastic MSOP –55°C to 125°C

LT4363CS-1#PBF LT4363CS-1#TRPBF LT4363S-1 16-Lead Plastic SO 0°C to 70°C

LT4363HS-1#PBF LT4363HS-1#TRPBF LT4363S-1 16-Lead Plastic SO –40°C to 125°C

LT4363IS-1#PBF LT4363IS-1#TRPBF LT4363S-1 16-Lead Plastic SO –40°C to 85°C

LT4363MPS-1#PBF LT4363MPS-1#TRPBF LT4363S-1 16-Lead Plastic SO –55°C to 125°C

LT4363CS-2#PBF LT4363CS-2#TRPBF LT4363S-2 16-Lead Plastic SO 0°C to 70°C

LT4363HS-2#PBF LT4363HS-2#TRPBF LT4363S-2 16-Lead Plastic SO –40°C to 125°C

LT4363IS-2#PBF LT4363IS-2#TRPBF LT4363S-2 16-Lead Plastic SO –40°C to 85°C

LT4363MPS-2#PBF LT4363MPS-2#TRPBF LT4363S-2 16-Lead Plastic SO –55°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

http://www

.linear.com/leadfree/

12-Lead (4mm × 3mm) Plastic DFN

0°C to 70°C

–40°C to 85°C

–40°C to 125°C

0°C to 70°C

–40°C to 85°C

–40°C to 125°C

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

ΔV

GATE

GATE(UP)

GATE(DN)

Operating Voltage Range LT4363 VCC Supply Current SHDN Open, OUT = SNS = 12V

Reverse Input Current VCC = –60V, SHDN, UV, OV Open

GATE Drive

GATE Pull-Up Current VCC = GATE = OUT = 12V

GATE Pull-Down Current Overvoltage: FB = 1.5V, GATE = 12V, OUT = 5V

FB Servo Voltage GATE = 12V; OUT = 8V

SHDN = 0V, OUT = SNS = 0V

= SHDN = UV = OV = –60V

ΔV

= (GATE – SNS);VCC = OUT

GATE

= 4V; I

9V ≤ V

= GATE = OUT = 48V

Overcurrent: ΔV Shutdown/UV Mode: UV = 1V, GATE = 10V

For more information www.linear.com/LT4363

≤ 80V; I

GATE

= –0.5µA, 0µA

= –1µA, 0µA

GATE

= 150mV, V

SNS

SHDN = 0V, GATE = 10V

GATE

= 10V, OUT = 0V

4 80 V

l l

4.5

–15

–20

200

1.25 1.275 1.3 V

0.7 71.2

–0.5 –3–4

–30 –40

150

100 1000 1000

–10

–45 –65

20 40

µA µA

mA mA

µA µA

mA mA

µA µA

4363fb

V V

Page 4

LT4363

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V, unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

ΔV

SNS

FB Input Current VFB = 1.275V

Current Limit Sense Voltage

= (SNS – OUT)

ΔV

SNS

Current Limit Foldback V

= 12V, OUT = 3V to 12V

= 48V, OUT = 3V to 48V

= 12V, OUT = 0V to 1V

= 48V, OUT = 0V to 1V

SNS Input Current OUT = SNS = 3V to 80V

OUT = SNS = 0V

TMR

TMR Pull-up Current, Overvoltage

TMR = 1V, FB = 1.5V, ΔV TMR = 1V, FB = 1.5V, ΔV

TMR(F)

TMR(G)

TMR(R)

ΔV

TMR

TMR(H)

UV(HYST)

OV(HYST)

TMR Pull-up Current, OV Warning

TMR Pull-up Current, Overcurrent

TMR = 1.325V

TMR = 1V, ΔV TMR = 1V, ΔV

TMR Pull-up Current, Cool Down

TMR Pin Pull-down Current, Cool Down

TMR Fault Threshold TMR Gate Off Threshold TMR Restart Threshold

Early Warning Window V

TMR = 3V, FB = 1.5V, ΔV

= 3V, FB = 1.5V, ΔV

TMR

TMR Rising TMR Rising TMR Falling, LT4363-2

TMR(G) – VTMR(F)

TMR Cool Down High Threshold VCC = 7V to 80V, TMR Rising

UV Input Threshold UV Rising

UV Input Hysteresis 12 mV

OV Input Threshold OV Rising

OV Input Hysteresis 7.5 mV

UV, OV Input Current UV = 1.275V

, FB = 1.5V, ΔV

SNS SNS

UV = –60V

LEAK

ΔV

OUT(TH)

ΔV

OUT(RST)

OUT

SHDN

SHDN(Z)

SHDN

RESET

D Retry Duty Cycle; Overvoltage V

OFF(UV)

OFF(OV)

OFF(OC)

F LT , ENOUT Leakage Current F LT , ENOUT = 80V F LT , ENOUT Output Low I

OUT High Threshold

SINK

ΔV

OUT

= 0.1mA = 2mA

= VCC – V

OUT

OUT Reset Threshold ENOUT From High to Low

OUT Input Current VCC = OUT = 12V, SHDN Open

= OUT = 12V, SHDN = 0V

SHDN Threshold VCC = 4V to 80V

SHDN Open Voltage VCC = 4V to 80V SHDN Current SHDN = 0.4V SHDN Reset Time SHDN ≤ 0.4V; LT4363-1

= 80V, OUT = 16V, FB = 1.5V; LT4363-2

Retry Duty Cycle; Output Short V

= 12V, OUT = 0V, ∆V

Undervoltage Turn Off Propagation Delay UV Steps from 1.5V to 1V

Overvoltage Turn Off Propagation Delay FB Steps from 0V to 1.5V; OUT = 0V

Overcurrent Turn Off Propagation Delay ∆V

Steps from 0V to 150mV; OUT = 0V

SNS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

= 0.5V

= 75V

= 0.5V

= 100mV, ΔVDS = 0.5V = 100mV, ΔVDS = 80V

= 0V, ΔVDS = 0V

SNS

= 0V, ΔVDS = 0V

SNS

, ENOUT From Low to High

= 100mV; LT4363-2

SNS

Note 2: All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified.

Note 3: An internal clamp limits the GATE pin to a minimum of 10V above the OUT pin. Driving this pin to voltages beyond the clamp may damage the device.

l l

–1.7

–42

l l

–190

1.235

1.335

0.47

1.24 1.275 1.31 V

l l

0.25 0.5 0.75 V

l l

±0.2 ±1 µA

45 48

15 16

50 53

25 27

–10

–4

–50

–3 –5 –7 µA

–5

–9

–250

–

–1 –2.3 –3.5 µA

1 2 4 µA

1.275

1.375

0.5

1.31

1.41

0.53

80 100 120 mV

3.5 4.3 5.4 V

±0.2 –1±1

±0.5 ±2.5 µA

300 2800

1.8 2.7 3.6 V

0.25

0.6

1.4 1.7

0.4

–1 –4 –8 µA

1 2 %

0.76 1 %

2 5 µs

0.25 1 µs

1 2.5 µs

55 58

35 36

mV mV

–15

–6

–58

–13

310

–2

0.5 1

mA mA

2.1

2.2 V

100 µs

4363fb

µA µA

V V V

µA

V V

For more information www.linear.com/LT4363

Page 5

LT4363

(µA)

1000

4363 G01

(µA)

4363 G03

(µA)

4363 G02

125

(µA)

3.0

4363 G04

125

(mA)

200

4363 G07

125

(mA)

200

4363 G08

Specifications are at VCC = 12V, TA = 25°C, unless

Typical perForMance characTerisTics

otherwise noted.

Supply Current During Shutdown Supply Current vs Supply Voltage (ICC vs VCC)

800

600

400

200

VCC (V)

70605020 4010 30

vs Temperature

CC(SHDN)

OUT = SNS = 0V

–50

vs Temperature)

0 50–25 25 100

TEMPERATURE (°C)

SHDN Current vs Temperature GATE Pull-Up Current vs V

–50

Supply Current During Shutdown vs Supply Voltage (I

CC(SHDN)

OUT = SNS = 0V

vs VCC)

VCC (V)

GATE Pull-Up Current vs Temperature

–35

70605020 4010 30

2.5

2.0

1.5

CC(SHDN)

1.0

0.5

–50

0 50–25 25 100

TEMPERATURE (°C)

GATE Pull-Down Current vs Temperature: Overcurrent

175

150

125

100

GATE(DN,OC)

∆V

= 150mV

SNS

OUT = 0V GATE = 10V

–50 0 50–25 25 100

TEMPERATURE (°C)

SHDN = 0V

SHDN = 0.4V

–40

–30

(µA)

–20

GATE(UP)

–10

VCC (V)

8070605020 4010 30

4363 G05

GATE Pull-Down Current vs

Temperature: Overvoltage

175

150

125

100

GATE(DN,OV)

SNS = OUT = 5V

GATE = 12V FB = 1.5V

–50 0 50–25 25 100

TEMPERATURE (°C)

–30

(µA)

–25

GATE(UP)

–20

–15

–50 0 50–25 25 100

TEMPERATURE (°C)

Gate Drive Voltage vs Gate Pull-Down Current ΔV

(V)

GATE

∆V

GATE

VCC = SNS = OUT

–6

(µA)

75 125

vs I

GATE

4363 G06

–10–8–4–2

4363 G09

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For more information www.linear.com/LT4363

Page 6

LT4363

∆V

(V)

4363 G10

125

∆V

(V)

4363 G11

(V)

4363 G12

(µA)

2.4

4363 G16

125

(V)

4363 G18

3.0

4363 G17

Specifications are at V

Typical perForMance characTerisTics

otherwise noted.

Gate Drive vs Temperature

vs Temperature)

(ΔV

GATE

VCC = SNS = OUT

–50

0 50–25 25 100

TEMPERATURE (°C)

GATE

Overvoltage TMR Current vs

–50

–40

(VCC – V

TMR = 1V

OUT

)

= 0µA

GATE

= –1µA

Gate Drive vs Supply Voltage

(ΔV

vs VCC)

GATE

= 0µA

GATE

= 1µA

VCC (V)

Overcurrent TMR Current vs

–260

–220

(VCC – V

TMR = 1V

OUT

)

VCC = SNS = OUT

7060208 164 12

TMR High Threshold vs Supply Voltage

TMR

Warning Period TMR Current vs V

–7

∆VDS = 0.5V

–6

= 12V, TA = 25°C, unless

VCC (V)

70605020 4010 30

–30

(µA)

–20

TMR(U P,O V)

–10

VCC – V

OUT

(V)

8070605020 4010 30

4363 G13

TMR Pull-Down Current vs Temperature

TMR = 1V

2.0

1.6

1.2

TMR(DN)

0.8

0.4

–160

(µA)

–120

TMR(U P,O C)

–80

–40

VCC – V

OUT

(V)

8070605020 4010 30

4363 G14

(µA)

TMR(OV, EW)

–5

–4

–3

–2

VCC (V)

TMR Pull-Up Current (Cool Down)

vs Temperature Output Low Voltage vs Current

–3.0

–2.5

–2.0

(µA)

–1.5

–1.0

TMR(UP,COOL)

–0.5

TMR = 3V

OUT = SNS = 3V

8070605020 4010 30

4363 G15

–50

0 50–25 25 100

TEMPERATURE (°C)

–50

0 50–25 25 100

TEMPERATURE (°C)

For more information www.linear.com/LT4363

12575

SINK

(mA)

2.52.01.51.00.5

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LT4363

125

(ns)

350

4363 G19

125

(µs)

1.4

4363 G20

(mA)

–7

4363 G21

–80

Specifications are at V

Typical perForMance characTerisTics

otherwise noted.

Overvoltage Turn-Off Time vs Temperature

300

250

200

150

OFF(OV)

100

–50 0 50–25 25 100

TEMPERATURE (°C)

Reverse Current vs Reverse Voltage

VCC = SHDN

–6

–5

–4

–3

GND

–2

–1

Overcurrent Turn-Off Time vs Temperature

1.2

1.0

0.8

0.6

OFF(OC)

0.4

0.2

–50 0 50–25 25 100

TEMPERATURE (°C)

OUT = 0V

∆V

SNS

OUT = 3V

∆V

SNS

Current Limit Foldback (ΔV

vs OUT)

SNS

(mV)

SNS

∆V

= 150mV

= 300mV

= 12V, TA = 25°C, unless

VCC (V)

–70–60–50–20 –40–10 –30

For more information www.linear.com/LT4363

OUT (V)

5431 2

4363 G22

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Page 8

LT4363

pin FuncTions

ENOUT: Open Collector Enable Output. The ENOUT pin goes high impedance when the voltage at the OUT pin is within

0.5V of V MOSFET is fully on. The state of the pin is latched until the OUT pin voltage drops below 2V, resetting the latch. The internal NPN is capable of sinking up to 2mA of current.

Exposed Pad (DFN Package Only): Exposed pad may be left open or connected to device ground (GND).

FB: Voltage Regulator Feedback Input. Connect this pin to the center tap of the resistive divider connected between the OUT pin and ground. During an overvoltage condition, the GATE pin is controlled to maintain a 1.275V threshold at the FB pin. Connect to GND to disable the OV clamp.

F LT : Open Collector Fault Output. This pin pulls low after the voltage at the TMR pin has reached the fault threshold of 1.275V. It indicates the pass transistor is about to turn off because either the supply voltage has stayed at an elevated level for an extended period of time (voltage fault) or the device is in an overcurrent condition (current fault). The internal NPN is capable of sinking up to 2mA of current.

GATE: N-Channel MOSFET Gate Drive Output. The GATE pin is pulled up by an internal charge pump current source to 13V above the OUT pin. A 14V protection clamp limits this voltage during faults. Both voltage and current amplifiers control the GATE pin to regulate the output voltage and limit the current through the MOSFET.

GND: Device Ground.

OUT: Output Voltage Sense Input. This pin senses the

voltage at the source of the external N-channel MOSFET. The voltage difference between V timer current. When this difference drops below 0.5V, the EN pin goes high impedance.

OV (LT4363-2): Overvoltage Comparator Input. When OV is above its threshold of 1.275V, the fault retry function is inhibited even when the TMR pin voltage has reached its retry threshold. As soon as the voltage at OV pin falls below its lower threshold the GATE pin is allowed to turn back on. Connect to GND if unused.

SHDN: Shutdown Control Input. The LT4363 can be shutdown to a low current mode by pulling the SHDN pin

and 3V above GND, indicating the external

and OUT sets the fault

below the threshold of 0.4V. Pull this pin above 2.1V or disconnect it to allow the internal current source to turn the part back on. The leakage current to ground at the pin should be limited to no more than 1µA if no external pull up is used to turn the part on. The SHDN pin can be pulled up to 100V or below GND by 60V without damage.

SNS: Current Sense Input. Connect this pin to the input of the current sense resistor. The current limit circuit controls the GATE pin to limit the sense voltage between SNS and OUT pins to 50mV. This is reduced to 25mV in a severe fault when OUT is below 2V. When in current limit mode, a current source charges up the TMR pin. The voltage difference with the OUT pin must be limited to less than 30V. Connect to OUT pin if unused.

TMR: Fault Timer Input. Connect a capacitor between this pin and ground to set the times for early fault warning, fault turn-off, and cool down periods. The current charg ing up this pin during fault conditions depends on the voltage difference between the V TMR reaches 1.275V, the F LT pin pulls low to indicate the detection of a fault condition. If the condition persists, the pass transistor turns off when TMR reaches the threshold of 1.375V. A 2µA current source then continues to pull the TMR up. When TMR reaches 4.3V, the 2µA current reverses direction and starts to pull the TMR pin low. When TMR reaches the retry threshold of 0.5V, the GATE pin pulls high turning back on the pass transistor for the LT4363-2 version. The GATE pin latches low after fault time out for the LT4363-1. A minimum of 10nF capacitor is needed to compensate the loop.

UV: Undervoltage Comparator Input. When UV falls below its threshold of 1.275V, the GATE is pulled down with a 1mA current. When UV rises above 1.275V plus the hys teresis, the pull down current disappears and the GATE pin is pulled up by the internal charge pump. If unused, connect to V

: Positive Supply Voltage Input. The positive supply

input ranges from 4V to 80V for normal operation. It can also be pulled below ground by up to 60V during a reverse battery condition, without damaging the part. Shutting down the LT4363 by pulling the SHDN pin to ground will reduce the supply current to 7µA.

and OUT pins. When

4363fb

For more information www.linear.com/LT4363

Page 9

block DiagraM

CHARGE

PUMP

GATE

14V

50mV/

25mV

LT4363

SNSV

OUT

–

1.275V

SHDN

1.275V

OV (LT4363-2 ONLY)

FLT

–

SHDN

ENOUT

CONTROL

LOGIC

1.375V

TMR

1.275V

RETRY

GATEOFF FLT

–

0.5V 2µA

4.3V

–

TMR GND

For more information www.linear.com/LT4363

4363 BD

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Page 10

LT4363

operaTion

Some power systems must cope with high voltage surges of short duration such as those in vehicles. Load circuitry must be protected from these transients, yet high availability systems must continue operating during these events.

The LT4363 is an overvoltage protection regulator that drives an external N-channel MOSFET as the pass transis tor. It operates from a wide supply voltage range of 4V to 80V. It can also be pulled below ground potential by up to 60V without damage. The low power supply require ment of 4V allows it to operate even during cold cranking conditions in automotive applications. The internal charge pump turns on the N-channel MOSFET to supply current to the loads with very little power loss. Two MOSFETs can be connected back to back to replace an inline Schottky diode for reverse input protection. This improves the ef ficiency and increases the available supply voltage level to the load circuitry during cold crank.

Normally, the pass transistor is fully on, powering the loads with very little voltage drop. When the supply voltage surges too high, the voltage amplifier (VA) controls the gate of the MOSFET and regulates the voltage at the OUT pin to a level that is set by the external resistive divider from the OUT pin to ground and the internal 1.275V reference. A current source starts charging up the capacitor connected at the TMR pin to ground. If the TMR voltage reaches 1.275V, the F LT pin pulls low to indicate impending turn-off due to the overvoltage condition. The pass transistor stays on until TMR reaches 1.375V, at which point the GATE pin pulls low turning off the MOSFET.

sufficient time for TMR to discharge to 0.5V and for the MOSFET to cool before attempting to reset the part. To reset, pull the SHDN pin low for at least 100µs, then pull high with a slew rate of at least 10V/ms.

The fault timer allows the load to continue functioning during short transient events while protecting the MOSFET from being damaged by a long period of supply overvolt age, such as a load dump in vehicles. The timer period varies with the voltage across the MOSFET age

corresponds to a shorter fault timer period, helping

to keep the MOSFET within its safe operating area (SOA).

T4363 senses an overcurrent condition by monitor

The ing the voltage across an optional sense resistor placed between the SNS and OUT pins. An active current limit circuit (IA) controls the GATE pin to limit the sense volt age to 50mV, if the OUT pin potential is above 2V. In the case of a severe output short that brings OUT below 2V, the servo sense voltage is reduced to 25mV to reduce the stress on the pass transistor. During current limit, the current charging the TMR capacitor is about 5 times the current during an overvoltage event. The F LT pin pulls low when the TMR voltage reaches 1.275V and the MOSFET is turned off when it reaches 1.375V. The MOSFET turns back on and the F LT pin returns to a high impedance state after TMR has reached the 0.5V threshold for the LT4363-2 version. For the latch-off version, LT4363-1, both the GATE and F LT pins remain low even after TMR has reached the 0.5V threshold. Reset the part in the same way as in overvoltage time-out case.

. A higher volt-

A current continues to pull the TMR pin up until it reaches about 4.3V, at which point the current reverses direction and pulls the TMR pin down. For the LT4363-2 version, when the voltage at the TMR pin reaches 0.5V the GATE pin begins rising, turning on the MOSFET. The F LT pin will then return to a high impedance state. For the latch-off version, LT4363-1, both the GATE and F LT pins remain low even after TMR has reached the 0.5V threshold. Allow

For more information www.linear.com/LT4363

An accurate undervoltage comparator keeps the GATE pin low until the voltage at the UV pin is above the

1.275V threshold. An overvoltage comparator prevents the MOSFET from turning on after fault time-out while the voltage at the OV pin is still above 1.275V for the LT4363-2. The SHDN pin turns off the pass transistor and all the internal circuitry, reducing the supply current to a mere 7µA.

4363fb

Page 11

applicaTions inForMaTion

6µA

100mV

LT4363

The LT4363 limits the voltage and current delivered to the load during supply transient or output overload events. The total fault timer period is set to ride through short-duration faults, while longer events cause the output to shut off and protect the MOSFET pass device from damage. The MOSFET provides a low resistance path from the input to the load during normal operation, while in fault conditions it operates as a series regulator.

Overvoltage Fault

The LT4363 limits the voltage at the output during an overvoltage at the input. An internal amplifier regulates the GATE pin to maintain 1.275V at the FB pin. During this interval the MOSFET is on and supplies current to the load. This allows uninterrupted operation during short overvoltage events. If the overvoltage condition persists, the timer causes the MOSFET to turn off.

Overcurrent Fault

The LT4363 features and adjustable current limit that pro

tects against output short circuits or excessive load current. During an overcurrent event, the GATE pin is regulated to limit the current sense voltage across the SNS and OUT pins to 50mV. In the case of a severe short at the output, where OUT is less than 2V, the current sense voltage is reduced to 25mV to further reduce power dissipation in the MOSFET. If the overcurrent condition persists, the timer causes the MOSFET to turn off.

Fault Timer Overview

Overvoltage and overcurrent conditions are limited in duration by an adjustable timer. A capacitor at the TMR pin sets the delay time before a fault condition is reported at the F LT pin as well as the overall delay before the MOSFET is turned off. The same capacitor also sets the cool down time before the MOSFET is allowed to turn back on.

When either an overvoltage or overcurrent fault condition occurs, a current source charges the TMR pin capacitor. The exact current level varies as a function of the type of fault and the V

voltage drop across the MOSFET. This

scheme takes better advantage of the MOSFET’s available Safe Operating Area (SOA) than would a fixed timer current.

The TMR pin is biased to 0.5V under normal operating

conditions. In the presence of a fault the timer first charges to 1.275V, and then enters the early warning phase of operation. At this point the F LT pin pulls low and after charging to 1.375V, the timer shuts off the MOSFET. The warning phase is indicated by F LT low and gives time for the load to perform house-keeping chores such as data storage in anticipation of impending power loss. After faulting off, the timer enters the cool down phase. At the end of the cool down period the LT4363-1 remains off until reset, while the LT4363-2 automatically restarts. For the LT4363-2 retry is inhibited if the OV pin is greater than

1.275V. This prevents motorboating in the event there is a sustained input overvoltage condition.

Fault Timer Operation in Overvoltage

In the presence of an overvoltage condition when the LT4363 regulates the output voltage, the timer charges from 0.5V to 1.275V with a current that varies as a func tion of V across V from around 4µA with V Because V at the V of Overvoltage TMR Current vs (V

(see Figure 1). VDS is inferred from the drop

and OUT. The timer current increases linearly

≤ 0.5V, to 50µA with VDS = 75V.

is measured indirectly, clamping or filtering

pin affects the timer current response. A graph

– V

) is shown in

OUT

the Typical Performance Characteristics. When TMR reaches 1.275V, the F LT pin is latched low as

an early warning of impending shutdown. The timer cur

rent is cut to a fixed value of 6µA and continues to run until TMR reaches 1.375V, producing a fixed early warning period given by:

TMR

= t

WARNING

•

When TMR reaches 1.375V, the MOSFET is turned off and allowed to cool for an extended period. The total elapsed time between the onset of output regulation and turn-off is given by:

REG

Because I



TMR

0.775V

•

TMR



TMR

is a function of VCC – V

100mV

6µA

 

, the exact time in

OUT

regulation depends upon the input waveform and the time required for the output voltage to come into regulation.

4363fb

For more information www.linear.com/LT4363

Page 12

LT4363

FLT

WARNING

1.375

1.275

TIME

4363 F01

100mV

0.875V

TMR

2.925V+ 3.8V

FLT

WARNING

1.375

1.275

TIME

4363 F02

applicaTions inForMaTion

Fault Timer Operation in Overcurrent

TMR pin behavior in overcurrent is substantially the same as in overvoltage. In the presence of an overcurrent con

dition when the LT4363 regulates the output current, the timer charges from 0.5V to 1.275V with a current that varies as a function of V

(see Figure 2). The current is

about 5 times the value produced in overvoltage, under similar conditions V

< 0.5V to 260µA with VDS = 80V. VDS is inferred from

the drop across V indirectly, clamping or filtering at the V

, increasing linearly from 8µA with

and OUT. Because VDS is measured

pin affects the

timer current response. A graph of Overcurrent TMR Current vs (V

– V

) is shown in the Typical Performance

OUT

Characteristics.

TMR(V)

0.50 t

FLT

= 15.5ms/µF

TOTAL FAULT TIMER = t

Figure 1. Overvoltage Fault Timer Current

TMR(V)

= 6µA I

TMR

= 75V

= 50µA)

TMR

WARNING

= 16.67ms/µF

= 96.9ms/µF t

FLT

+ t

= 6µA

TMR

= 10V

= 8µA)

TMR

WARNING

= 16.67ms/µF

When TMR reaches 1.275V, the F LT pin is latched low as an early warning of impending shutdown. But unlike the overvoltage case, the timer current is not reduced and instead continues unabated until TMR reaches 1.375V, producing an early warning period given by:

TMR

= t

WARNING

TMR

•

When TMR reaches 1.375V, the MOSFET is turned off and allowed to cool for an extended period. The total elapsed time between the onset of current limiting and turn-off is given by:

LIM=CTMR

Because I

•

is a function of VCC – V

TMR

, the exact time

OUT

in current limit depends upon the input waveform and the time required for the output current to come into regulation.

Cool Down Phase

Cool Down behavior is the same whether initiated by overvoltage or overcurrent. During the cool down phase, the timer continues to charge from 1.375V to 4.3V with 2µA, and then discharges back down to 0.5V with 2µA, for a total equivalent voltage swing of 6.725V. The cool down time is given by:

COOL

TMR

•

2µA

Up to this point the operation of the LT4363-1 and LT4363-2 is the same. Behavior at the end of the cool down phase and in response to the SHDN pin is entirely different.

VDS = 80V

= 260µA)

TMR

0.50

FLT

= 2.98ms/µF

TOTAL FAULT TIMER = t

WARNING

= 0.38ms/µF

= 22.14ms/µF

FLT

+ t

VDS = 10V

TMR

= 35µA)

WARNING

= 2.86ms/µF

At the end of the cool down phase the LT4363-1 remains latched off and F LT remains low. It may be restarted by pulling the SHDN pin low for at least 100µs or by cycling power. The cool down phase may be interrupted at any time by pulling SHDN low for at least 1s/µF of C

TMR

; the

LT4363-1 will restart when SHDN goes high.

The LT4363-2 will automatically retry at the end of the cool down phase. Retry is inhibited if the OV pin is above

1.275V; this prevents repetitive retries while the input is

Figure 2. Overcurrent Fault Timer Current

held in a sustained overvoltage condition. Retry is auto

For more information www.linear.com/LT4363

4363fb

Page 13

applicaTions inForMaTion

4363 F03

LT4363

matically initiated once the OV pin falls below 1.268V. OV has no effect on initial start-up when power is first applied and upon exiting shutdown. The cool down phase may be interrupted in the LT4363-2 by pulling SHDN low for at least 1s/µF of C

TMR

For both the LT4363-1 and LT4363-2 the F LT pin goes high in shutdown and is cleared high when power is first applied to V

. If F LT is set low, it can be reset during the

cool down phase by pulling SHDN low for at least 1s/µF

TMR

of C

Intermittent Fault Conditions

Brief overvoltage or overcurrent conditions interrupt the operation of the timer. If the TMR pin has not yet reached

1.275V when the input falls below the regulation value or drops out of current limit, the timer capacitor is dis

charged back to 0.5V with a 2µA current sink. If the TMR voltage crosses 1.275V F LT is set low. If the overvoltage or overcurrent abates before reaching 1.375V, the timer capacitor discharges with 2µA back to 0.5V, whereupon F LT resets high. If several short overvoltage or overcurrent events occur in rapid succession, the timer capacitor will integrate the charging and discharging currents.

MOSFET Selection

The LT4363 drives an N-channel MOSFET to conduct the load current. The important features of the MOSFET are on-resistance R V

(BR)DSS

, the threshold voltage, and the SOA.

, the maximum drain-source voltage

DS(ON)

The maximum allowable drain-source voltage must be higher than the supply voltage. If the output is shorted to ground or during an overvoltage event, the full supply voltage will appear across the MOSFET.

dissipating very little power

. But during either overvoltage or overcurrent faults, the GATE pin is controlled to regulate either the output voltage or the current through the MOSFET the MOSFET can coexist in these cases. The SOA cur

. Large current and high voltage drop across

ves of the MOSFET must be considered carefully along with the selection of the fault timer capacitor.

Transient Stress in the MOSFET

During an overvoltage event, the LT4363 drives a series pass MOSFET to regulate the output voltage at an acceptable level. The load circuitry may continue operating throughout this interval, but only at the expense of dissipation in the MOSFET pass device. MOSFET dissipation or stress is a function of the input voltage waveform, regulation voltage and load current. The MOSFET must be sized to survive this stress.

Most transient event specifications use the prototypi

cal waveshape shown in Figure 3, comprising a linear ramp of

rise time t

exponentially decaying back to V

, reaching a peak voltage of VPK and

with a time constant

of τ. A common automotive transient specification has constants of t

= 10µs, VPK = 80V and τ = 1ms. A surge

condition known as load dump commonly has constants

= 5ms, VPK = 60V and τ = 200ms.

of t

MOSFET stress is the result of power dissipated within the device. For long duration surges of 100ms or more, stress is increasingly dominated by heat transfer; this is a matter of device packaging and mounting, and heat sink thermal mass. This is best analyzed by simulation, using the MOSFET thermal model.

For short duration transients of less than 100ms, MOSFET survival is increasingly a matter of safe operating area

The gate drive for the MOSFET is guaranteed to be more than 10V and less than 16V for those applications with V

higher than 9V. This allows the use of standard threshold voltage N-channel MOSFETs. For systems with V

less

than 9V, a logic level MOSFET is required since the gate drive can be as low as 4.5V.

The SOA of the MOSFET must encompass all fault condi

tions. In normal operation the pass transistor is fully on,

For more information www.linear.com/LT4363

Figure 3. Prototypical Transient Waveform

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Page 14

LT4363

1 2

4363 F04

applicaTions inForMaTion

(SOA), an intrinsic property of the MOSFET. SOA quantifies the time required at any given condition of V

to raise the junction temperature of the MOSFET to its

and

rated maximum. MOSFET SOA is expressed in units of

watt-squared-seconds (P

t). This figure is essentially constant for intervals of less than 100ms for any given device type, and rises to infinity under DC operating conditions. Destruction mechanisms other than bulk die temperature distort the lines of an accurately drawn SOA graph so that

t is not the same for all combinations of ID and VDS.

P In particular P

t tends to degrade as VDS approaches the maximum rating, rendering some devices useless for absorbing energy above a certain voltage.

When a fast input voltage step occurs, the current through the pass transistor to supply the load and charge up the out

put capacitor can be high enough to trigger an overcurrent event. The gate pulls low to 1V above the OUT pin, turning

the

off

MOSFET momentarily. The internal charge pump will then start to pull the GATE pin high and turn on the MOSFET to support the load current and charge up the OUT pin. The fault timer may not start yet because the current level is below the overcurrent limit threshold and the output voltage has not reached the servo voltage. This extra stress needs to be included in calculating the overall stress level of the MOSFET.

Calculating Transient Stress

To select a MOSFET suitable for any given application, the SOA stress must be calculated for each input transient which shall not interrupt operation. It is then a simple matter to choose a device which has adequate SOA to survive the

maximum calculated stress. P

t for a prototypical transient

waveform is calculated as follows (Figure 4):

REG

Let

a = V

b = VPK – V

REG

– V

(VIN = Nominal Input Voltage)

Then

t = I







Typically V

P2t =

•

LOAD

b– a

(

REG

LOAD

)

τ 2a2ln

 

+3a2+b2-4ab

≈ VIN and τ » tr simplifying the above to

VPK– V

(

REG

τ [W2s]

)











For the transient conditions of VPK = 80V, VIN = 12V,

= 16V, tr = 10µs and τ = 1ms, and a load current

REG

of 3A, P a DPAK package. The P

t is 18.4W2s – easily handled by a MOSFET in

t of other transient waveshapes is evaluated by integrating the square of MOSFET power over time. LTSpice can be used to simulate timer behavior for more complex transients and cases where overvoltage and overcurrent faults coexist.

Calculating Short-Circuit Stress

SNS

SOA stress must also be calculated for short-circuit condi

tions. Short-circuit P



P2t = ∆VDS•



t is given by:

∆V



SNS



SNS

• t

TMR

[W2s]

Where ∆VDS is the voltage across the MOSFET, and ∆V is the SNS pin threshold, and t

is the overcurrent timer

TMR

interval.

For V R

= 15V, ∆VDS = 13V (V

= 12mΩ and C

SNS

= 100nF, P2t is 6.3W2s – less

TMR

= 2V), ∆V

OUT

= 50mV,

SNS

than the transient SOA calculated in the previous example. Nevertheless, to account for circuit tolerances this figure

should be doubled to 12.6W

Figure 4. Safe Operating Area Required to Survive Prototypical Transient Waveform

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Page 15

CLAMPED

SMAJ58CA

applicaTions inForMaTion

INRUSH

LT4363

Limiting Inrush Current and GATE Pin Compensation

The LT4363 limits the inrush current to any load capacitance by controlling the GATE pin voltage slew rate. An external capacitor can be connected from GATE to ground to reduce the inrush current at the expense of slower turn-off time. The gate capacitor is set at:

GATE(UP)

C1=

•C

The LT4363 does not need extra compensation components at the GATE pin for stability during an overvoltage or overcurrent event. With transient input voltage slew rates faster than 5V

/µs, a gate capacitor, C1, to ground is needed

to prevent self enhancement of the N-channel MOSFET.

The extra gate capacitance slows down the turn off time during fault conditions and may allow excessive current during an output short event. An extra resistor, R1, in series with the gate capacitor can improve the turn off time. A diode, D1, should be placed across R1 with the cathode connected to C1 as shown in Figure 5.

threshold during a fault. The pass transistor is not allowed to turn back on even after the cool down period has finished. This prevents the pass transistor from cycling between ON and OFF states when the input voltage stays at an elevated level for a long period of time, reducing the stress on the N-channel MOSFET. For the latch-off version, LT4363-1, the overvoltage comparator function is not available.

Reverse Input Protection

A blocking diode is commonly employed to protect the load when reverse input is possible, such as in automo

tive applications. This diode causes extra power loss, generates heat, and reduces the available supply voltage range. During cold crank, the extra voltage drop across the diode is particularly undesirable.

The LT4363 is designed to withstand reverse voltage with out damage to itself. The V

, SHDN, UV, and OV pins can

withstand up to 60V of DC voltage below the GND potential. Back-to-back MOSFETs must be used to block the current path through Q1’s body diode (Figure 6). Figure 7 shows the approach with a P-channel MOSFET in place of Q2.

1N4148W

GATE

LT4363

4363 F05

Figure 5. External GATE network

Undervoltage/Overvoltage Comparators

The LT4363 has both undervoltage and overvoltage com

parators that can be used to sense the input supply voltage. When the voltage at the UV pin is below the 1.275V threshold, the GATE pin is held low to keep the external MOSFET off. The supply voltage at the V

pin should be

at least 4V for the UV comparator to function.

The overvoltage comparator prevents the LT4363-2 from restarting if the voltage at the OV pin is above the 1.275V

SNS

R3 10Ω

SNS

0.1µF

10mΩ

TMR

OUT

ENOUT

FLT

4363 F06

OUT

12V, 3A

AT 16V

57.6k

4.99k

12V

D1*

*DIODES INC.

1N4148

SHDN

2N3904

IRLR2908

R7 10k

IRLR2908

10Ω

47nF

GATE

LT4363DE-2

GND TMR

9 12

Figure 6. Overvoltage Regulator with N-channel MOSFET Reverse Input Protection

For more information www.linear.com/LT4363

4363fb

Page 16

LT4363

OUT

0.1µF

**SANYO 25CE22GA

CLAMPED

SMAJ58CA

applicaTions inForMaTion

SNS

R3 10Ω

SNS

0.1µF

10mΩ

TMR

OUT

ENOUT

FLT

4363 F07

OUT

12V, 3A

AT 16V

57.6k

4.99k

12V

D1*

*DIODES INC.

SI7461DP

SHDN

R7 10k

IRLR2908

D2 1N5245 15V

47nF

GATE

LT4363DE-2

GND TMR

9 12

Figure 7. Overvoltage Regulator with P-channel MOSFET Reverse Input Protection

Shutdown

The LT4363 can be shut down to a low current mode when the voltage at the SHDN pin is pulled below the shutdown threshold of 0.4V. The quiescent current drops down to 7µA with internal circuitry turned off.

The SHDN pin can be pulled up to 100V or below GND by up to 60V without damage. Leaving the pin open allows an internal current source to pull it up and turn on the part while clamping the pin to 2.2V. The leakage current at the pin should be limited to no more than 1µA if no pull up device is used to help turn it on.

Supply Transient Protection

The LT4363 is tested to operate to 80V and guaranteed to be safe from damage up to 100V. Nevertheless, voltage transients above 100V may cause permanent damage. During a short-circuit condition, the large change in cur

rent flowing through power supply traces and associated wiring can cause inductive voltage transients which could exceed 100V. T

o minimize the voltage transients, the power trace parasitic inductance should be minimized by using wide traces. A small RC filter, in Figure 8, at the V

will clamp the voltage spikes.

SNS

R3 10Ω

SNS

LT4363DE-2

9 12

10mΩ

ENOUT

TMR

47nF

OUT

FLT

4363 F08

*DIODES INC.

R1 100k

4.99k

CL** 22µF

DC/DC

CONVERTER

SHDN

FAULT

GND

D1*

SMAJ58A

374k

90.9k

10k

FDB33N25

47nF

SHDN

GATE

GND TMR

R7 1k

Figure 8. Overvoltage Regulator with Input Voltage Detection

Another way to limit transients above 100V at the V

pin is to use a Zener diode and a resistor, D1 and R7 in Figure 8. The Zener diode limits the voltage at the pin while the resistor limits the current through the diode to a safe level during the surge. However, D1 can be omitted if the filtered voltage, due to R7 and C1, at the V 100V. The inclusion of R7 in series with the V increase the minimum required voltage at V

pin is below

pin will

due to the

extra voltage drop across it. This voltage drop is due to the supply current of the LT4363 and the leakage current of D1.

A total bulk capacitance of at least 22µF low ESR electro

lytic is required close to the source pin of MOSFET Q1. In addition, the bulk capacitance should be at least 10 times larger than the total ceramic bypassing capacitor on the input of the DC/DC converter.

Layout Considerations

o achieve accurate current sensing, Kelvin connection

T to the current sense resistor (R

in Figure 8) is recom-

SNS

mended. The minimum trace width for 1 oz copper foil is

0.02" per amp to ensure the trace stays at a reasonable temperature. 0.03" per amp or wider is recommended. Note that 1oz copper exhibits a sheet resistance of about 530µΩ/square. Small resistances can cause large errors in high current applications. Noise immunity will be improved

4363fb

For more information www.linear.com/LT4363

Page 17

applicaTions inForMaTion

8V – 4V

1.5mA

150V – 64V

1kΩ

1.275V • R1+R2

(

)

1.275V

27V – 1.275V

(

)

•R2

1.275V

50mV

LIM

50mV

1ms• 6µA

100mV

R5+R6

R4+R5+R6

60V • 10kΩ

1.275V

460.6kΩ+10kΩ 6V

47nF • 0.875V

LT4363

significantly by locating resistive dividers close to the pins with short V

Design Example

As a design example, take an application with the follow ing specifications: VCC = 8V to 14V DC with a transient of 150V and decay time constant (τ) of 400ms, V current limit (I overvoltage level at 60V, and 1ms of overvoltage early warning (Figure 8).

Selection of SMAJ58A for D1 will limit the voltage at the

pin to less than 71V during 150V surge. The minimum

required voltage at the V the supply current for LT4363 is 1.5mA. The maximum value for R7 to ensure proper operation is:

R7=

Select 1kΩ for R7 to accommodate all conditions.

The maximum current through R7 into D1 is then calculated as:

ID1=

and GND traces.

) at 5A, low battery detection of 6V, input

LIM

pin is 4V when VIN is at 8V;

= 2.67kΩ

= 86mA

OUT

≤ 27V,

Choose 4.99kΩ for R2.

R1=

The nearest standard value for R1 is 100kΩ.

Next calculate the sense resistor, R

SNS

The nearest standard value for C

Finally, calculate R4, R5, and R6 for 6V low battery detection and 60V input overvoltage level:

is then chosen for 1ms of early warning time:

TMR

6V •

= 60nF

=1.275V

60V •

Choose 10kΩ for R6.

=100.7kΩ

=10mΩ

=1.275V

SNS

TMR

, value:

is 47nF.

which is easily handled by the SMAJ58A for more than 500ms.

With 0.1µF of bypass capacitance, C2, along with 1k of R7, high voltage transients up to 200V with a pulse width less than 10µs are filtered out at the V

Next, calculate the resistive divider value to limit V 27V during an overvoltage event:

REG

Set the current through R1 and R2 during the overvoltage condition to 250µA.

R2=

250µA

= 5kΩ

= 27V

pin.

OUT

R4+R5 =

R5= 1.275V •

R4 = 460.6kΩ – 90kΩ = 370.6kΩ

Select 90.9kΩ for R5 and 374kΩ for R4.

The pass transistor, Q1, should be chosen to withstand a short-circuit with V short where V

= 0V, the total overcurrent fault time is:

OUT

tOC=

45.5µA

–10kΩ = 460.6kΩ

–10kΩ = 90kΩ

= 14V. In the case of a severe output

= 0.904ms

4363fb

For more information www.linear.com/LT4363

Page 18

LT4363

14V • 25mV

10mΩ

47nF • 0.875V

14V – 2V

(

)

• 50mV

10mΩ

applicaTions inForMaTion

The power dissipation in Q1 is:

P =

= 35W

During an output overload or soft short, the voltage at the OUT pin could stay at 2V or higher. The total overcurrent fault time when V

tOC=

40µA

OUT

= 2V is:

=1.028ms

Typical applicaTions

Overvoltage Regulator with Output Keep Alive During Shutdown

IRLR2908

47nF

GATE

LT4363DE-2

GND TMR

9 12

0.1µF

D1*

SMAJ58A

147k

30.1k

10k

SHDN

The power dissipation in Q1 is:

P =

= 60W

These conditions are well within the Safe Operating Area of the FDB33N25.

OUT

ENOUT

FLT

4363 TA02

1k, 1W

R1 287k

24.9k

UV = 6V

OV = 24V

*DIODES INC. **SANYO 25CE22GA

CL** 22µF

OUT

12V, 4A REGULATED AT 16V

D2 1N4746A 18V 1W

R3 10Ω

SNS

10mΩ

TMR

0.1µF

SNS

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For more information www.linear.com/LT4363

Page 19

Typical applicaTions

2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V

LT4363

R3 10Ω

SNS

9 12

15mΩ

SNS

ENOUT

TMR

0.1µF

OUT

FLT

4363 TA03

221k

4.02k

0.1µF

47nF

SHDN

FDB3632

GATE

LT4363DE-2

GND TMR

R7 1k

D1*

SMAT70A

604k

13k

10k

2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V

OUT

48V, 2.5A

300µF

UV = 35V OV = 80V

*DIODES INC.

0.1µF

R3 10Ω

SNS

LT4363DE-2

9 12

SNS

15mΩ

ENOUT

TMR

0.1µF

OUT

FLT

4363 TA04

OUT

28V, 2.5A

300µF

110k

4.02k

UV = 18V OV = 36V

*DIODES INC.

47nF

SHDN

IRLR2908

GATE

GND TMR

28V

R7 1k

D1*

SMAJ58A

261k

10k

For more information www.linear.com/LT4363

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Page 20

LT4363

CLAMPED

FOR REDUCED STANDBY CURRENT

1N4148

Typical applicaTions

Overvoltage Regulator with Reverse Input Protection Up to –80V

12V

2N3904

10k

D3**

1N4148

*DIODES INC. **SANYO 25CE22GA ***OPTIONAL COMPONENT

IRLR2908

R4 10Ω

SMAJ58CA

D1*

R5 1M

SHDN

47nF

IRLR2908

R3 10Ω

GATE

LT4363DE-2

GND TMR

9 12

SNS

10mΩ

SNS

ENOUT

TMR

0.1µF

OUT

FLT

4363 TA05

OUT

12V, 3A

CL** 22µF

AT 16V

57.6k

4.99k

Overvoltage Regulator with 250V Surge Protection

12V

49.9k

D1*

SMAJ58A

0.1µF

*DIODES INC.

127k

49.9k

Q2 MPS-A42

SHDN

7 10

OV FAULT

FDB33N25

10Ω

47nF

LT4363DE-2

GND TMR

9 12

SNS

10mΩ

C 22µF

57.6k

TMR

0.1µF

OUTGATE SNS

ENOUT

FLT

4363 TA07

4.99k

CONVERTER

SHDN

DC/DC

OUTPUT CLAMP AT 16V

GND

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For more information www.linear.com/LT4363

Page 21

package DescripTion

(UE12/DE12) DFN 0806 REV D

3.60

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

DE/UE Package

12-Lead Plastic DFN (4mm × 3mm)

(Reference LTC DWG # 05-08-1695 Rev D)

0.70 ±0.05

LT4363

±0.05

2.20 ±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

PIN 1

TOP MARK

(NOTE 6)

0.200 REF

NOTE:

1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

3.30 ±0.05

1.70 ± 0.05

PACKAGE OUTLINE

0.25 ± 0.05

0.50 BSC

2.50 REF

4.00 ±0.10 (2 SIDES)

3.00 ±0.10 (2 SIDES)

0.75 ±0.05

R = 0.05

TYP

0.00 – 0.05

R = 0.115

TYP

3.30 ±0.10

1.70 ± 0.10

0.25 ± 0.05

2.50 REF

BOTTOM VIEW—EXPOSED PAD

127

0.50 BSC

0.40 ± 0.10

PIN 1 NOTCH R = 0.20 OR

0.35 × 45° CHAMFER

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For more information www.linear.com/LT4363

Page 22

LT4363

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MS Package

12-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1668 Rev A)

4.039 ±0.102 (.159 ±.004)

(NOTE 3)

12 11 10 9 8 7

0.406 ±0.076 (.016 ±.003)

REF

0.889 ±0.127 (.035 ±.005)

GAUGE PLANE

5.10

(.201)

MIN

0.42 ±0.038

(.0165 ±.0015)

TYP

RECOMMENDED SOLDER PAD LAYOUT

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

3.20 – 3.45

(.126 – .136)

0.65

(.0256)

BSC

0.18

(.007)

0.254

(.010)

16-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610 Rev G)

.050 BSC

.045 ±.005

DETAIL “A”

0° – 6° TYP

DETAIL “A”

S Package

0.53 ±0.152 (.021 ±.006)

SEATING

PLANE

(.009 – .015)

.386 – .394

(9.804 – 10.008)

NOTE 3

4.90 ±0.152 (.193 ±.006)

0.22 –0.38

TYP

11 10

1.10

(.043)

MAX

1 2 3 4 5 6

0.650

(.0256)

BSC

3.00 ±0.102

(.118 ±.004)

(NOTE 4)

0.86

(.034)

REF

0.1016 ±0.0508 (.004 ±.002)

MSOP (MS12) 0213 REV A

.245 MIN

.030 ±.005

TYP

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

.160 ±.005

1 2 3 N/2

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

× 45°

0° – 8° TYP

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

.228 – .244

(5.791 – 6.197)

.053 – .069

(1.346 – 1.752)

(0.355 – 0.483)

.014 – .019

TYP

For more information www.linear.com/LT4363

.150 – .157

(3.810 – 3.988)

N/2

.050

(1.270)

BSC

NOTE 3

.004 – .010

(0.101 – 0.254)

S16 REV G 0212

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Page 23

LT4363

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

A 3/12 Add 57.6k resistor to Typical Application 24

B 6/13 Added H and MP temperature grades to Order Information

Operating Voltage Range for all temperature grades is 4V to 80V Reverse Input Current maximum changed to –4mA from –3mA

: At 12V, changed from [–10, –20, –35]µA to [–15, –30, –45]µA. At 48V, changed from [–10, –25, –40]µA

GATE(UP)

to [–20, –40, –65]µA Current Limit Sense Voltage: At 12V

45mV — 59mV to 48mV — 58mV

maximum changed from 30µA to 40µA

SNS

range changed from 3.7V — 5V to 3.5V — 5.4V

TMR(H)

OUT Reset Threshold minimum changed from 1.9V to 1.8V Updated curves in graphs G05, G06 and G09 Corrected Y-axis numbers in Warning Period TMR Current, graph G15 Replaced Current Limit at Supply Voltage graph with Current Limit Foldback GATE Pin Description: Added information on 14V protection clamp TMR Pin Description: Added 10nF minimum capacitor requirement Changed GATE to SNS clamp in Block Diagram to 14V from 13V Added 0.1µF C2 to Typical Application circuits

, improved from 43mV — 58mV to 45mV — 55mV. At 48V, improved from

3 3 3

4 4 4 4 5 6 7 8 8 9

18, 19

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

For more information www.linear.com/LT4363

4363fb

Page 24

LT4363

OUTPUT

Typical applicaTion

Overvoltage Regulator with Ideal Diode Reverse Voltage Protection

10Ω

LT4363

10mΩ

OUTSNS

ENOUT

FLT FAULT

4363 TA06

0.1µF

CLAMP

DC/DC

CONVERTER

GND

AT 16V

22µF

57.6k

4.99k

SHDN

MMBD1205

12V

SHDN

IRLR2908

GATEV

GND TMR

FDB3632

IN OUT

–60V TO 75V DC PROTECTION 100V TRANSIENT MAXIMUM UV = 4.5V

GATE

LTC4357

GND

CLAMP

SMAT70A

127k

49.9k

47nF

relaTeD parTs

PART NUMBER DESCRIPTION COMMENTS

LTC1696 Overvoltage Protection Controller ThinSOT™ Package, 2.7V to 27V

LTC2909 Triple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring

LTC2912/LTC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV Trip Values, ±1.5% Threshold Accuracy

LTC2914 Quad UV/OV Monitor For Positive and Negative Supplies

LTC3827/LTC3827-1 Low I

LTC3835/LTC3835-1 Low I

LT3845 Low I

LT3850 Dual, 550kHz, 2-Phase Synchronous Step-Down

LTC3890 Low I

, Dual, Synchronous Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ V

, Synchronous Step-Down Controller Single Channel LTC3827/LTC3827-1

, Synchronous Step-Down Controller 4V ≤ VIN ≤ 60V, 1.23V ≤ V

Dual 180° Phased Controllers, V

Controller

, Dual 2-Phase, Synchronous Step-Down

QFN-28, SSOP-28 Packages

4V ≤ VIN ≤ 60V, 0.8V ≤ V

Controller

LT4256-1 Positive 48V Hot Swap Controller with

Open-Circuit Detect

LTC4260 Positive High Voltage Hot Swap Controller with

8-Bit ADC and I

Foldback Current Limiting, Open-Circuit and Over Supply

Wide Operating Range 8.5V to 80V

LTC4352 Ideal MOSFET ORing Diode External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V

LTC4354 Negative Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 1µs Turn-Off, 80V Operation

LTC4355 Positive Voltage Diode-OR Controller Controls Two N-Channel MOSFETs, 0.3µs Turn-Off, 80V Operation

LT4356-1 High Voltage Surge Stopper 100V Overvoltage and Overcurrent Protection, Latch-Off and Auto-Retry Options

LTC4364 Surge Stopper with Ideal Diode 4V to 80V Operation; –40V Reverse Input, –20V Reverse Output Protection

LTC4365 Window Passer - OV, UV and Reverse Supply

2.5V to 34V Operation, Protects 60V to –40V

Protection Controller

≤ 10V, 80µA Quiescent Current

OUT

≤ 36V, 120µA Quiescent Current

OUT

4V to 24V, 97% Duty Cycle, 4mm × 4mm

≤ 24V, 50µA Quiescent Current

OUT

current Fault Output, Up to 80V

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

For more information www.linear.com/LT4363

●

www.linear.com/LT4363

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LT 0613 REV B • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 2011