Datasheet LT1885 Datasheet (LINEAR TECHNOLOGY)

Page 1
FEATURES
LT1884/LT1885
Dual/Quad Rail-to-Rail
Output, Picoamp Input
Precision Op Amps
U
DESCRIPTIO
Offset Voltage: 50µV Max (LT1884A)
Input Bias Current: 400pA Max (LT1884A)
Offset Voltage Drift: 0.8µV/°C Max
Rail-to-Rail Output Swing
Operates with Single or Split Supplies
Open-Loop Voltage Gain: 1 Million Min
1mA Maximum Supply Current Per Amplifier
Slew Rate: 1V/µs
Standard Pinouts
U
APPLICATIO S
Thermocouple Amplifiers
Bridge Transducer Conditioners
Instrumentation Amplifiers
Battery-Powered Systems
Photo Current Amplifiers
Precision Integrators
Precision Current Sources
The LT®1884/LT1885 op amps bring high accuracy input performance to amplifiers with rail-to-rail output swing while providing faster response than other precision am-
plifiers. Input offset voltage is trimmed to less than 50µV
The amplifiers work on any total power supply voltage
between 2.7V and 36V (fully specified from 5V to ±15V).
Output voltage swings to within 40mV of the negative supply and 220mV of the positive supply make these amplifiers good choices for low voltage single supply operation.
Slew rates of 1V/µs with a supply current of less than 1mA
per amplifier give superior response and settling time performance in a low power precision amplifier.
The dual LT1884 is available with standard pinouts in 8-pin SO and PDIP packages. The quad LT1885 is also in the standard pinout 14-pin SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
–IN
GUARD
+IN
U
Input Fault Protected Instrumentation Amplifier
1M
10pF
+
1/4 LT1885
1M
22pF
TRIM FOR
AC CMRR
3
+
1/4 LT1885
1/4 LT1885
5
+
10k
10k
R
G/2
R
G/2
10k
10k
10k
9.76k
1/4 LT1885 OUT
+
2•10k
GAIN =
500
TRIM FIRST
FOR DC CMRR
1884 TA01
R
G
1
Page 2
LT1884/LT1885
TOP VIEW
S PACKAGE
14-LEAD PLASTIC SO
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT A
–IN A
+IN A
V
+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V
+IN C
–IN C
OUT C
A
D
C
B
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
Supply Voltage (V+ to V–) ....................................... 40V
Differential Input Voltage (Note 2) ......................... ±10V
Input Voltage .................................................... V+ to V
Input Current (Note 2) ........................................ ±10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
UU
W
PACKAGE/ORDER I FOR ATIO
ORDER
PART NUMBER
TOP VIEW
OUT A
1
–IN A
2
+IN A
N8 PACKAGE 8-LEAD PDIP
A
3
V
4
T
= 150°C, θJA = 130°C/W (N8)
JMAX
T
= 150°C, θJA = 190°C/W (S8)
JMAX
+
8
V
OUT B
7
–IN B
6
B
+IN B
5
S8 PACKAGE
8-LEAD PLASTIC SO
LT1884CN8 LT1884CS8 LT1884ACN8 LT1884ACS8 LT1884IN8 LT1884IS8 LT1884AIN8 LT1884AIS8
S8 PART MARKING
1884 1884A
1884I 1884AI
Operating Temperature Range (Note 4) .. –40°C to 85°C Specified Temperature Range (Note 5) ... – 40°C to 85°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER
PART NUMBER
LT1885CS LT1885IS
T
= 150°C, θJA = 110°C/W
JMAX
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
I
OS
2
Input Offset Voltage (LT1884A) 25 50 µV
< 70°C 85 µV
0°C < T
A
–40°C < T
Input Offset Voltage (LT1884/LT1885) 30 80 µV
0°C < T –40°C < T
Input Offset Voltage Drift (Note 6) 0°C < TA < 70°C 0.3 0.8 µV/°C
–40°C < T
Input Offset Current (LT1884A) 100 300 pA
Input Offset Current (LT1884/LT1885) 150 900 pA
0°C < T –40°C < T
0°C < T –40°C < T
< 85°C 110 µV
A
< 70°C 125 µV
A
< 85°C 150 µV
A
< 85°C 0.3 0.8 µV/°C
A
< 70°C 400 pA
A
< 85°C 500 pA
A
< 70°C 1200 pA
A
< 85°C 1400 pA
A
Page 3
LT1884/LT1885
ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
B
e
n
i
n
V
CM
CMRR Common Mode Rejection Ratio 1V < VCM < 4V 108 128 dB
PSRR Power Supply Rejection Ratio VEE = 0, VCM = 1.5V
A
VOL
V
OL
V
OH
I
S
I
SC
GBW Gain-Bandwidth Product f = 20kHz 1.2 2 MHz
t
S
+
SR
SR
Input Bias Current (LT1884A) 100 400 pA
< 70°C 500 pA
0°C < T
A
–40°C < T
< 85°C 600 pA
A
Input Bias Current (LT1884/LT1885) 150 900 pA
0°C < T
< 70°C 1200 pA
A
–40°C < T
Input Noise Voltage 0.1Hz to 10Hz 0.4 µV
< 85°C 1400 pA
A
P-P
Input Noise Voltage Density f = 1kHz 9.5 nV/√Hz Input Noise Current Density f = 1kHz 0.05 pA/√Hz
Input Voltage Range VEE + 1.0 VCC – 1.0 V
V
1.2V < V
0°C < T
T
A
< 3.8V 106 dB
CM
< 85°C, 2.7V < VCC < 32V 108 132 dB
A
= –40°C, 3V < V
< 32V 108 132 dB
CC
+ 1.2 VCC – 1.2 V
EE
Minimum Operating Supply Voltage 2.4 2.7 V
Large-Signal Voltage Gain RL = 10k; 1V < V
RL = 2k; 1V < V
RL = 1k; 1V < V
< 4V 500 1600 V/mV
OUT
< 4V 400 800 V/mV
OUT
< 4V 300 400 V/mV
OUT
350 V/mV
300 V/mV
200 V/mV
Output Voltage Swing Low No Load 20 40 mV
= 100µA 25 50 mV
I
SINK
= 1mA 70 150 mV
I
SINK
I
= 5mA 270 600 mV
SINK
Output Voltage Swing High No Load 120 220 mV (Referred to V
)I
CC
= 100µA 130 230 mV
SOURCE
= 1mA 180 300 mV
I
SOURCE
= 5mA 360 600 mV
I
SOURCE
Supply Current per Amplifier VCC = 3V 0.45 0.65 0.85 mA
1.30 mA
VCC = 5V 0.50 0.65 0.9 mA
1.4 mA
VCC = 12V 0.50 0.70 1.0 mA
1.5 mA
Short-Circuit Current V
Settling Time 0.01%, V
Positive Slew Rate A
Negative Slew Rate A
Short to GND 15 30 mA
OUT
Short to V
V
OUT
A
= –1, RL = 2k
V
= –1 0.45 0.9 V/µs
V
= –1 0.35 0.7 V/µs
V
CC
= 1.5V to 3.5V, 10 µs
OUT
15 30 mA
0.36 V/µs
0.25 V/µs
3
Page 4
LT1884/LT1885
ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
I
+ Noninverting Bias Current Match 200 600 pA
B
CMRR Common Mode Rejection Match (Notes 7, 9) 104 125 dBPSRR Positive Power Supply Rejection Match V
Offset Voltage Match (LT1884A) 30 70 µV
< 70°C 125 µV
0°C < T
A
–40°C < T
< 85°C 160 µV
A
Offset Voltage Match (LT1884/LT1885) (Note 7) 35 125 µV
< 70°C 195 µV
0°C < T
A
–40°C < T
< 85°C 235 µV
A
Offset Voltage Match Drift (Notes 6, 7) 0.4 1.2 µV/°C
(LT1884A) 0°C < T
< 70°C 700 pA
A
–40°C < T
< 85°C 850 pA
A
Noninverting Bias Current Match (Notes 7, 9) 250 1200 pA
(LT1884/LT1885) 0°C < T
(Notes 7, 9) 0°C < T
< 70°C 1600 pA
A
–40°C < T
EE
= –40°C, 3V < V
T
A
< 85°C 1900 pA
A
= 0, VCM = 1.5V
< 85°C, 2.7V < VCC < 32V 104 126 dB
A
< 32V 104 126 dB
CC
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Split supply operation V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
I
OS
I
B
e
n
i
n
V
CM
CMRR Common Mode Rejection Ratio –13.5V < VCM < 13.5V 114 130 dB
Input Offset Voltage (LT1884A) 25 50 µV
Input Offset Voltage (LT1884/LT1885) 30 80 µV
Input Offset Voltage Drift (Note 6) 0°C < TA < 70°C 0.3 0.8 µV/°C
Input Offset Current (LT1884A) 150 300 pA
Input Offset Current (LT1884/LT1885) 150 900 pA
Input Bias Current (LT1884A) 150 400 pA
Input Bias Current (LT1884/LT1885) 150 900 pA
Input Noise Voltage 0.1Hz to 10Hz 0.4 µV Input Noise Voltage Density f = 1kHz 9.5 nV/Hz Input Noise Current Density f = 1kHz 0.05 pA/√Hz
Input Voltage Range VEE + 1.0 VCC – 1.0 V
= ±15V; V
S
= 0V unless otherwise noted. (Note 5)
CM
< 70°C 85 µV
0°C < T
A
–40°C < T
0°C < T –40°C < T
–40°C < T
0°C < T –40°C < T
0°C < T –40°C < T
0°C < T –40°C < T
0°C < T –40°C < T
< 85°C 110 µV
A
< 70°C 125 µV
A
< 85°C 150 µV
A
< 85°C 0.3 0.8 µV/°C
A
< 70°C 400 pA
A
< 85°C 500 pA
A
< 70°C 1200 pA
A
< 85°C 1400 pA
A
< 70°C 500 pA
A
< 85°C 600 pA
A
< 70°C 1200 pA
A
< 85°C 1400 pA
A
V
+ 1.2 VCC – 1.2 V
EE
P-P
4
Page 5
LT1884/LT1885
ELECTRICAL CHARACTERISTICS
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Split supply operation V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
+PSRR Positive Power Supply Rejection Ratio VEE = –15V, VCM = 0V; 1.5V < VCC < 18V 114 132 dB
–PSRR Negative Power Supply Rejection Ratio VCC = 15V, VCM = 0V; –1.5V < VEE < –18V 106 132 dB
Minimum Operating Supply Voltage ±1.2 ±1.35 V
A
VOL
V
OL
V
OH
I
S
I
SC
GBW Gain-Bandwidth Product f = 20kHz 1.5 2.2 MHz
t
S
+
SR
SR
V
OS
+
I
B
CMRR Common Mode Rejection Match (Notes 7, 9) 106 125 dB+PSRR Positive Power Supply Rejection Match V
– PSRR Negative Power Supply Rejection Match V
Large-Signal Voltage Gain RL = 10k; –13.5V < V
Output Voltage Swing Low No Load 20 40 mV (Referred to V
Output Voltage Swing High No Load 160 220 mV (Referred to V
Supply Current Per Amplifier V
Short-Circuit Current V
Settling Time 0.01%, V
Positive Slew Rate A
Negative Slew Rate A
Offset Voltage Match (LT1884A) (Note 7) 35 70 µV
Offset Voltage Match (LT1884/LT1885) (Note 7) 35 125 µV
Offset Voltage Match Drift (Note 6, 7) 0.4 1.1 µV/°C
Noninverting Bias Current Match (Notes 7, 8) 200 600 pA
(LT1884A) 0°C < T
Noninverting Bias Current Match (Notes 7, 8) 240 1200 pA
(LT1884/LT1885) 0°C < T
= ±15V; V
S
)I
EE
)I
CC
= 0V unless otherwise noted. (Note 5)
CM
OUT
RL = 2k; –13.5V < V
RL = 1k; –12V < V
= 100µA 25 50 mV
SINK
I
= 1mA 70 150 mV
SINK
= 5mA 270 600 mV
I
SINK
= 100µA 160 230 mV
SOURCE
I
= 1mA 180 300 mV
SOURCE
= 5mA 360 600 mV
I
SOURCE
= ±15V 0.85 1.1 mA
S
Short to V
OUT
V
Short to V
OUT
A
0°C < T –40°C < T
0°C < T –40°C < T
–40°C < T
–40°C < T
OUT
= –1, RL = 2k
V
= –1 0.5 1.0 V/µs
V
= –1 0.40 0.7 V/µs
V
< 70°C 125 µV
A
A
< 70°C 175 µV
A
A
< 70°C 700 pA
A
A
< 70°C 1600 pA
A
A
= –15V, VCM = 0V, 1.5V < VCC < 18V, 108 124 dB
EE
OUT
< 12V 100 230 V/mV
OUT
EE CC
= – 5V to 5V, 17 µs
< 85°C 160 µV
< 85°C 235 µV
< 85°C 850 pA
< 85°C 1900 pA
(Notes 7, 9)
= 15V, VCM = 0V, –1.5V < VEE < –18V, 102 132 dB
CC
(Notes 7, 9)
< 13.5V 1000 1600 V/mV
700 V/mV
< 13.5V 250 420 V/mV
175 V/mV
75 V/mV
1.6 mA
15 50 mA
15 30 mA
0.4 V/µs
0.26 V/µs
5
Page 6
LT1884/LT1885
FREQUENCY (Hz)
VOLTAGE GAIN (dB)
100
90
80
70
60
50
40
30
20
10
0
–10
–20
PHASE SHIFT (DEG)
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
18845 G06
10k 100k 1M 10M
PHASE SHIFT
GAIN
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired.
Note 2: The inputs are protected by back-to-back diodes. If the differential input voltage exceeds 0.7V, the input current should be limited to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature below absolute maximum.
Note 4: The LT1884C/LT1885C and LT1884I/LT1885I are guaranteed
functional over the operating temperature range of – 40°C to 85°C.
Note 6: This parameter is not 100% tested. Note 7: Matching parameters are the difference between amplifiers A and
B in the LT1884 and between amplifiers A and D and B and C in the LT1885.
Note 8: This parameter is the difference between the two noninverting input bias currents.
Note 9: CMRR and PSRR are defined as follows: CMRR and PSRR are measured in µV/V on each amplifier. The difference is calculated in µV/V
and then converted to dB.
Note 5: The LT1884C/LT1885C are designed, characterized and expected
to meet specified performance from –40°C to 85°C but are not tested or
QA sampled at these temperatures. LT1884I is guaranteed to meet
specified performance from – 40°C to 85°C.
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Input Offset Voltage
Distribution of Offset Voltage Drift
24
V
= ±15V
S
20
16
12
8
PERCENT OF UNITS (%)
4
0
–0.9 – 0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7 0.9
OFFSET VOLTAGE DRIFT (µV/°C)
18845 G01
vs Temperature
200
TEMPCO: –55°C TO 125°C 10 REPRESENTATIVE UNITS
150
100
50
0
–50
–100
INPUT OFFSET VOLTAGE (µV)
–150
–200
–50 –30 –10 10 30 50 70 90 110 125
TEMPERATURE (°C)
18845 G02
V
vs I
OUT
V
S
= ±15V
SINK
100µA
I
SINK
125°C
25°C
–55°C
500
400
300
) (mV)
EE
– V
200
OUT
(V
100
0 10µA 1mA 10mA
18845 G03
V
vs I
OUT
500
V
400
300
) (mV)
OUT
– V
200
CC
(V
100
0 10µA 1mA 10mA
6
SOURCE
= ±15V
S
100µA
I
SOURCE
25°C
125°C
–55°C
18845 G04
Gain vs Frequency
140
120
100
80
60
GAIN (dB)
40
20
0
–20
0.1 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz)
V
= ±15V
S
Gain, Phase Shift vs Frequency
18845 G05
Page 7
UW
FREQUENCY (Hz)
1
1
10
100
1000
10 100 1000
18845 G09
VOLTAGE NOISE DENSITY (nV/Hz)
CURRENT NOISE DENSITY (fA/Hz)
CURRENT NOISE
VOLTAGE NOISE
TYPICAL PERFOR A CE CHARACTERISTICS
LT1884/LT1885
CMRR vs Frequency
140 130 120 110 100
90 80 70 60 50 40 30
COMMON MODE REJECTION (dB)
20 10
0
10 100 10k
1
1k
FREQUENCY (Hz)
100k
1M
18845 G07
PSRR vs Frequency
140 130 120 110 100
90 80 70 60 50 40 30
SUPPLY POWER REJECTION (dB)
20 10
0
1
POSITIVE SUPPLY
10 100 10k
0.1Hz to 10Hz Noise 0.01Hz to 1Hz Noise
V
= ±15V
S
= 25°C
T
A
NOISE VOLTAGE (O.2µV/DIV)
V
S
T
A
= ±15V = 25°C
NOISE VOLTAGE (O.2µV/DIV)
NEGATIVE SUPPLY
1k
FREQUENCY (Hz)
V
= ±15V
S
100k
18845 G08
1M
Vn, In vs Frequency
Slew Rate vs Temperature
1.4
RISING
= ±15V
V
RISING
V
= ±5V
S
S
FALLING
= ±5V
V
S
1.2
1.0
0.8
SLEW RATE (V/µs)
0.6
FALLING
= ±15V
V
S
0.4
TIME (2s/DIV)
Settling Time to 0.01% vs Output Step
10
V
= ±15V
S
8
6
4
2
0
–2
OUTPUT STEP (V)
–4
–6
–8
–10
02
AV = 1
A
V
4 6 8 1012141618
SETTLING TIME (µs)
= 1
AV = –1
AV = –1
18845 G10
18845 G13
Supply Current per Amplifier vs Supply Voltage
1.25
1.00
0.75
0.50
SUPPLY CURRENT (mA)
0.25
20
0
0
TIME (20s/DIV)
T
= 85°C
A
T
= 25°C
A
T
= –40°C
A
8164
122420
SUPPLY VOLTAGE (V)
18845 G11
32
28
36
18845 G14
40
–50 –30 –10 10 30 50 70 90 110
TEMPERATURE (°C)
Input Bias Current vs Common Mode Voltage
1000
T
= 25°C
A
750
500
250
0
–250
–500
INPUT BIAS CURRENT (pA)
–750
–1000
–10 –5 5
–15
COMMON MODE VOLTAGE (V)
I
I
BIAS
BIAS
+
0
18845 G12
10
LTXXXX • TPCXX
15
7
Page 8
LT1884/LT1885
FREQUENCY (Hz)
1k
GAIN (dB)
10k 100k 1M 10M 100M
18845 G17
10
0
–10
–20
–30
–40
V
S
= ±2.5V
V
S
= ±15V
FREQUENCY (Hz)
1k
GAIN (dB)
10k 100k 1M 10M 100M
18845 G19
10
0
–10
–20
–30
–40
C
LOAD
= 500pF
C
LOAD
= 0pF
C
LOAD
= 100pF
C
LOAD
= 300pF
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Channel Separation vs Frequency
–20
–30
–40
–50
–60
–70
–80
–90
CHANNEL SEPARATION (dB)
–100
–110
–120
1k 10k 100k 1M 10M
100
FREQUENCY (Hz)
Gain vs Frequency vs C (AV = 1)
10
0
–10
LOAD
18845 G16
Gain vs Frequency (AV = 1)
Gain vs Frequency vs C
LOAD
(AV = – 1)
GAIN (dB)
–20
C
–30
–40
1k
LOAD
C
LOAD
C
LOAD
C
LOAD
10k 100k 1M 10M 100M
Large-Signal Response
5V/DIV
V
= ±15V
S
= RG = 10k
R
F
A
= –1
V
= 330pF = 150pF = 50pF = 0pF
FREQUENCY (Hz)
50µs/DIV
18845 G18
18845 G20
20mV/DIV
Small-Signal Response
V
= ±15V
S
= RG = 10k
R
F
A
= –1
V
2µs/DIV
18845 G21
8
Page 9
WUUU
APPLICATIO S I FOR ATIO
LT1884/LT1885
The LT1884/LT1885 dual op amp features exceptional input precision with rail-to-rail output swing. Slew rate and small-signal bandwidth are superior to other amplifi­ers with comparable input precision. These characteris­tics make the LT1884/LT1885 a convenient choice for precision low voltage systems and for improved AC per­formance in higher voltage precision systems. Maintain­ing the advantage of the precision inherent in the amplifier depends upon proper applications circuit design and board layout.
Preserving Input Precision
Preserving the input voltage accuracy of the LT1884/ LT1885 requires that the applications circuit and PC board layout do not introduce errors comparable to or greater
than the 30µV offset. Temperature differentials across the
input connections can generate thermocouple voltages of 10s of microvolts. PC board layouts should keep connec­tions to the amplifier’s input pins close together and away from heat dissipating components. Air currents across the board can also generate temperature differentials.
The extremely low input bias currents, 100pA, allow high accuracy to be maintained with high impedance sources and feedback networks. The LT1884/LT1885’s low input bias currents are obtained by using a cancellation circuit on-chip. This causes the resulting I uncorrelated, as implied by the IOS specification being comparable to the I the input resistances in each input lead, as is commonly recommended with most amplifiers. The impedance at either input should be kept as small as possible to mini­mize total circuit error.
. The user should not try to balance
BIAS
BIAS
+
and I
BIAS
to be
interconnect, with the guard driven to the same common mode voltage as the amplifier inputs.
Input Common Mode Range
The LT1884/LT1885 output is able to swing close to each power supply rail, but the input stage is limited to operat­ing between VEE + 0.8V and VCC – 0.9V. Exceeding this common mode range will cause the gain to drop to zero; however, no gain reversal will occur.
Input Protection
The inverting and noninverting input pins of the LT1884/ LT1885 have limited on-chip protection. ESD protection is provided to prevent damage during handling. The input transistors have voltage clamping and limiting resistors to protect against input differentials up to 10V. Short tran­sients above this level will also be tolerated. If the input pins may be subject to a sustained differential voltage above 10V, external limiting resistors should be used to prevent damage to the amplifier. A 1k resistor in each input lead will provide protection against a 30V differential voltage.
Capacitive Loads
The LT1884/LT1885 can drive capacitive loads up to 300pF when configured for unity gain. The capacitive load driving capability increases as the amplifier is used in higher gain configurations. Capacitive load driving may also be increased by decoupling the capacitance from the output with a small resistance.
Input Bias Currents
PC board layout is important to ensure that leakage currents do not corrupt the low I high precision, high impedance circuits, the input pins should be surrounded by a guard ring of PC board
of the amplifier. In
BIAS
While it may be tempting to seek out a JFET amplifier for low input bias current, remember that bipolar devices improve with temperature while JFETs degrade.
9
Page 10
LT1884/LT1885
PACKAGE DESCRIPTIO
U
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
87 6
0.255 ± 0.015* (6.477 ± 0.381)
1234
5
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325 –0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.100
(2.54)
BSC
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
8
0.228 – 0.244
(5.791 – 6.197)
0.189 – 0.197* (4.801 – 5.004)
7
6
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
5
0.150 – 0.157** (3.810 – 3.988)
0.020
(0.508)
MIN
N8 1098
10
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
1
3
2
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
SO8 1298
Page 11
PACKAGE DESCRIPTIO
LT1884/LT1885
U
Dimensions in inches (millimeters) unless otherwise noted.
S Package
14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 – 0.344* (8.560 – 8.738)
13
12
11
14
10
8
9
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
×
°
45
0.016 – 0.050
(0.406 – 1.270)
0° – 8° TYP
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.150 – 0.157** (3.810 – 3.988)
1
3
2
4
0.050
(1.270)
BSC
5
7
6
0.004 – 0.010
(0.101 – 0.254)
S14 1298
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
Page 12
LT1884/LT1885
TYPICAL APPLICATIO
U
16-Bit Voltage Output DAC on ±5V Supply
5V
1.65k
LT1634
4.096V
+
LT1884
5V
–5V
R
COM
LTC®1597
REFR1
R
DAC
OFS
33pF
LT1884
+
5V
–5V
V
OUT
–4.096V TO 4.096V
18845 TA02
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1112 Dual Picoamp Input Op Amp V
LT1114 Quad Picoamp Input Op Amp V
LT1167 Gain Programmable Instrumentation Amp Gain Error = 0.08% Max
LT1490 Micropower Rail-to-Rail Input and Output Op Amp Over-The-TopTM Common Mode Range
LT1793 Low Noise JFET Op Amp IB = 10pA Max
LT1881/LT1882 Picoamp Input Rail-to-Rail Output Op Amp Lower Input Bias Currents Than LT1884/LT1885
LTC2050 Zero Drift Op Amp in SOT-23 V
Over-The-Top is a trademark of Linear Technology Corporation.
Linear Technology Corporation
12
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
www.linear-tech.com
= 60µV Max
OS
= 60µV Max
OS
= 3µV Max, Rail-to-Rail Output
OS
18845fs, sn18845 LT/TP 0400 4K • PRINTED IN USA
LINEAR TECHNOL OGY CO RP O R ATION 2000
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