The LT®1813 is a low power, high speed, very high slew
rate operational amplifier with excellent DC performance.
The LT1813 features reduced supply current, lower input
offset voltage, lower input bias current and higher DC gain
than other devices with comparable bandwidth. The circuit
topology is a voltage feedback amplifier with the slewing
characteristics of a current feedback amplifier.
The output drives a 100Ω load to ±3.5V with ±5V supplies.
On a single 5V supply, the output swings from 1.1V to 3.9V
with a 100Ω load connected to 2.5V. The amplifier is stable
with a 1000pF capacitive load which makes it useful in
buffer and cable driver applications.
U
APPLICATIO S
■
Wideband Amplifiers
■
Buffers
■
Active Filters
■
Video and RF Amplification
■
Cable Drivers
■
Data Acquisition Systems
TYPICAL APPLICATIO
4MHz, 4th Order Butterworth FilterFilter Frequency Response
232Ω
665Ω
232Ω
V
IN
220pF
–
1/2 LT1813
+
47pF
U
274Ω
274Ω
562Ω
470pF
–
1/2 LT1813
+
The LT1813 is manufactured on Linear Technology’s
advanced low voltage complementary bipolar process.
For higher supply voltage single, dual and quad operational amplifiers with up to 70MHz gain bandwidth, see the
LT1351 through LT1365 data sheets.
, LTC and LT are registered trademarks of Linear Technology Corporation.
10
0
–10
–20
22pF
V
OUT
1813 TA01
–30
–40
–50
VOLTAGE GAIN (dB)
–60
–70
VS = ±5V
V
= 600mV
IN
–80
PEAKING < 0.12dB
–90
0.1
P-P
110100
FREQUENCY (MHz)
1813 TA02
1
Page 2
LT1813
1
2
3
4
8
7
6
5
TOP VIEW
V
+
OUT B
–IN B
+IN B
OUT A
–IN A
+IN A
V
–
S8 PACKAGE
8-LEAD PLASTIC SO
B
A
1
2
3
4
OUT A
–IN A
+IN A
V
–
8
7
6
5
V
+
OUT B
–IN B
+IN B
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
WW
W
ABSOLUTE MAXIMUM RATINGS
U
(Note 1)
Total Supply Voltage (V+ to V–)............................. 12.6V
Differential Input Voltage (Transient Only, Note 2) ... ±3V
Input Voltage ........................................................... ±V
Input Offset Voltage(Note 4)●3.5mV
Input VOS Drift(Note 7)●1030µV/°C
Input Offset Current●600nA
Input Bias Current●±6µA
Input Voltage Range (High)●3.5V
Input Voltage Range (Low)
Large-Signal Voltage GainV
= 1.5V to 3.5V, RL = 500Ω●0.6V/mV
OUT
= 1.5V to 3.5V, RL = 100Ω●0.4V/mV
V
OUT
●1.5V
Output Swing (High)RL = 500Ω, 30mV Overdrive●3.7V
= 100Ω, 30mV Overdrive●3.5V
R
L
Output Swing (Low)RL = 500Ω, 30mV Overdrive●1.3V
R
= 100Ω, 30mV Overdrive●1.5V
L
Output CurrentV
Short-Circuit CurrentV
Channel SeparationV
= 3.5V or 1.5V, 30mV Overdrive●±17mA
OUT
= 2.5V, VIN = ±1V●±40mA
OUT
, 1.5V to 3.5V, RL = 100Ω●79dB
OUT
Supply CurrentPer Amplifier●5mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Differential inputs of ±3V are appropriate for transient operation
only, such as during slewing. Large sustained differential inputs can cause
excessive power dissipation and may damage the part.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up
drift.
Note 5: Slew rate is measured between ±2V on the output with ±3V input
for ±5V supplies and 2V
on the output with a 3V
P-P
input for single 5V
P-P
supplies.
Note 6: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πV
.
P
Note 7: This parameter is not 100% tested.
Note 8: The LT1813C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and 85°C. The
LT1813I is guaranteed to meet the extended temperature limits.
Note 9: The LT1813D is 100% production tested at 25°C. It is designed,
characterized and expected to meet the 0°C to 70°C specifications
although it is not tested or QA sampled at these temperatures. The
LT1813D is guaranteed functional from –40°C to 85°C but may not meet
those specifications.
5
Page 6
LT1813
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Temperature
5
PER AMPLIFIER
4
V
= ±5V
3
2
SUPPLY CURRENT (mA)
1
0
–50 –25
S
V
= ±2.5V
S
50
25
0
TEMPERATURE (°C)
Input Bias Current
vs Temperature
–0.6
VS = ±5V
–0.7
–0.8
–0.9
–1.0
INPUT BIAS CURRENT (µA)
–1.1
Input Common Mode Range
vs Supply Voltage
+
V
–0.5
–1.0
–1.5
–2.0
TA = 25°C
< 1mV
∆V
OS
2.0
1.5
1.0
INPUT COMMON MODE RANGE (V)
0.5
–
100
125
1813 G01
75
V
0
2
1
SUPPLY VOLTAGE (±V)
4
3
5
6
7
1813 G02
Input Bias Current
vs Common Mode Voltage
0
= 25°C
T
A
= ±5V
V
S
–0.5
–1.0
–1.5
INPUT BIAS CURRENT (µA)
–2.0
–5.0
–2.5
INPUT COMMON MODE VOLTAGE (V)
0
2.5
5.0
1813 G03
Open-Loop Gain
Input Noise Spectral Density
100
i
10
INPUT VOLTAGE NOISE (nV/√Hz)
n
e
= ±5V
= 101
= 10k
10
INPUT CURRENT NOISE (pA/√Hz)
1
TA = 25°C
V
S
A
V
R
S
n
vs Resistive Load
75.0
TA = 25°C
72.5
70.0
67.5
65.0
OPEN-LOOP GAIN (dB)
62.5
VS = ±5V
VS = ±2.5V
–1.2
–50
–250
TEMPERATURE (°C)
50100 125
2575
Open-Loop Gain vs Temperature
75.0
VS = ±5V
V
= ±3V
O
72.5
70.0
67.5
65.0
OPEN-LOOP GAIN (dB)
62.5
60.0
–50
–250
RL = 500Ω
RL = 100Ω
50100 125
2575
TEMPERATURE (°C)
6
1813 G04
1813 G07
1
10100
1k10k100k
FREQUENCY (Hz)
Output Voltage Swing
vs Supply Voltage
+
V
TA = 25°C
–0.5
= 30mV
V
IN
–1.0
–1.5
–2.0
2.0
1.5
1.0
OUTPUT VOLTAGE SWING (V)
0.5
–
V
0
1
RL = 100Ω
3
2
SUPPLY VOLTAGE (±V)
RL = 500Ω
RL = 100Ω
RL = 500Ω
4
0.1
1813 G05
60
100
1k10k
LOAD RESISTANCE (Ω)
1813 G06
Output Voltage Swing
vs Load Current
+
V
VS = ±5V
–0.5
= 30mV
V
IN
–1.0
–1.5
–2.0
2.0
1.5
OUTPUT VOLTAGE SWING (V)
1.0
0.5
6
7
1813 G02
5
85°C
25°C
–40°C
–
V
–60
–40
OUTPUT CURRENT (mA)
–20
0
20
60
40
1813 G09
Page 7
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Output Short-Circuit Current
vs TemperatureOutput Impedance vs Frequency
120
VS = ±5V
110
100
90
OUTPUT SHORT-CIRCUIT CURRENT (mA)
80
–50
–2502550
SOURCE
SINK
75 100 125
TEMPERATURE (°C)
1813 G10
Gain and Phase vs Frequency
70
60
50
40
30
GAIN (dB)
20
10
–10
GAIN
±2.5V
0
100k
10k1M10M1000M
FREQUENCY (Hz)
TA = 25°C
= –1
A
V
= RG = 500Ω
R
F
±2.5V
±5V
PHASE
100M
±5V
1813 G13
120
100
80
PHASE (DEG)
60
40
20
0
–20
–40
Settling Time vs Output Step
5
4
3
2
1
0
–1
OUTPUT STEP (V)
–2
VS = ±5V
= –1
A
V
–3
= 500Ω
R
F
= 3pF
C
–4
F
0.1% SETTLING
–5
0
10
5
SETTLING TIME (ns)
20
15
Crosstalk vs Frequency
0
TA = 25°C
A
= 10
–10
V
= 0dBm
V
IN
–20
= 100Ω
R
L
–30
–40
–50
CROSSTALK (dB)
–60
–70
–80
–90
100k10M100M
1M
FREQUENCY (Hz)
100
AV = 100
10
AV = 10
1
0.1
OUTPUT IMPEDANCE (Ω)
0.01
30
35
1813 G11
25
0.001
10k100k
AV = 1
1M10M100M
FREQUENCY (Hz)
Gain Bandwidth and Phase
Margin vs Temperature
115
GBW
= ±5V
V
S
GBW
= ±2.5V
V
S
PHASE MARGIN
25
0
TEMPERATURE (°C)
PHASE MARGIN
= ±2.5V
V
S
50
1000M
1813 G14
105
95
85
GAIN BANDWIDTH (MHz)
–50 –25
LT1813
TA = 25°C
= ±5V
V
S
= ±5V
V
S
75
100
1813 G15
1813 G12
PHASE MARGIN (DEG)
42
40
38
125
Frequency Response
vs Supply Voltage, AV = 1
6
TA = 25°C
4
= 1
A
V
NO R
L
2
0
–2
–4
–6
–8
VOLTAGE MAGNITUDE (dB)
–10
–12
–14
1M
10M100M500M
FREQUENCY (Hz)
VS = ±2.5V
VS = ±5V
1813 G16
Frequency Response
vs Supply Voltage, AV = 2
8
6
4
2
0
–2
VOLTAGE MAGNITUDE (dB)
–4
–6
1M
10M100M500M
FREQUENCY (Hz)
V
= ±2.5V
S
= 25°C
T
A
= 2
A
V
R
= 100Ω
L
VS = ±5V
1813 G17
Frequency Response
vs Capacitive Load, AV = –1
12
TA = 25°C
= –1
A
V
V
= ±5V
S
8
= RG = 500Ω
R
F
NO R
L
4
0
VOLTAGE MAGNITUDE (dB)
–4
–8
1
10M100M200M
FREQUENCY (Hz)
CL= 1000pF
CL= 500pF
CL= 200pF
CL= 100pF
CL= 50pF
CL= 0
1813 G18
7
Page 8
LT1813
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Gain Bandwidth and Phase
Margin vs Supply Voltage
105
TA = 25°C
100
95
90
85
80
GAIN BANDWIDTH (MHz)
0
12
SUPPLY VOLTAGE (±V)
R
R
L
PHASE MARGIN
PHASE MARGIN
35
Slew Rate vs Supply Voltage
1000
TA =25°C
900
= –1
A
V
800
700
600
500
400
SLEW RATE (V/µs)
300
200
100
0
= V
V
IN
= RG = RL = 500Ω
R
F
0
/2
S(TOTAL)
3
2
1
SUPPLY VOLTAGE (±V)
GBW
= 500Ω
L
GBW
= 100Ω
= 100Ω
R
L
= 500Ω
R
L
467
1813 G19
+
SR
–
SR
4
5
6
1813 G22
PHASE MARGIN (DEG)
44
42
40
38
7
Power Supply Rejection Ratio
vs Frequency
100
80
60
40
20
POWER SUPPLY REJECTION RATIO (dB)
0
1k10k100k
–PSRR
+PSRR
FREQUENCY (Hz)
Slew Rate vs Supply Voltage
450
TA =25°C
= –1
A
V
= ±1V
V
IN
400
= RG = RL = 500Ω
R
F
350
SR
300
SLEW RATE (V/µs)
250
200
0
2
1
SUPPLY VOLTAGE (±V)
–
+
SR
4
3
TA = 25°C
= 1
A
V
= ±5V
V
S
1M10M100M
1813 G20
6
1813 G23
7
5
Common Mode Rejection Ratio
vs Frequency
100
80
60
40
20
COMMON MODE REJECTION RATIO (dB)
0
1k10k100k
FREQUENCY (Hz)
1M10M100M
Slew Rate vs Input Level
1200
TA =25°C
= –1
A
V
= ±5V
V
S
1000
= RG = RL = 500Ω
R
F
800
600
SLEW RATE (V/µs)
400
200
0
1
3
2
INPUT LEVEL (V
SR
4
5
P-P
TA = 25°C
V
+
SR
6
)
= ±5V
S
1813 G21
–
78
1813 G24
Slew Rate vs Temperature
1100
1000
900
800
700
600
500
SLEW RATE (V/µs)
400
300
200
SR– VS = ±2.5V
SR+ VS = ±2.5V
–2575
–50
SR
VS = ±5V
0125100
TEMPERATURE (°C)
8
Total Harmonic Distortion + Noise
vs Frequency
+
–
SR
VS = ±5V
50
25
1813 G25
0.01
AV = –1
0.005
0.002
TA = 25°C
= ±5V
V
S
= 2V
V
O
RL = 500Ω
TOTAL HARMONIC DISTORTION + NOISE (%)
0.001
10100
AV = 1
P-P
1k10k100k
FREQUENCY (Hz)
1813 G26
Undistorted Output Swing
vs Frequency
9
8
7
)
P-P
6
5
4
3
OUTPUT VOLTAGE (V
2
1
0
100k
AV = –1
AV = 1
VS = ±5V
= 100Ω
R
L
2% MAX DISTORTION
1M10M100M
FREQUENCY (Hz)
1813 G27
Page 9
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LT1813
2nd and 3rd Harmonic Distortion
vs Frequency
–30
AV = 2
= ±5V
V
S
–40
= 2V
V
O
P-P
–50
–60
–70
–80
HARMONIC DISTORTION (dB)
–90
–100
100k
2ND HARMONIC
3RD HARMONIC
= 100Ω
R
L
FREQUENCY (Hz)
3RD HARMONIC
2ND HARMONIC
= 500Ω
R
L
1M
Small-Signal Transient (AV = 1)
1813 G28
Differential Gain and Phase
vs Supply Voltage
0.5
0.4
0.3
DIFFERENTIAL PHASE (DEG)
0.2
0.1
0
10M
4
DIFFERENTIAL GAIN
R
= 150Ω
L
DIFFERENTIAL GAIN
R
= 1k
L
DIFFERENTIAL PHASE
= 150Ω
R
L
DIFFERENTIAL PHASE
R
= 1k
L
6
TOTAL SUPPLY VOLTAGE (V)
8
10
12
1813 G29
Small-Signal Transient (AV = –1)
0.5
0.4
0.3
0.2
0.1
0
100
90
80
DIFFERENTIAL GAIN (%)
70
60
50
40
OVERSHOOT (%)
30
20
10
Capacitive Load Handling
TA = 25°C
V
= ±5V
S
AV = 1
AV = –1
0
10
100100010000
CAPACITIVE LOAD (pF)
Small-Signal Transient
(AV = 1, CL = 100pF)
1813 G30
Large-Signal Transient (AV = 1)
1813 G31
Large-Signal Transient (AV = –1)
1813 G331813 G32
Large-Signal Transient
(AV = –1, CL = 200pF)
1813 G361813 G351813 G34
9
Page 10
LT1813
U
WUU
APPLICATIONS INFORMATION
Layout and Passive Components
The LT1813 amplifier is more tolerant of less than ideal
layouts than other high speed amplifiers. For maximum
performance (for example, fast settling) use a ground
plane, short lead lengths and RF-quality bypass capacitors
(0.01µF to 0.1µF). For high drive current applications, use
low ESR bypass capacitors (1µF to 10µF tantalum).
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking or
oscillations. If feedback resistors greater than 2k are used,
a parallel capacitor of value
CF > RG • CIN/R
should be used to cancel the input pole and optimize
dynamic performance. For applications where the DC
noise gain is 1 and a large feedback resistor is used, C
should be greater than or equal to CIN. An example would
be an I-to-V converter.
Input Considerations
Each of the LT1813 amplifier inputs is the base of an NPN
and PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP beta,
the polarity of the input current can be positive or negative.
The offset current does not depend on beta matching and
is well controlled. The use of balanced source resistance
at each input is recommended for applications where DC
accuracy must be maximized. The inputs can withstand
differential input voltages of up to 3V without damage and
need no clamping or source resistance for protection.
Differential inputs generate the large supply currents (up
to 40mA) required for high slew rates. Typically, power
dissipation does not significantly increase in normal,
closed-loop operation because of the low duty cycle of the
transient inputs.
The device should not be used as a comparator because
with sustained differential inputs, excessive power dissipation may result.
F
F
Capacitive Loading
The LT1813 is stable with a 1000pF capacitive load which
is outstanding for a 100MHz amplifier. This is accomplished by sensing the load induced output pole and
adding compensation at the amplifier gain node. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
domain and in the transient response. Coaxial cable can be
driven directly, but for best pulse fidelity, a resistor of
value equal to the characteristic impedance of the cable
(i.e., 75Ω) should be placed in series with the output. The
other end of the cable should be terminated with the same
value resistor to ground.
Slew Rate
The slew rate is proportional to the differential input
voltage. Highest slew rates are therefore seen in the
lowest gain configurations. For example, a 5V output step
in a gain of 10 has a 0.5V input step, whereas in unity gain
there is a 5V input step. The LT1813 is tested for slew rate
in a gain of –1. Lower slew rates occur in higher gain
configurations.
Power Dissipation
The LT1813 combines high speed and large output drive
in a small package. It is possible to exceed the maximum
junction temperature under certain conditions. Maximum
junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) as follows:
LT1813CS8: TJ = TA + (PD • 150°C/W)
Power dissipation is composed of two parts. The first is
due to the quiescent supply current and the second is
due to on-chip dissipation caused by the load current.
The worst-case load induced power occurs when the
output voltage is at 1/2 of either supply voltage (or the
maximum swing if less than 1/2 supply voltage). For each
amplifier:
P
DMAX
P
DMAX
= (V+ – V–)(I
= (V+ – V–)(I
) + (V+/2)2/RL or
SMAX
) + (V+ – V
SMAX
OMAX
)(V
OMAX/RL
)
10
Page 11
LT1813
U
WUU
APPLICATIONS INFORMATION
Example: LT1813 in SO-8 at 70°C, VS = ±5V, RL = 100Ω
P
= (10V)(4.5mA) + (2.5V)2/100Ω = 108mW
DMAX
T
= 70°C + (2 • 108mW)(150°C/W) = 102°C
JMAX
Circuit Operation
The LT1813 circuit topology is a true voltage feedback
amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the Simplified Schematic. The inputs
are buffered by complementary NPN and PNP emitter
followers which drive a 300Ω resistor. The input voltage
appears across the resistor generating currents that are
mirrored into the high impedance node.
Complementary followers form an output stage that buffers the gain node from the load. The bandwidth is set by
the input resistor and the capacitance on the high impedance node. The slew rate is determined by the current
available to charge the gain node capacitance. This current
is the differential input voltage divided by R1, so the slew
rate is proportional to the input. Highest slew rates are
therefore seen in the lowest gain configurations.
The RC network across the output stage is bootstrapped
when the amplifier is driving a light or moderate load and
has no effect under normal operation. When driving capacitive loads (or a low value resistive load) the network is
incompletely bootstrapped and adds to the compensation
at the high impedance node. The added capacitance slows
down the amplifier which improves the phase margin by
moving the unity-gain cross away from the pole formed by
the output impedance and the capacitive load. The zero
created by the RC combination adds phase to ensure that
the total phase lag does not exceed 180 degrees (zero
phase margin) and the amplifier remains stable. In this
way, the LT1813 is stable with up to 1000pF capacitive
loads in unity gain, and even higher capacitive loads in
higher closed-loop gain configurations.
SI PLIFIED
+
V
–IN
–
V
WW
SCHEMATIC
300Ω
R1
+IN
R
C
C
C
C
OUT
1813 SS
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
Page 12
LT1813
TYPICAL APPLICATION
U
Two Op Amp Instrumentation Amplifier
R1
10k
–
V
IN
+
GAIN
=
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON MODE REJECTION
BW = 1MHz
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
–
1/2
LT1813
+
R5
220Ω
R2
1k
R3
1k
–
LT1813
1/2
R4
10k
V
OUT
+
4
12213
R
1
+
3
R
RRR
+
+
4
R
23
RR
+
()
=
102
5
R
1813 TA03
U
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
7
6
5
8
5
6
0.193 ± 0.006
(4.90 ± 0.15)
12
0.040
± 0.006
SEATING
PLANE
(1.02 ± 0.15)
0.012
(0.30)
0.0256
REF
(0.65)
BSC
0.007
(0.18)
0.021
(0.53 ± 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
± 0.006
° – 6° TYP
0
0.118 ± 0.004**
4
3
(3.00 ± 0.102)
0.034 ± 0.004
(0.86 ± 0.102)
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS8) 1098
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0.016 – 0.050
(0.406 – 1.270)
0°– 8° TYP
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.150 – 0.157**
(3.810 – 3.988)
1
3
2
4
0.050
(1.270)
BSC
0.004 – 0.010
(0.101 – 0.254)
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LT1360/LT1361/LT1362Single/Dual/Quad 50MHz, 800V/µs, C-LoadTM Amplifiers±15V Operation, 1mV Max VOS, 1µA Max I
LT1363/LT1364/LT1365Single/Dual/Quad 70MHz, 1000V/µs C-Load Amplifiers±15V Operation, 1.5mV Max VOS, 2µA Max I
LT1398/LT1399Dual/Triple 300MHz Current Feedback Amplifiers4.5mA Supply Current, 80mA Output Current, Shutdown
C-Load is a trademark of Linear Technology Corporation.
1813f LT/TP 0999 4K • PRINTED IN USA
LINEAR TECHNOLOG Y CORPORATION 1999
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
B
B
SO8 1298
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