Datasheet LT1769 Datasheet (Linear Technology)

Page 1
FEATURES
LT1769
Constant-Current/
Constant-Voltage 2A Battery
Charger with Input Current Limiting
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DESCRIPTIO
Simple Solution to Charge NiCd, NiMH and Lithium Rechargeable Batteries—Charging Current Programmed by Resistors or DAC
Adapter Current Limit Allows Maximum Possible Charging Current During System Use*
Precision 0.5% Accuracy for Voltage Mode Charging
High Efficiency Current Mode PWM with 3A Internal Switch
5% Charge Current Accuracy
Adjustable Undervoltage Lockout
Automatic Shutdown When AC Adapter is Removed
Low Reverse Battery Drain Current: 3µA
Current Sensing Can Be at Either Terminal of the Battery
Charging Current Soft Start
Shutdown Control
Available in 28-Lead Narrow SSOP Package
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APPLICATIO S
Chargers for NiCd, NiMH, Lead-Acid, Lithium Rechargeable Batteries
Switching Regulators with Precision Current Limit
, LTC and LT are registered trademarks of Linear Technology Corporation.
*US patent number 5,723,970 **See LT1510 for 1.5A charger; see LT1511 for 3A charger
The LT®1769 current mode PWM battery charger is a simple, efficient solution to fast charge modern recharge­able batteries including lithium-ion (Li-Ion), nickel-metal­hydride (NiMH) and nickel-cadmium (NiCd) that require constant-current and/or constant-voltage charging. The internal switch is capable of delivering 2A** DC current (3A peak current). Charge current can be programmed by resistors or a DAC to within 5%. With 0.5% reference voltage accuracy, the LT1769 meets the critical constant-voltage charging requirement for Li-Ion cells.
A third control loop is provided to regulate the current drawn from the input AC adapter. This allows simulta­neous operation of the equipment and battery charging without overloading the adapter. Charge current is reduced to keep the adapter current below specified levels.
The LT1769 can charge batteries ranging from 1V to 20V. Ground sensing of current is not required and the battery’s negative terminal can be tied directly to ground. A saturat­ing switch running at 200kHz gives high charging effi­ciency and small inductor size. A blocking diode is not required between the chip and the battery because the chip goes into sleep mode and drains only 3µA when the wall adapter is unplugged.
TYPICAL APPLICATIO
††
D1
SS24
NOTE: COMPLETE LITHIUM-ION CHARGER, NO TERMINATION REQUIRED. R AND C1 ARE OPTIONAL FOR I *TOKIN OR UNITED CHEMI-CON/MARCON CERAMIC SURFACE MOUNT **22µH SUMIDA CDRH125
SEE APPLICATIONS INFORMATION FOR
INPUT CURRENT LIMIT AND UNDERVOLTAGE LOCKOUT
††
GENERAL SEMICONDUCTOR. FOR TJ LESS THEN 100°C
MBRS130LT3 CAN BE USED
S4
LIMITING
IN
L1** 22µH
, R7
1N4148
U
GND
2nF
10k
SW
BOOST
COMP1
SPIN
OVP SENSE BAT
C2
0.47µF
D2
Figure 1. 2A Lithium-Ion Battery Charger
CLP
CLN
V
CC
LT1769
UV
PROG
V
C
R
R
S3
200
200
1%
1%
R
S1
0.05
BATTERY CURRENT
SENSE
S2
0.33µF
R3 390k
0.25% BATTERY VOLTAGE SENSE
R4 162k
0.25%
CIN* 15µF
††
R7
500
C1 1µF
300
C
PROG
1µF
+
C
OUT
22µF TANT
D3
SS24
R
S4
ADAPTER CURRENT SENSE
R
PROG
4.93k 1%
8.4V Li-Ion
V
(ADAPTER INPUT)
IN
11V TO 28V
TO MAIN SYSTEM LOAD
R5† UNDERVOLTAGE LOCKOUT
R6 5k
V
BAT
1511 • F01
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Page 2
LT1769
1 2 3 4 5 6 7 8
9 10 11 12 13 14
TOP VIEW
GN PACKAGE
28-LEAD PLASTIC SSOP
28 27 26 25 24 23 22 21 20 19 18 17 16 15
GND** GND** GND**
SW
BOOST
UV GND** GND**
OVP
CLP
CLN
COMP1
SENSE
GND**
GND** GND** GND** V
CC1
*
V
CC2
*
V
CC3
* GND** PROG V
C
UV
OUT
COMP2 BAT SPIN GND**
WW
W
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage
(VCC, CLP and CLN Pin Voltage)......................... 30V
BOOST Pin Voltage with Respect to VCC................. 25V
I
(Average)........................................................... 2A
BAT
Operating Junction Temperature Range
Commercial ...........................................0°C to 125°C
Industrial ......................................... – 40°C to 125°C
Operating Ambient Temperature
Commercial ............................................ 0°C to 70°C
Industrial ........................................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
LT1769CGN LT1769IGN
T
= 125°C, θJA = 35°C/ W**
JMAX
Consult factory for Military grade parts.
*ALL V
** ALL GND PINS ARE
PINS SHOULD
CC
BE CONNECTED TOGETHER CLOSE TO THE PINS
FUSED TO INTERNAL DIE ATTACH PADDLE FOR HEAT SINKING. CONNECT THESE PINS TO EXPANDED PC LANDS FOR PROPER HEAT SINKING. 35°C/W THERMAL RESISTANCE ASSUMES AN INTERNAL GROUND PLANE DOUBLING AS A HEAT SPREADER
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ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, V V
= VCC. No load on any outputs unless otherwise noted.
CLN
The denotes specifications which apply over the full operating
= 8V, RS2 = RS3 = 200Ω (see Block Diagram),
BAT
PARAMETER CONDITIONS MIN TYP MAX UNITS Overall
Supply Current V
Sense Amplifier CA1 Gain and Input Offset Voltage 8V ≤ V (With R (Measured across R
VCC Undervoltage Lockout (Switch OFF) Threshold Measured at UV Pin 678 V UV Pin Input Current 0.2V ≤ VUV 8V 0.1 5 µA UV Output Voltage at UV UV Output Leakage Current at UV Reverse Current from Battery (When V
Not Connected, VSW Is Floating)
= 200Ω, RS3 = 200Ω)R
S2
)(Note 2) R
S1
Pin In Undervoltage State, I
OUT
Pin 8V ≤ VUV, V
OUT
Is V
CC
= 2.7V, VCC 20V 4.5 6.8 mA
PROG
V
= 2.7V, 20V < VCC 25V 4.6 7.0 mA
PROG
25V , 0V V
CC
= 4.93k 93 100 107 mV
PROG
= 49.3k 81012 mV
PROG
< 0°C712mV
T
A
V
CC
= 28V, V
R
PROG
R
PROG
= 20V
BAT
= 4.93k 90 110 mV = 49.3k 614mV
BAT
20V
TA < 0°C713mV
= 70µA 0.1 0.5 V
UVOUT
= 5V 0.1 3 µA
UVOUT
20V, VUV 0.4V 3 15 µA
BAT
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LT1769
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, V V
= VCC. No load on any outputs unless otherwise noted.
CLN
PARAMETER CONDITIONS MIN TYP MAX UNITS Overall
Boost Pin Current V
Switch
Switch ON Resistance 8V V
I
/ISW During Switch ON V
BOOST
Switch OFF Leakage Current V
Minimum I Minimum I Maximum V
Current Sense Amplifier CA1 Inputs (Sense, BAT)
Input Bias Current – 50 –125 µA Input Common Mode Low –0.25 V Input Common Mode High VCC – 2 V SPIN Input Current –100 –200 µA
Reference
Reference Voltage (Note 3) R
Reference Voltage All Conditions of V
Oscillator
Switching Frequency 180 200 220 kHz Switching Frequency All Conditions of V
Maximum Duty Cycle 90 93 %
Current Amplifier CA2
Transconductance VC = 1V, IVC = ±1µA 150 250 550 µmho Maximum VC for Switch OFF 0.6 V I
Current (Out of Pin) VC 0.6V 100 µA
VC
for Switch ON 2420 µA
PROG
for Switch OFF 1 2.4 mA
PROG
for Switch ON VCC – 2 V
BAT
CC
V
CC
2V V 8V ≤ V
V
BOOST
BOOST
SW
20V < VCC 28V 4 200 µA
PROG
VA Supplying I
VC < 0.45V 3 mA
The denotes specifications which apply over the full operating
= 8V, RS2 = RS3 = 200Ω (see Block Diagram),
BAT
= 20V, V = 28V, V
BOOST BOOST
V
CC
– VSW 2V 0.15 0.25 = 24V, ISW 2A 25 35 mA/A
= 0V, VCC 20V 2 100 µA
= 4.93k, Measured at OVP with
= 0V 0.1 10 µA
BOOST
= 0V 0.25 20 µA
BOOST
– VCC < 8V (Switch ON) 6 9 mA – VCC 25V (Switch ON) 8 12 mA
, ISW = 2A,
MAX
and Switch OFF 2.448 2.465 2.477 V
PROG
0°C 2.441 2.489 V
CC,TA
TA < 0°C (Note 4) 2.43 2.489 V
0°C 170 200 230 kHz
CC,TA
TA < 0°C 160 230 kHz
85 %
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LT1769
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, V
The denotes specifications which apply over the full operating
= 8V. No load on any outputs unless otherwise noted.
BAT
PARAMETER CONDITIONS MIN TYP MAX UNITS Voltage Amplifier VA
Transconductance (Note 3) Output Current from 50µA to 500µA 0.25 0.6 1.3 mho Output Source Current V OVP Input Bias Current VA Output Current at 0.5mA
OVP
= V
+ 10mV, V
REF
PROG
= V
+ 10mV 1.1 mA
REF
±3 ±10 nA
VA Output Current at 0.5mA, TA > 90°C –15 25 nA
Current Limit Amplifier CL1, 8V ≤ Input Common Mode
Turn-On Threshold 0.5mA Output Current 93 100 107 mV Transconductance Output Current from 50µA to 500µA 0.5 1 2 mho CLP Input Current 0.5mA Output Current, VUV 0.4V 0.3 1 µA CLN Input Current 0.5mA Output Current VUV 0.4V 0.8 2 mA
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: Tested with Test Circuit 1.
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Note 3: Tested with Test Circuit 2. Note 4: A linear interpolation can be used for reference voltage
specification between 0°C and –40°C.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency of Figure 1 Circuit
100
VIN = 16.5
98
= 8.4V
V
BAT
96 94 92 90 88
EFFICIENCY (%)
86 84 82 80
0.2
CHARGER EFFICIENCY
INCLUDES LOSS
IN DIODE D3
1.0 1.8 2.2
0.6 1.4 I
(A)
BAT
1769 G01
ICC vs Duty Cycle
8
= 16V
V
CC
7
6
5
TJ = 0°C
(mA)
4
CC
I
3
2
1
0
010305070
20
TJ = 125°C
TJ = 25°C
40
DUTY CYCLE (%)
60
1769 G02
ICC vs V
CC
7.0 MAXIMUM DUTY CYCLE
6.5
6.0
(mA)
CC
I
5.5
5.0
4.5
80
0
10 15 20
5
TJ = 0°C
TJ = 25°C
TJ = 125°C
25 30
VCC (V)
1769 G03
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JUNCTION TEMPERATURE
0
REFERENCE VOLTAGE (V)
2.470
2.468
2.466
2.464
2.462
2.460
2.458 25
50 75 100
1769 G09
125 150
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TYPICAL PERFORMANCE CHARACTERISTICS
V
Line Regulation IVA vs ∆V
REF
0.003
0.002
0.001
(V)
REF
V
–0.001
–0.002
ALL TEMPERATURES
0
(mV)
OVP
V
4
3
2
1
(Voltage Amplifier)
OVP
TJ = 125°C
TJ = 25°C
LT1769
–0.003
0
10 15 20
5
Maximum Duty Cycle
98
97
96
95
94
93
DUTY CYCLE (%)
92
91
90
20 60 100 140
0
40 80
JUNCTION TEMPERATURE (°C)
PROG Pin Characteristics
6
VCC (V)
25 30
1769 G04
120
1769 G06
0
0.20.1 0.3 0.5 0.7 0.9
0
0.4 IVA (mA)
VC Pin Characteristics
–1.20 –1.08 –0.96 –0.84 –0.72 –0.60
(mA)
–0.48
VC
I
–0.36 –0.24 –0.12
0
0.12
0.4
0 0.2 0.6 1.0 1.4 1.8
0.8 VC (V)
Reference Voltage vs Temperature
1.2
0.6
1.6
0.8
1.0
1769 G05
2.0
1769 G07
(mA)
0
PROG
I
–6
0123
V
PROG
TJ = 125°C
TJ = 25°C
54
(V)
1769 G08
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LT1769
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PIN FUNCTIONS
GND (Pins 1 to 3, 7, 8, 14, 15, 22, 26 to 28): Ground Pins. Must be connected to expanded PC lands for proper heat sinking. See Applications Information section for details.
SW (Pin 4): Switch Output. The Schottky catch diode must be placed with very short lead length in close proximity to SW pin and GND.
BOOST (Pin 5): This pin is used to bootstrap and drive the switch power NPN transistor to a low on-voltage for low power dissipation. In Figure 1, V switch is on. For lowest IC power dissipation, connect boost diode D1 to a 3V to 6V at 30mA voltage source (see Figure 10).
UV (Pin 6): Undervoltage Lockout Input. The rising thresh­old is at 6.7V with a hysteresis of 0.5V. Switching stops in undervoltage lockout. When the input supply (normally the wall adapter output) to the IC is removed, the UV pin must be pulled down to below 0.7V (a 5k resistor from adapter output to GND is required) otherwise the reverse battery current drained by the IC will be approximately 200µA instead of 3µA. Do not leave the UV pin floating. When connected to VIN with no resistor divider, the built­in 6.7V undervoltage lockout will be effective.
OVP (Pin 9): This is the input to amplifier VA with a threshold of 2.465V. Typical bias current is about 3nA out of this pin. For charging lithium-ion batteries, VA monitors the battery voltage and reduces charging when battery voltage reaches the preset value. If it is not used, the OVP pin should be grounded.
CLP (Pin 10): This is the positive input to the input current limit amplifier CL1. The threshold is set at 100mV. When used to limit supply current, a filter is needed to filter out the 200kHz switching noise.
CLN (Pin 11): This is the negative input to the input current limit amplifier CL1.
COMP1 (Pin 12): This is the compensation node for the input current limit amplifier CL1. At input adapter current limit, this node rises to 1V. By forcing COMP1 low with an external transistor, amplifier CL1 will be defeated (no adapter current limit). COMP1 can source 200µA. If this function is not used, the resistor and capacitor on COMP1 pin, shown on the Figure 1 circuit, are not needed.
BOOST
= VCC + V
BAT
when
SENSE (Pin 13): Current Amplifier CA1 Input. Sensing can be at either terminal of the battery.
SPIN (Pin 16): This pin is for the current amplifier CA1 bias. It must be connected to RS1 as shown in the 2A Lithium Battery Charger (Figure 1).
BAT (Pin 17): Current Amplifier CA1 Input. COMP2 (Pin 18): This is also a compensation node for
amplifier CL1. Voltage on this pin rises to 2.8V at input adapter current limit and/or at constant-voltage charging.
UV
undervoltage lockout status. It stays low in undervoltage state. With an external pull-up resistor, it goes high at valid VCC. Note that the base drive of the open-collector NPN comes from CLN pin. UV higher than 2V. Pull-up current should be kept under 100µA.
VC (Pin 20): This is the inner loop control signal for the current mode PWM. Switching starts at 0.7V. In normal operation, a higher VC corresponds to higher charge current. A capacitor of at least 0.33µF to GND filters out noise and controls the rate of soft start. To stop switching, pull this pin low. Typical output current is 30µA.
PROG (Pin 21): This pin is for programming the charge current and for system loop compensation. During normal operation, V GND switching will stop. When a microprocessor con­trolled DAC is used to program charge current, it must be capable of sinking current at a compliance up to 2.465V.
V
bypass, a low ESR capacitor of 15µF or higher is required, with the lead length kept to a minimum. VCC should be between 8V and 28V and at least 3V higher than V Undervoltage lockout starts and switching stops when VCC goes below 7V typical. Note that there is an internal parasitic diode from SW pin to VCC pin. Do not force V below SW by more than 0.7V with battery present. All three VCC pins should be shorted together close to the pins.
(Pin 19): This is an open-collector output for
OUT
stays low only when CLN is
OUT
stays close to 2.465V. If it is shorted to
PROG
CC1, VCC2, VCC3
(Pins 23 to 25): Input Supply. For good
BAT
CC
.
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BLOCK DIAGRAM
LT1769
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UV
GND
UV
OUT
+
+
7V
200kHz
+
0.7V
+
V
SW
V
CC
SHUTDOWN
+
+
1.5V
V
BAT
PWM
C1
+
SLOPE COMPENSATION
R2
R3
OSCILLATOR
B1
V
CC
S
R R R
V
CC
Q
SW
+
+
CA1
R1 1k
I
PROG
BOOST
SW
SPIN
SENSE
BAT
R
S3
R
S2
I
BAT
R
S1
BAT
+
0VP
CLP
CLN
COMP1
COMP2
1769 BD
V
C
75k
CA2
+
V
REF
gm = 0.64
+
VA
V
REF
2.465V
100mV
+
CL1
C
PROG
PROG
I
PROG
R
PROG
I
BAT
)(RS2)
(I
PROG
=
R
S1
R
2.465V
=
(())
R
(R
PROG
S3
= RS2)
S2
R
S1
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LT1769
TEST CIRCUITS
Test Circuit 1
SPIN
SENSE
BAT
R
S3
200
R
S2
200
R
S1
100
+
V
BAT
0.047µF
LT1769
V
C
60k
CA2
+
V
300
REF
1µF
1k
R
PROG
PROG
+
CA1
+
1k
+
0.65V
LT1006
20k
1769 TC01
Test Circuit 2
LT1769
+
VA
OVP
V
REF
10k
I
PROG
PROG
10k
0.47µF
R
PROG
+
2.465V
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OPERATION
The LT1769 is a current mode PWM step-down (buck) switcher. The battery DC charge current is programmed by a resistor R pin (see Block Diagram). Amplifier CA1 converts the charge current through RS1 to a much lower current I fed into the PROG pin. Amplifier CA2 compares the output of CA1 with the programmed current and drives the PWM control loop to force them to be equal. High DC accuracy is achieved with averaging capacitor C I
has both AC and DC components. I
PROG
through R1 and generates a ramp signal that is fed to the PWM control comparator C1 through buffer B1 and level
(or a DAC output current) at the PROG
PROG
. Note that
PROG
PROG
PROG
goes
LT1013
+
1769 TC02
shift resistors R2 and R3, forming the current mode inner loop. The BOOST pin drives the switch NPN QSW into saturation and reduces power loss. For batteries like lithium-ion that require both constant-current and con­stant-voltage charging, the 0.5%, 2.465V reference and the amplifier VA reduce the charge current when battery voltage reaches the preset level. For NiMH and NiCd, VA can be used for overvoltage protection. When the input voltage is removed, the VCC pin drops to 0.7V below the battery voltage, forcing the charger into a low battery drain (3µA typical) sleep mode. To shut down the charger, simply pull the VC pin low with a transistor.
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LT1769
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APPLICATIONS INFORMATION
Input and Output Capacitors
In the 2A Lithium-Ion Battery Charger (Figure 1), the input capacitor (CIN) is assumed to absorb all input switching ripple current in the converter, so it must have adequate ripple current rating. Worst-case RMS ripple current will be equal to one half of the output charge current. Actual capacitance value is not critical. Solid tantalum capacitors such as the AVX TPS and Sprague 593D series have high ripple current rating in a relatively small surface mount package, but
tors are used for input bypass
are possible when the adapter is hot-plugged to the charger and solid tantalum capacitors have a known failure mechanism when subjected to very high turn-on surge currents. Selecting a high voltage rating on the capacitor will minimize problems. Consult with the manu­facturer before use. Alternatives include new high capacity ceramic (5µF to 20µF) from Tokin or United Chemi-Con/ Marcon, et al. Sanyo OS-CON can also be used.
The output capacitor (C output switching ripple current. The general formula for capacitor ripple current is:
I
RMS
For example, VCC = 16V, V and f = 200kHz, I
EMI considerations usually make it desirable to minimize ripple current in the battery leads. Beads or inductors can be added to increase battery impedance at the 200kHz switching frequency. Switching ripple current splits be­tween the battery and the output capacitor depending on the ESR of the output capacitor and the battery imped­ance. If the ESR of C is raised to 4 with a bead or inductor, only 5% of the ripple current will flow into the battery.
Soft-Start and Undervoltage Lockout
The LT1769 is soft-started by the 0.33µF capacitor on the VC pin. On start-up, the VC pin voltage will quickly rise to
0.5V, then ramp at a rate set by the internal 45µA pull-up
caution must be used when tantalum capaci-
. High input surge currents
) is also assumed to absorb
OUT
V
BAT
) 1 –
()
V
CC
= 8.4V, L1 = 20µH,
BAT
=
0.29 (V
(L1)(f)
RMS
BAT
= 0.3A.
is 0.2 and the battery impedance
OUT
current and the external capacitor. Charge current starts ramping up when VC pin voltage reaches 0.7V and full current is achieved with VC at 1.1V. With a 0.33µF capaci- tor, the time to reach full charge current is about 10ms and it is assumed that input voltage to the charger will reach full value in less than 10ms. The capacitor can be increased up to 1µF if longer input start-up times are needed.
In any switching regulator, conventional time-based soft­starting can be defeated if the input voltage rises much slower than the time out period. This happens because the switching regulators in the battery charger and the com­puter power supply are typically supplying a fixed amount of power to the load. If the input voltage comes up slowly compared to the soft-start time, the regulators will try to deliver full power to the load when the input voltage is still well below its final value. If the adapter is current limited, it cannot deliver full power at reduced output voltages and the possibility exists for a quasi “latch” state where the adapter output stays in a current limited state at reduced output voltage. For instance, if maximum charger plus computer load power is 25W, a 15V adapter might be current limited at 2A. If adapter voltage is less than (25W/2A = 12.5V) when full power is drawn, the adapter voltage will be pulled down by the constant 25W load until it reaches a lower stable state where the switching regu­lators can no longer supply full load. This situation can be prevented by utilizing than the minimum adapter voltage where full power can be achieved.
A fixed undervoltage lockout of 7V is built into the LT1769. This 7V threshold can be increased by adding a resistive divider to the UV pin as shown in Figure 2. Internal lockout is performed by clamping the VC pin low. The VC pin is released from its clamped state when the UV pin rises above 7V and is pulled low when the UV pin drops below
6.5V (0.5V hysteresis). At the same time UV with an external pull-up resistor. This signal can be used to alert the system that charging is about to start. The charger will start delivering current about 4ms after VC is released, as set by the 0.33µF capacitor. A resistor divider is used to set the desired VCC lockout voltage as shown in Figure 2. A typical value for R6 is 5k and R5 is found from:
undervoltage lockout
OUT
, set higher
goes high
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LT1769
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APPLICATIONS INFORMATION
R6(V – V )
R5 =
VUV = Rising lockout threshold on the UV pin VIN = Charger input voltage that will sustain full load power
Example: With R6 = 5k, VUV = 6.7V and setting VIN at 12V; R5 = 5k (12V – 6.7V)/6.7V = 4k The resistor divider should be connected directly to the
adapter output as shown, not to the VCC pin, to prevent battery drain with no adapter voltage. If the UV pin is not used, connect it to the adapter output (not VCC) and connect a resistor no greater than 5k to ground. Floating this pin will cause reverse battery current to increase from 3µA to 200µA.
If connecting the unused UV pin to the adapter output is not possible, it can be grounded. Although it would seem that grounding the pin creates a permanent lockout state, the UV circuitry is arranged for phase reversal with low voltages on the UV pin to allow the grounding technique to work.
IN
V
UV
UV
ally, batteries will automatically be charged at the maximum possible rate of which the adapter is capable.
This is accomplished by sensing total adapter output current and adjusting the charge current downward if a preset adapter current limit is exceeded. True analog control is used, with closed-loop feedback ensuring that adapter load current remains below the limit. Amplifier CL1 in Figure 2 senses the voltage across RS4, connected between the CLP and CLN pins. When this voltage exceeds 100mV, the amplifier will override the programmed charge current to limit adapter current to 100mV/RS4. A lowpass filter formed by 500 and 1µF is required to eliminate switching noise. If the input current limit is not used, both CLP and CLN pins should be connected to VCC.
Charge Current Programming
The basic formula for charge current is (see Block Diagram):
I
BAT
= I
PROG
R
S2
()
R
S1
2.465V
=
()()
R
PROG
R
S2
R
S1
100mV
+
CL1
LT1769
Figure 2. Adapter Input Current Limiting
CLP
+
1µF
RS4*
100mV
500
AC ADAPTER
OUTPUT
V
R5
R6
1769 F02
IN
CLN
V
CC
+
UV
*R
=
S4
ADAPTER CURRENT LIMIT
Adapter Current Limiting
An important feature of the LT1769 is the ability to automatically adjust charge current to a level which avoids overloading the wall adapter. This allows the product to operate at the same time the batteries are being charged without complex load management algorithms. Addition-
where R
is the total resistance from PROG pin to ground.
PROG
For the sense amplifier CA1 biasing purpose, RS3 should have the same value as RS2 and SPIN should be connected directly to the sense resistor (RS1) as shown in the Block Diagram.
For example, 2A charge current is needed. For low power dissipation on R
and enough signal to drive the amplifier
S1
CA1, let RS1 = 100mV/2A = 0.05. This limits RS1 power to 0.2W. Let R
RS2 = RS3 =
= 5k, then:
PROG
(I
BAT
)(R
PROG
)(RS1)
2.465V
(2A)(5k)(0.05)
= = 200
2.465V
Charge current can also be programmed by pulse width modulating I
with a switch Q1 to R
PROG
at a frequency
PROG
higher than a few kHz (Figure 3). Charge current will be proportional to the duty cycle of the switch with full current at 100% duty cycle.
10
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LT1769
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APPLICATIONS INFORMATION
LT1769
PROG
300
R
PROG
4.7k
5V 0V
PWM
I
= (DC)(2A)
BAT
Figure 3. PWM Current Programming
Q1 VN2222
Lithium-Ion Charging
The 2A Lithium-Ion Battery Charger (Figure 1) charges at a constant 2A until battery voltage reaches a limit set by R3 and R4. The charger will then automatically go into a constant-voltage mode with current decreasing to near zero over time as the battery reaches full charge. This is the normal regimen for lithium-ion charging, with the charger holding the battery at “float” voltage indefinitely. In this case no external sensing of full charge is needed.
C
PROG
1µF
1769 F03
When power is on, there is about 200µA of current flowing out of the BAT and SENSE pins. If the battery is removed during charging, and total load including R3 and R4 is less than 200µA, V loop has turned switching off. To keep V
could float up to VCC even though the
BAT
regulated to
BAT
the battery voltage in this condition, R3 and R4 can be chosen to draw 0.5mA and Q3 can be added to disconnect them when power is off (Figure 4). R5 isolates the OVP pin from any high frequency noise on VIN. An alternative method is to use a Zener diode with a breakdown voltage two or three volts higher than battery voltage to clamp the V
R3 12k
0.25%
LT1769
OVP
VN2222
Q3
R4
4.99k
0.25%
R5
220k
V
IN
+
1769 F04
BAT
8.4V
voltage.
V
BAT
Battery Voltage Sense Resistors Selection
To minimize battery drain when the charger is off, current through the R3/R4 divider is set at 15µA. The input current to the OVP pin is 3nA and the error can be neglected.
With divider current set at 15µA, V
= 8.4V, R4 =
BAT
2.465/15µA = 162k and,
R4 V 2.465
()
R3
=
=
390k
()
BAT
2.465
162k 8.4 2.465
=
()
2.465
Li-Ion batteries typically require float voltage accuracy of 1% to 2%. Accuracy of the LT1769 OVP voltage is ±0.5% at 25°C and ±1% over full temperature. This leads to the possibility that very accurate (0.1%) resistors might be needed for R3 and R4. Actually, the temperature of the LT1769 will rarely exceed 50°C in float mode because charging currents have tapered off to a low level, so 0.25% resistors will normally provide the required level of overall accuracy.
Figure 4. Disconnecting Voltage Divider
Some battery manufacturers recommend terminating the constant-voltage float mode after charge current has dropped below a specified level (typically around 10% of the full current)
and
a further time out period of 30 to 90 minutes has elapsed. This may extend battery life, so check with the manufacturer for details. The circuit in Figure 5 will detect when charge current has dropped below 270mA. This logic signal is used to initiate a timeout period, after which the LT1769 can be shut down by pulling the VC pin low with an open collector or drain. Some external means must be used to detect the need for additional charging or the charger may be turned on periodically to complete a short float-voltage cycle.
Current trip level is determined by the battery voltage, R1 through R3 and the sense resistor (RS1). D2 generates hysteresis in the trip level to avoid multiple comparator transitions.
11
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LT1769
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APPLICATIONS INFORMATION
I
BAT
R
S3
200
R
S1
0.05
V
BAT
C1
R1*
BAT
1.6k
R2 560k
R3 430k
0.1µF
1N4148
R
S2
200
ADAPTER
OUTPUT
3
LT1011
2
+
D2
Figure 5. Current Comparator for Initiating Float Time Out
Nickel-Cadmium and Nickel-Metal-Hydride Charging
The 2A Lithium-Ion Battery Charger shown in Figure 1 can be modified to charge NiCd or NiMH batteries. For ex­ample, if a 2-level charge is needed; 1A when Q1 is on and 100mA when Q1 is off.
LT1769
SENSE
LT1769
BAT
3.3V OR 5V
D1 1N4148
8
4
1
PROG
R4 470k
7
* TRIP CURRENT =
(1.6k)(8.4V)
= 270mA
(560k + 430k)(0.05)
NEGATIVE EDGE TO TIMER
R1(V
BAT
(R2 + R3)(R
)
S1
1769 F04
)
2.465 2000
()()=()()
R1
=
I
LOW HI LOW
R2
2.465 2000 II
All battery chargers with fast charge rates require some means to detect full charge in the battery and terminate the high charge current. NiCd batteries are typically charged at high current until a temperature rise or battery voltage decrease is detected as an indication of near full charge. The charging current is then reduced to a much lower value and maintained as a constant trickle charge. An intermediate “top off” current may also be used for a fixed time period to reduce total charge time.
NiMH batteries are similar in chemistry to NiCd but have two differences related to charging. First, the inflection characteristic in battery voltage as full charge is approached is not nearly as pronounced. This makes it more difficult to use –dV/dt as an indicator of full charge, and an increase in battery temperature is more often used with a temperature sensor in the battery pack. Secondly, con­stant trickle charge may not be recommended. Instead, a moderate level of current is used on a pulse basis ( 1% to 5% duty cycle) with the time-averaged value substitut­ing for a constant low trickle. Please contact the Linear Technology Applications department about charge termi­nation circuits.
If overvoltage protection is needed, R3 and R4 can be cal­culated according to the procedure described in Lithium­Ion Charging section. The OVP pin should be grounded if not used.
300
1µF
R1
49.3k
R2
5.49k
Q1
1769 F05
Figure 6. 2-Level Charging
For 1A full current, the current sense resistor (RS1) should be increased to 0.1 so that enough signal (10mV) will be across RS1 at 0.1A trickle charge to keep charging current accurate.
For a 2-level charger, R1 and R2 are found from:
12
When a microprocessor DAC output is used to control charge current, it must be capable of sinking current at a compliance up to 2.5V if connected directly to the PROG pin.
Thermal Calculations
If the LT1769 is used for charging currents above 1A, a thermal calculation should be done to ensure that junction temperature will not exceed 125°C. Power dissipation in the IC is caused by bias and driver current, switch resis­tance and switch transition losses. The GN package, with a thermal resistance of 35°C/W, can provide a full 2A charging current in many situations. A graph is shown in the Typical Performance Characteristics section.
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LT1769
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APPLICATIONS INFORMATION
P 3.5mA V 1.5mA V
=
()()+()
BIAS IN BAT
2
V
()
BAT
P
P
+
IV
()( )
DRIVER
SW
=
IRV
()()( )
BAT
=
7.5mA 0.012 I
[]
V
IN
BAT BAT
55 V
2
SW BAT
V
IN
RSW = Switch ON resistance 0.16 tOL = Effective switch overlap time 10ns f = 200kHz
Example: VIN = 19V, V
P 3.5mA 19 1.5mA 12.6
=
()()
BIAS
2
12.6
()
+
P
DRIVER
P
SW
0.42 0.08 0.5W
7.5mA 0.012 2000mA 0.35W
[]
19
2 12.6
()( )
=
2
2 0.16 12.6
()( )( )
=
=+=
BAT
+
55 19
19
Total Power in the IC is: 0.35 + 0.43 + 0.5 = 1.3W Temperature rise will be (1.3W)(35°C/W) = 46°C. This
assumes that the LT1769 is properly heat sunk by con­necting the eleven fused ground pins to expanded traces and that the PC board has a backside or internal plane for heat spreading.
+
()()
V
2
+
1
()
IN
+
()()( )()
= 12.6V, I
+
()
()( )
2
12 630.
+
1
BAT
BAT
30
tVI f
OL IN BAT
= 2A:
BAT
=
 
=
0.43W
()
9
+
10 19 2 200kHz
()()( )
SW
LT1769
C2
P
DRIVER
L1
V
X
AVV
2 126 33 1
()( )( )
=
+
I
VX
Figure 7. Lower V
..
55 19
BOOST
D2
SPIN
1769 F07
10µF
BOOST
+
V
()
.
33
30
V
=
009
.
W
The average IVX required is:
009
P
DRIVER
V
X
.
33
.
W
28
mA
V
==
The previous example shows the dramatic drop in driver power dissipation when the boost diode (D2) is connected to an external 3.3V source instead of the 12.6V battery. P
drops from 0.43W to 0.09W resulting in an
DRIVER
approximately 12°C drop in junction temperature. Fused-lead packages conduct most of their heat out the
leads. This makes it very important to provide as much PC board copper around the leads as is practical. Total thermal resistance of the package-board combination is dominated by the characteristics of the board in the immediate area of the package. This means both lateral thermal resistance across the board and vertical thermal resistance through the board to other copper layers. Each layer acts as a thermal heat spreader that increases the heat sinking effectiveness of extended areas of the board.
The P
term can be reduced by connecting the boost
DRIVER
diode D2 (see Figure 7) to a lower system voltage (lower than V
) instead of V
BAT
Then P
DRIVER
.
BAT
IVV
()( )()
BAT BAT X
=
55
 
V
()
IN
V
X
+
1
30
For example, VX = 3.3V then:
Total board area becomes an important factor when the area of the board drops below about 20 square inches. The graph in Figure 8 shows thermal resistance vs board area for 2-layer and 4-layer boards with continuous copper planes. Note that 4-layer boards have significantly lower thermal resistance, but both types show a rapid increase for reduced board areas. Figure 9 shows actual measured lead temperatures for chargers operating at full current.
13
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LT1769
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APPLICATIONS INFORMATION
45
40
35
30
25
20
MEASURED FROM AIR AMBIENT
THERMAL RESISTANCE (°C/W)
15
TO DIE USING COPPER LANDS AS SHOWN ON DATA SHEET
10
0
510
Figure 8. LT1769 Thermal Resistance
70
NOTE: PEAK DIE TEMPERATURE WILL BE ABOUT 15°C HIGHER AT 2A CHARGE CURRENT
60
VIN = 19V
= 12.3V
V
BAT
50
40
30
LEAD TEMPERATURE ON PINS 1, 2, 3 (°C)
20
= 5V
V
BOOST
2-LAYER BOARD ROOM TEMP = 24°C
0
0.5
Figure 9. LT1769 Lead Temperature
2-LAYER BOARD
4-LAYER BOARD
20 30 35
15 25
BOARD AREA (IN2)
5 IN2 BOARD
25 IN2 BOARD
1
CHARGE CURRENT (A)
1.5
1769 F08
2
1769 F09
STANDARD CONNECTION HIGH DUTY CYCLE CONNECTION
0.47µF
C3
D2
SW
BOOST
LT1769
SPIN
SENSE BAT
3V TO 6V
V
BAT
0.47µF
V
X
10µF
C3
D2
C
X
SW
BOOST
SPIN
SENSE BAT
+ +
Figure 10. High Duty Cycle
HIGH DUTY CYCLE CONNECTION
V
IN
R 50k
Q1 = Si4435DY Q2 = TP0610L
Q1
Q2
X
D1
3V TO 6V
0.47µF
V
X
10µF
+
C2
D2
C
X
SW
BOOST
LT1769
SPIN
SENSE BAT
Figure 11. Replacing the Input Diode
LT1769
V
CC
+
V
1769 F10
V
BAT
1769 F11
BAT
Battery voltage and input voltage will affect device power dissipation, so the data sheet power calculations must be used to extrapolate these readings to other situations.
Vias should be used to connect board layers together. Planes under the charger area can be cut away from the rest of the board and connected with vias to form both a low thermal resistance system and to act as a ground plane for reduced EMI.
Glue-on, chip-mounted heat sinks are effective only in moderate power applications where the PC board copper cannot be used, or where the board size is small. They offer very little improvement in a properly laid out multi­layer board of reasonable size.
14
Higher Duty Cycle for the LT1769 Battery Charger
Maximum duty cycle for the LT1769 is typically 90%, but this may be too low for some applications. For example, if an 18V ±3% adapter is used to charge ten NiMH cells, the charger must put out approximaly 15V. A total of 1.6V is lost in the input diode, switch resistance, inductor resis­tance and parasitics, so the required duty cycle is 15/16.4 = 91.4%. The duty cycle can be extended to 93% by restricting boost voltage to 5V instead of using V
BAT
as is normally done. This lower boost voltage also reduces power dissipation in the LT1769, so it is a win-win deci­sion. Connect an external source of 3V to 6V at VX node in Figure 10 with a 10µF CX bypass capacitor.
Page 15
LT1769
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APPLICATIONS INFORMATION
Lower Dropout Voltage
For even lower dropout and/or reducing heat on the board, the input diode D3 can be replaced with a FET (see Figure
11). Connect a P-channel FET in place of the input diode with its gate connected to the battery causing the FET to turn off when the input voltage goes low. The problem is that the gate must be pumped low so that the FET is fully turned on even when the input is only a volt or two above the battery voltage. Also there is a turn-off speed issue. The FET should turn off instantly when the input is dead shorted to avoid large current surges from the battery back through the charger into the FET. Gate capacitance slows turn-off, so a small P-channel (Q2) is added to discharge the gate capacitance quickly in the event of an input short. The Q2 body diode creates the necessary pumping action to keep the gate of Q1 low during normal operation. Note that Q1 and Q2 have a VGS spec limit of 20V. This restricts VIN to a maximum of 20V. For low dropout operation with VIN > 20V consult factory.
Optional Diode Connections
The typical application in Figure 1 shows a single diode (D3) to isolate the VCC pin from the adaptor input and to block reverse input voltage (both steady state and tran­sient). This simple connection may be unacceptable in situations where the system load must be powered from the battery when the adapter input power is removed. As shown in Figure 12, a parasitic diode exists from the SW
pin to the VCC pin in the LT1769. When the input power is removed, this diode will become forward biased and will provide a current path from the battery to the system load. Because of diode power limitations, it is not recom­mended to power the system load through the internal parasitic diode. To safely power the system load from the battery, an additional Schottky diode (D4) is needed. For minimum losses, D4 could be replaced by a low R
DS(ON)
MOSFET which is turned on when the adapter power is removed.
Layout Considerations
Switch rise and fall times are under 10ns for maximum efficiency. To minimize radiation, the catch diode, SW pin and input bypass capacitor leads should be kept as short as possible. A ground plane should be used under the switching circuitry to prevent interplane coupling and to act as a thermal spreading path. All ground pins should be connected to expanded traces for low thermal resistance. The fast-switching high current ground path, including the switch, catch diode and input capacitor, should be kept very short. Catch diode and input capacitor should be close to the chip and terminated to the same point. This path contains nanosecond rise and fall times with several amps of current. The other paths contain only DC and/or 200kHz tri-wave and are less critical. Figure 13 indicates the high speed, high current switching path. Figure 14 shows critical path layout. Contact Linear Technology for the LT1769 circuit PCB layout or Gerber file.
R7
CLP
LT1769
CLN
SW
L1
V
CC
INTERNAL
PARASITIC
DIODE
R
S1
Figure 12. Modified Diode Connection
500
+
C1 1µF
+
C
IN
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
D3
ADAPTER IN
R
S4
TO SYSTEM LOAD
D4
+
1769 F12a
V
C
IN
Figure 13. High Speed Switching Path
IN
SWITCH NODE
HIGH
FREQUENCY
CIRCULATING
PATH
L1
D1
C
OUT
BAT
1769 F13
V
BAT
15
Page 16
LT1769
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APPLICATIONS INFORMATION
L1
NOTE: CONNECT ALL GND PINS TO EXPANDED PC LANDS FOR PROPER HEAT SINKING
Figure 14. Critical Electrical and Thermal Path Layout
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
D1
TO
GND
GND GND GND SW BOOST UV GND GND OVP CLP CLN COMP1 SENSE GND
GND
COMP2
GND
PROG
UV
GND GND GND
V
CC1
V
CC2
V
CC3
GND
OUT
BAT SPIN GND
C
IN
TO
V
C
GND
R
S1
C
OUT
1769 F14
GN Package
28-Lead Plastic SSOP (Narrow 0.150)
0.015
0.004
±
0.0075 – 0.0098 (0.191 – 0.249)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
(0.38 ± 0.10)
× 45°
0.016 – 0.050
(0.406 – 1.270)
0° – 8° TYP
0.053 – 0.069
(1.351 – 1.748)
0.008 – 0.012
(0.203 – 0.305)
(LTC DWG # 05-08-1641)
0.004 – 0.009
(0.102 – 0.249)
0.0250 (0.635)
BSC
0.229 – 0.244
(5.817 – 6.198)
12
5
4
3
0.386 – 0.393* (9.804 – 9.982)
202122232425262728
19
678 9 10 11 12
0.033
(0.838)
16
18
15
17
13 14
REF
0.150 – 0.157** (3.810 – 3.988)
GN28 (SSOP) 1098
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Linear T echnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
www.linear-tech.com
1769f LT/TP 0999 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1999
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